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GET /api/patches/82023/?format=api
{ "id": 82023, "url": "http://patches.dpdk.org/api/patches/82023/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603494392-7181-9-git-send-email-liang.j.ma@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1603494392-7181-9-git-send-email-liang.j.ma@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1603494392-7181-9-git-send-email-liang.j.ma@intel.com", "date": "2020-10-23T23:06:30", "name": "[v9,08/10] net/ice: implement power management API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c7c6f9a24985a75a8b2ced4e7e3c64355a351038", "submitter": { "id": 904, "url": "http://patches.dpdk.org/api/people/904/?format=api", "name": "Liang, Ma", "email": "liang.j.ma@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603494392-7181-9-git-send-email-liang.j.ma@intel.com/mbox/", "series": [ { "id": 13288, "url": "http://patches.dpdk.org/api/series/13288/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13288", "date": "2020-10-23T23:06:22", "name": "Add PMD power mgmt", "version": 9, "mbox": "http://patches.dpdk.org/series/13288/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/82023/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/82023/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 47CD2A04B0;\n\tSat, 24 Oct 2020 01:09:22 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2C76A6C98;\n\tSat, 24 Oct 2020 01:07:07 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id B994B2B84\n for <dev@dpdk.org>; Sat, 24 Oct 2020 01:06:56 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Oct 2020 16:06:54 -0700", "from irvmail001.ir.intel.com ([163.33.26.43])\n by fmsmga001.fm.intel.com with ESMTP; 23 Oct 2020 16:06:51 -0700", "from sivswdev09.ir.intel.com (sivswdev09.ir.intel.com\n [10.237.217.48])\n by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n 09NN6pxX016556; Sat, 24 Oct 2020 00:06:51 +0100", "from sivswdev09.ir.intel.com (localhost [127.0.0.1])\n by sivswdev09.ir.intel.com with ESMTP id 09NN6o7R007423;\n Sat, 24 Oct 2020 00:06:50 +0100", "(from lma25@localhost)\n by sivswdev09.ir.intel.com with LOCAL id 09NN6o6v007419;\n Sat, 24 Oct 2020 00:06:50 +0100" ], "IronPort-SDR": [ "\n VKT6zVXFVBJvGiCIlW2M369tm/lDlj2BILYPHCEoCOlYxmphyUIiYDdf7Mv3MnSxBMMNWtmqIG\n KVCvSd6o4GUg==", "\n QcfzS8sU620Tp8zhorcZwuEXiTjrjf5+XDtgSgCl7clgMeoU7ynUGWy9cwwMrcnEfxdgzi4oSr\n fyzNBs/OajBw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9783\"; a=\"165148701\"", "E=Sophos;i=\"5.77,410,1596524400\"; d=\"scan'208\";a=\"165148701\"", "E=Sophos;i=\"5.77,410,1596524400\"; d=\"scan'208\";a=\"423554218\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Liang Ma <liang.j.ma@intel.com>", "To": "dev@dpdk.org", "Cc": "anatoly.burakov@intel.com, viktorin@rehivetech.com, qi.z.zhang@intel.com,\n ruifeng.wang@arm.com, beilei.xing@intel.com, jia.guo@intel.com,\n qiming.yang@intel.com, haiyue.wang@intel.com,\n bruce.richardson@intel.com, konstantin.ananyev@intel.com,\n david.hunt@intel.com, jerinjacobk@gmail.com, nhorman@tuxdriver.com,\n thomas@monjalon.net, timothy.mcdaniel@intel.com, gage.eads@intel.com,\n drc@linux.vnet.ibm.com, Liang Ma <liang.j.ma@intel.com>", "Date": "Sat, 24 Oct 2020 00:06:30 +0100", "Message-Id": "<1603494392-7181-9-git-send-email-liang.j.ma@intel.com>", "X-Mailer": "git-send-email 1.7.7.4", "In-Reply-To": [ "<1603494392-7181-1-git-send-email-liang.j.ma@intel.com>", "<1603473432-11153-1-git-send-email-liang.j.ma@intel.com>" ], "References": [ "<n>\n <1603494392-7181-1-git-send-email-liang.j.ma@intel.com>", "<1603473432-11153-1-git-send-email-liang.j.ma@intel.com>" ], "Subject": "[dpdk-dev] [PATCH v9 08/10] net/ice: implement power management API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Implement support for the power management API by implementing a\n`get_wake_addr` function that will return an address of an RX ring's\nstatus bit.\n\nSigned-off-by: Liang Ma <liang.j.ma@intel.com>\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 1 +\n drivers/net/ice/ice_rxtx.c | 26 ++++++++++++++++++++++++++\n drivers/net/ice/ice_rxtx.h | 2 ++\n 3 files changed, 29 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex c65125ff32..54f185ad4d 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -216,6 +216,7 @@ static const struct eth_dev_ops ice_eth_dev_ops = {\n \t.udp_tunnel_port_add = ice_dev_udp_tunnel_port_add,\n \t.udp_tunnel_port_del = ice_dev_udp_tunnel_port_del,\n \t.tx_done_cleanup = ice_tx_done_cleanup,\n+\t.get_wake_addr\t = ice_get_wake_addr,\n };\n \n /* store statistics names and its offset in stats structure */\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex ee576c362a..fafd6ada62 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -26,6 +26,32 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;\n uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;\n uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;\n \n+int ice_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr,\n+\t\tuint64_t *expected, uint64_t *mask, uint8_t *data_sz)\n+{\n+\tvolatile union ice_rx_flex_desc *rxdp;\n+\tstruct ice_rx_queue *rxq = rx_queue;\n+\tuint16_t desc;\n+\n+\tdesc = rxq->rx_tail;\n+\trxdp = &rxq->rx_ring[desc];\n+\t/* watch for changes in status bit */\n+\t*tail_desc_addr = &rxdp->wb.status_error0;\n+\n+\t/*\n+\t * we expect the DD bit to be set to 1 if this descriptor was already\n+\t * written to.\n+\t */\n+\t*expected = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n+\t*mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);\n+\n+\t/* register is 16-bit */\n+\t*data_sz = 2;\n+\n+\treturn 0;\n+}\n+\n+\n static inline uint8_t\n ice_proto_xtr_type_to_rxdid(uint8_t xtr_type)\n {\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex 1c23c7541e..7eeb8d467e 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -250,6 +250,8 @@ uint16_t ice_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t\tuint16_t nb_pkts);\n int ice_fdir_programming(struct ice_pf *pf, struct ice_fltr_desc *fdir_desc);\n int ice_tx_done_cleanup(void *txq, uint32_t free_cnt);\n+int ice_get_wake_addr(void *rx_queue, volatile void **tail_desc_addr,\n+\t\tuint64_t *expected, uint64_t *mask, uint8_t *data_sz);\n \n #define FDIR_PARSING_ENABLE_PER_QUEUE(ad, on) do { \\\n \tint i; \\\n", "prefixes": [ "v9", "08/10" ] }