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GET /api/patches/81953/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 81953,
    "url": "http://patches.dpdk.org/api/patches/81953/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603473675-12199-1-git-send-email-liang.j.ma@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1603473675-12199-1-git-send-email-liang.j.ma@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1603473675-12199-1-git-send-email-liang.j.ma@intel.com",
    "date": "2020-10-23T17:21:15",
    "name": "[v8,03/10] eal: add intrinsics support check infrastructure",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a84693a27c44197363c0b980e4dd97f049ab5e0b",
    "submitter": {
        "id": 904,
        "url": "http://patches.dpdk.org/api/people/904/?format=api",
        "name": "Liang, Ma",
        "email": "liang.j.ma@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603473675-12199-1-git-send-email-liang.j.ma@intel.com/mbox/",
    "series": [
        {
            "id": 13275,
            "url": "http://patches.dpdk.org/api/series/13275/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13275",
            "date": "2020-10-23T17:21:15",
            "name": null,
            "version": 8,
            "mbox": "http://patches.dpdk.org/series/13275/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/81953/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/81953/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 449FFA04DD;\n\tFri, 23 Oct 2020 19:21:33 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 23E005AAE;\n\tFri, 23 Oct 2020 19:21:32 +0200 (CEST)",
            "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by dpdk.org (Postfix) with ESMTP id 4D9335AA4\n for <dev@dpdk.org>; Fri, 23 Oct 2020 19:21:29 +0200 (CEST)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Oct 2020 10:21:21 -0700",
            "from irvmail001.ir.intel.com ([163.33.26.43])\n by fmsmga002.fm.intel.com with ESMTP; 23 Oct 2020 10:21:18 -0700",
            "from sivswdev09.ir.intel.com (sivswdev09.ir.intel.com\n [10.237.217.48])\n by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n 09NHLId9014005; Fri, 23 Oct 2020 18:21:18 +0100",
            "from sivswdev09.ir.intel.com (localhost [127.0.0.1])\n by sivswdev09.ir.intel.com with ESMTP id 09NHLH7e012243;\n Fri, 23 Oct 2020 18:21:17 +0100",
            "(from lma25@localhost)\n by sivswdev09.ir.intel.com with LOCAL id 09NHLHa1012239;\n Fri, 23 Oct 2020 18:21:17 +0100"
        ],
        "IronPort-SDR": [
            "\n vICgzUZE4Jf6qhEhpqwoS5Lwy92dGCJ/Re50nQzo0rk8B/CmZUZOjHBxPaZzN418UzRa1C2qnX\n z5E+2gVmKl7A==",
            "\n wNYgxhBskPZcY73gzWtUl+Fi+0E4KzRxnLrxcV7lvJn1TlzxLRYv2ITlfufgChhOJfK/+hhHfc\n Qj6QxO3nR/9g=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9782\"; a=\"229342968\"",
            "E=Sophos;i=\"5.77,409,1596524400\"; d=\"scan'208\";a=\"229342968\"",
            "E=Sophos;i=\"5.77,409,1596524400\"; d=\"scan'208\";a=\"354505847\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Liang Ma <liang.j.ma@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "anatoly.burakov@intel.com, viktorin@rehivetech.com, ruifeng.wang@arm.com,\n drc@linux.vnet.ibm.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, david.hunt@intel.com,\n jerinjacobk@gmail.com, thomas@monjalon.net, timothy.mcdaniel@intel.com,\n gage.eads@intel.com, mdr@ashroe.eu, nhorman@tuxdriver.com,\n Liang Ma <liang.j.ma@intel.com>",
        "Date": "Fri, 23 Oct 2020 18:21:15 +0100",
        "Message-Id": "<1603473675-12199-1-git-send-email-liang.j.ma@intel.com>",
        "X-Mailer": "git-send-email 1.7.7.4",
        "In-Reply-To": "\n <da3fe4e5bbe976882c56a71d20a9055c1600e6aa.1602763439.git.anatoly.burakov@intel.com>",
        "References": "\n <da3fe4e5bbe976882c56a71d20a9055c1600e6aa.1602763439.git.anatoly.burakov@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v8 03/10] eal: add intrinsics support check\n\tinfrastructure",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Currently, it is not possible to check support for intrinsics that\nare platform-specific, cannot be abstracted in a generic way, or do not\nhave support on all architectures. The CPUID flags can be used to some\nextent, but they are only defined for their platform, while intrinsics\nwill be available to all code as they are in generic headers.\n\nThis patch introduces infrastructure to check support for certain\nplatform-specific intrinsics, and adds support for checking support for\nIA power management-related intrinsics for UMWAIT/UMONITOR and TPAUSE.\n\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\nSigned-off-by: Liang Ma <liang.j.ma@intel.com>\nAcked-by: David Christensen <drc@linux.vnet.ibm.com>\nAcked-by: Jerin Jacob <jerinj@marvell.com>\nAcked-by: Ruifeng Wang <ruifeng.wang@arm.com>\nAcked-by: Ray Kinsella <mdr@ashroe.eu>\n---\n\nNotes:\n    v6:\n    - Fix the comments\n    v8:\n    - Rename eal version.map\n---\n lib/librte_eal/arm/rte_cpuflags.c             |  6 +++++\n lib/librte_eal/include/generic/rte_cpuflags.h | 26 +++++++++++++++++++\n .../include/generic/rte_power_intrinsics.h    | 12 +++++++++\n lib/librte_eal/ppc/rte_cpuflags.c             |  7 +++++\n lib/librte_eal/version.map                    |  1 +\n lib/librte_eal/x86/rte_cpuflags.c             | 12 +++++++++\n 6 files changed, 64 insertions(+)",
    "diff": "diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c\nindex 7b257b7873..e3a53bcece 100644\n--- a/lib/librte_eal/arm/rte_cpuflags.c\n+++ b/lib/librte_eal/arm/rte_cpuflags.c\n@@ -151,3 +151,9 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\n \t\treturn NULL;\n \treturn rte_cpu_feature_table[feature].name;\n }\n+\n+void\n+rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)\n+{\n+\tmemset(intrinsics, 0, sizeof(*intrinsics));\n+}\ndiff --git a/lib/librte_eal/include/generic/rte_cpuflags.h b/lib/librte_eal/include/generic/rte_cpuflags.h\nindex 872f0ebe3e..28a5aecde8 100644\n--- a/lib/librte_eal/include/generic/rte_cpuflags.h\n+++ b/lib/librte_eal/include/generic/rte_cpuflags.h\n@@ -13,6 +13,32 @@\n #include \"rte_common.h\"\n #include <errno.h>\n \n+#include <rte_compat.h>\n+\n+/**\n+ * Structure used to describe platform-specific intrinsics that may or may not\n+ * be supported at runtime.\n+ */\n+struct rte_cpu_intrinsics {\n+\tuint32_t power_monitor : 1;\n+\t/**< indicates support for rte_power_monitor function */\n+\tuint32_t power_pause : 1;\n+\t/**< indicates support for rte_power_pause function */\n+};\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice\n+ *\n+ * Check CPU support for various intrinsics at runtime.\n+ *\n+ * @param intrinsics\n+ *     Pointer to a structure to be filled.\n+ */\n+__rte_experimental\n+void\n+rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics);\n+\n /**\n  * Enumeration of all CPU features supported\n  */\ndiff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/librte_eal/include/generic/rte_power_intrinsics.h\nindex fb897d9060..03a326f076 100644\n--- a/lib/librte_eal/include/generic/rte_power_intrinsics.h\n+++ b/lib/librte_eal/include/generic/rte_power_intrinsics.h\n@@ -32,6 +32,10 @@\n  * checked against the expected value, and if they match, the entering of\n  * optimized power state may be aborted.\n  *\n+ * @warning It is responsibility of the user to check if this function is\n+ *   supported at runtime using `rte_cpu_get_features()` API call. Failing to do\n+ *   so may result in an illegal CPU instruction error.\n+ *\n  * @param p\n  *   Address to monitor for changes.\n  * @param expected_value\n@@ -69,6 +73,10 @@ static inline void rte_power_monitor(const volatile void *p,\n  * This call will also lock a spinlock on entering sleep, and release it on\n  * waking up the CPU.\n  *\n+ * @warning It is responsibility of the user to check if this function is\n+ *   supported at runtime using `rte_cpu_get_features()` API call. Failing to do\n+ *   so may result in an illegal CPU instruction error.\n+ *\n  * @param p\n  *   Address to monitor for changes.\n  * @param expected_value\n@@ -101,6 +109,10 @@ static inline void rte_power_monitor_sync(const volatile void *p,\n  * Enter an architecture-defined optimized power state until a certain TSC\n  * timestamp is reached.\n  *\n+ * @warning It is responsibility of the user to check if this function is\n+ *   supported at runtime using `rte_cpu_get_features()` API call. Failing to do\n+ *   so may result in an illegal CPU instruction error.\n+ *\n  * @param tsc_timestamp\n  *   Maximum TSC timestamp to wait for. Note that the wait behavior is\n  *   architecture-dependent.\ndiff --git a/lib/librte_eal/ppc/rte_cpuflags.c b/lib/librte_eal/ppc/rte_cpuflags.c\nindex 3bb7563ce9..61db5c216d 100644\n--- a/lib/librte_eal/ppc/rte_cpuflags.c\n+++ b/lib/librte_eal/ppc/rte_cpuflags.c\n@@ -8,6 +8,7 @@\n #include <elf.h>\n #include <fcntl.h>\n #include <assert.h>\n+#include <string.h>\n #include <unistd.h>\n \n /* Symbolic values for the entries in the auxiliary table */\n@@ -108,3 +109,9 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\n \t\treturn NULL;\n \treturn rte_cpu_feature_table[feature].name;\n }\n+\n+void\n+rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)\n+{\n+\tmemset(intrinsics, 0, sizeof(*intrinsics));\n+}\ndiff --git a/lib/librte_eal/version.map b/lib/librte_eal/version.map\nindex c23ff57ce6..269cdccfd3 100644\n--- a/lib/librte_eal/version.map\n+++ b/lib/librte_eal/version.map\n@@ -402,6 +402,7 @@ EXPERIMENTAL {\n \trte_service_lcore_may_be_active;\n \trte_vect_get_max_simd_bitwidth;\n \trte_vect_set_max_simd_bitwidth;\n+\trte_cpu_get_intrinsics_support;\n };\n \n INTERNAL {\ndiff --git a/lib/librte_eal/x86/rte_cpuflags.c b/lib/librte_eal/x86/rte_cpuflags.c\nindex 0325c4b93b..a96312ff7f 100644\n--- a/lib/librte_eal/x86/rte_cpuflags.c\n+++ b/lib/librte_eal/x86/rte_cpuflags.c\n@@ -7,6 +7,7 @@\n #include <stdio.h>\n #include <errno.h>\n #include <stdint.h>\n+#include <string.h>\n \n #include \"rte_cpuid.h\"\n \n@@ -179,3 +180,14 @@ rte_cpu_get_flag_name(enum rte_cpu_flag_t feature)\n \t\treturn NULL;\n \treturn rte_cpu_feature_table[feature].name;\n }\n+\n+void\n+rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)\n+{\n+\tmemset(intrinsics, 0, sizeof(*intrinsics));\n+\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_WAITPKG)) {\n+\t\tintrinsics->power_monitor = 1;\n+\t\tintrinsics->power_pause = 1;\n+\t}\n+}\n",
    "prefixes": [
        "v8",
        "03/10"
    ]
}