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GET /api/patches/81872/?format=api
{ "id": 81872, "url": "http://patches.dpdk.org/api/patches/81872/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1603437295-119083-5-git-send-email-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1603437295-119083-5-git-send-email-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1603437295-119083-5-git-send-email-suanmingm@nvidia.com", "date": "2020-10-23T07:14:34", "name": "[v2,04/25] net/mlx5: indexed pool supports zero size entry", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d2efd64703450856c2d6966a220dc55e5a7c41b6", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1603437295-119083-5-git-send-email-suanmingm@nvidia.com/mbox/", "series": [ { "id": 13250, "url": "http://patches.dpdk.org/api/series/13250/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13250", "date": "2020-10-23T07:14:30", "name": "*net/mlx5: support multiple-thread flow operations", "version": 2, "mbox": "http://patches.dpdk.org/series/13250/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81872/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81872/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 014E2A04DE;\n\tFri, 23 Oct 2020 09:16:42 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7844A7CC8;\n\tFri, 23 Oct 2020 09:15:42 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id E0E0372F1\n for <dev@dpdk.org>; Fri, 23 Oct 2020 09:15:13 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n suanmingm@nvidia.com) with SMTP; 23 Oct 2020 10:15:11 +0300", "from nvidia.com (mtbc-r640-04.mtbc.labs.mlnx [10.75.70.9])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09N7F2LN026736;\n Fri, 23 Oct 2020 10:15:09 +0300" ], "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Shahaf Shuler <shahafs@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Cc": "dev@dpdk.org, Xueming Li <xuemingl@nvidia.com>", "Date": "Fri, 23 Oct 2020 15:14:34 +0800", "Message-Id": "<1603437295-119083-5-git-send-email-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1603437295-119083-1-git-send-email-suanmingm@nvidia.com>", "References": "<1601984948-313027-1-git-send-email-suanmingm@nvidia.com>\n <1603437295-119083-1-git-send-email-suanmingm@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 04/25] net/mlx5: indexed pool supports zero\n\tsize entry", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Xueming Li <xuemingl@nvidia.com>\n\nTo make indexed pool to be used as ID generator, this patch allows entry\nsize to be zero.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5_utils.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c\nindex 9a54fda..3a1f87a 100644\n--- a/drivers/net/mlx5/mlx5_utils.c\n+++ b/drivers/net/mlx5/mlx5_utils.c\n@@ -230,7 +230,7 @@ struct mlx5_indexed_pool *\n \tstruct mlx5_indexed_pool *pool;\n \tuint32_t i;\n \n-\tif (!cfg || !cfg->size || (!cfg->malloc ^ !cfg->free) ||\n+\tif (!cfg || (!cfg->malloc ^ !cfg->free) ||\n \t (cfg->trunk_size && ((cfg->trunk_size & (cfg->trunk_size - 1)) ||\n \t ((__builtin_ffs(cfg->trunk_size) + TRUNK_IDX_BITS) > 32))))\n \t\treturn NULL;\n@@ -391,7 +391,7 @@ struct mlx5_indexed_pool *\n {\n \tvoid *entry = mlx5_ipool_malloc(pool, idx);\n \n-\tif (entry)\n+\tif (entry && pool->cfg.size)\n \t\tmemset(entry, 0, pool->cfg.size);\n \treturn entry;\n }\n", "prefixes": [ "v2", "04/25" ] }