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GET /api/patches/81647/?format=api
{ "id": 81647, "url": "http://patches.dpdk.org/api/patches/81647/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201020224846.1592682-17-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201020224846.1592682-17-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201020224846.1592682-17-qi.z.zhang@intel.com", "date": "2020-10-20T22:48:41", "name": "[16/21] net/ice/base: support extended GPIO access", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "19b866e580eed68bf01875614fcb4d6b93acfb9f", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201020224846.1592682-17-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 13156, "url": "http://patches.dpdk.org/api/series/13156/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13156", "date": "2020-10-20T22:48:25", "name": "ice: update base code", "version": 1, "mbox": "http://patches.dpdk.org/series/13156/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81647/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81647/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8D586A04DD;\n\tWed, 21 Oct 2020 00:50:00 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id D4F5BAD12;\n\tWed, 21 Oct 2020 00:45:30 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 66A2BACE7\n for <dev@dpdk.org>; Wed, 21 Oct 2020 00:45:15 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Oct 2020 15:45:14 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga005.jf.intel.com with ESMTP; 20 Oct 2020 15:45:13 -0700" ], "IronPort-SDR": [ "\n X2NJrcaa9TZB+SNmkYFefVC+JtNbrqVZGQfd0nFuX+cRQqWG3RqX2SWfyJSu5qtPWUmwaCbPxL\n GwWPqVrZZ2mg==", "\n 4vsMUFkjHyiTvjJqxVmSbmfVNy/VxMNDAknSpC7z0Nq/JiCcxfKgnoun1XpBuX2V99xmaC0ATm\n UPIpD8M3KM0w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9780\"; a=\"166510631\"", "E=Sophos;i=\"5.77,399,1596524400\"; d=\"scan'208\";a=\"166510631\"", "E=Sophos;i=\"5.77,399,1596524400\"; d=\"scan'208\";a=\"533254700\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Amir Shay <shay.amir@intel.com>", "Date": "Wed, 21 Oct 2020 06:48:41 +0800", "Message-Id": "<20201020224846.1592682-17-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.4", "In-Reply-To": "<20201020224846.1592682-1-qi.z.zhang@intel.com>", "References": "<20201020224846.1592682-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 16/21] net/ice/base: support extended GPIO access", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Added two new admin commands called: SW Set GPIO and SW Get GPIO\n(0x6EF and 0x6F0 respectively) which extends GPIO handling\ncapabilities by SW driver\n\nSigned-off-by: Amir Shay <shay.amir@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 18 ++++++++++++++++++\n 1 file changed, 18 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex c105a445ee..f715fb0910 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1635,6 +1635,22 @@ struct ice_aqc_sff_eeprom {\n \t__le32 addr_low;\n };\n \n+/* SW Set GPIO command (indirect 0x6EF)\n+ * SW Get GPIO command (indirect 0x6F0)\n+ */\n+struct ice_aqc_sw_gpio {\n+\t__le16 gpio_ctrl_handle;\n+#define ICE_AQC_SW_GPIO_CONTROLLER_HANDLE_S\t0\n+#define ICE_AQC_SW_GPIO_CONTROLLER_HANDLE_M\t(0x3FF << ICE_AQC_SW_GPIO_CONTROLLER_HANDLE_S)\n+\tu8 gpio_num;\n+#define ICE_AQC_SW_GPIO_NUMBER_S\t0\n+#define ICE_AQC_SW_GPIO_NUMBER_M\t(0x1F << ICE_AQC_SW_GPIO_NUMBER_S)\n+\tu8 gpio_params;\n+#define ICE_AQC_SW_GPIO_PARAMS_DIRECTION BIT(1)\n+#define ICE_AQC_SW_GPIO_PARAMS_VALUE BIT(0)\n+\tu8 rsvd[12];\n+};\n+\n /* NVM Read command (indirect 0x0701)\n * NVM Erase commands (direct 0x0702)\n * NVM Write commands (indirect 0x0703)\n@@ -2925,6 +2941,8 @@ enum ice_adminq_opc {\n \tice_aqc_opc_set_gpio\t\t\t\t= 0x06EC,\n \tice_aqc_opc_get_gpio\t\t\t\t= 0x06ED,\n \tice_aqc_opc_sff_eeprom\t\t\t\t= 0x06EE,\n+\tice_aqc_opc_sw_set_gpio\t\t\t\t= 0x06EF,\n+\tice_aqc_opc_sw_get_gpio\t\t\t\t= 0x06F0,\n \n \t/* NVM commands */\n \tice_aqc_opc_nvm_read\t\t\t\t= 0x0701,\n", "prefixes": [ "16/21" ] }