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GET /api/patches/81642/?format=api
{ "id": 81642, "url": "http://patches.dpdk.org/api/patches/81642/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201020224846.1592682-12-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201020224846.1592682-12-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201020224846.1592682-12-qi.z.zhang@intel.com", "date": "2020-10-20T22:48:36", "name": "[11/21] net/ice/base: add support for class 5+ modules", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4632459b81b3c90312476788f1a52c1eedb3c320", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201020224846.1592682-12-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 13156, "url": "http://patches.dpdk.org/api/series/13156/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13156", "date": "2020-10-20T22:48:25", "name": "ice: update base code", "version": 1, "mbox": "http://patches.dpdk.org/series/13156/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81642/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81642/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5EEAFA04DD;\n\tWed, 21 Oct 2020 00:48:33 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 219EBACEC;\n\tWed, 21 Oct 2020 00:45:22 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 58845ACBC\n for <dev@dpdk.org>; Wed, 21 Oct 2020 00:45:07 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Oct 2020 15:45:06 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga005.jf.intel.com with ESMTP; 20 Oct 2020 15:45:05 -0700" ], "IronPort-SDR": [ "\n 3iS7u4PiJNFIVeanpkVf7YDJ4xxUVxBlJ/aaM01ECt8NLYfj8kytXXNPIBgDcdmQqbCrY2NklA\n 4m8WKp0S+8zA==", "\n nHJkjQlDN9ZIgws3Gz+M2O7BZQmfkFsDkNkzXNcGMw8yA33gT91sPRH/rI/whBxqRTpRJib51x\n WKt8SgqCIR7Q==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9780\"; a=\"166510617\"", "E=Sophos;i=\"5.77,399,1596524400\"; d=\"scan'208\";a=\"166510617\"", "E=Sophos;i=\"5.77,399,1596524400\"; d=\"scan'208\";a=\"533254630\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Amir Shay <shay.amir@intel.com>", "Date": "Wed, 21 Oct 2020 06:48:36 +0800", "Message-Id": "<20201020224846.1592682-12-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.4", "In-Reply-To": "<20201020224846.1592682-1-qi.z.zhang@intel.com>", "References": "<20201020224846.1592682-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 11/21] net/ice/base: add support for class 5+\n\tmodules", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently QSFP/SFP modules up to power class 4 are supported.\n100G modules require higher power in many cases.\nAlso, low power mode requires support of power classes 7 and even 8.\n\nThis change extends \"Get Link Status\" AQ command (0x0607) to\nsupport class 5+ modules.\n\nThe patch also add couple other missing bits for link status.\n\nSigned-off-by: Amir Shay <shay.amir@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_adminq_cmd.h | 6 +++++-\n 1 file changed, 5 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h\nindex cadd6df384..3b75cf577a 100644\n--- a/drivers/net/ice/base/ice_adminq_cmd.h\n+++ b/drivers/net/ice/base/ice_adminq_cmd.h\n@@ -1442,6 +1442,10 @@ struct ice_aqc_get_link_status_data {\n #define ICE_AQ_LINK_TOPO_UNSUPP_MEDIA\tBIT(7)\n \tu8 link_cfg_err;\n #define ICE_AQ_LINK_CFG_ERR\t\tBIT(0)\n+#define ICE_AQ_LINK_ACT_PORT_OPT_INVAL\tBIT(2)\n+#define ICE_AQ_LINK_FEAT_ID_OR_CONFIG_ID_INVAL\tBIT(3)\n+#define ICE_AQ_LINK_TOPO_CRITICAL_SDP_ERR\tBIT(4)\n+#define ICE_AQ_LINK_MODULE_POWER_UNSUPPORTED\tBIT(5)\n \tu8 link_info;\n #define ICE_AQ_LINK_UP\t\t\tBIT(0)\t/* Link Status */\n #define ICE_AQ_LINK_FAULT\t\tBIT(1)\n@@ -1489,7 +1493,7 @@ struct ice_aqc_get_link_status_data {\n #define ICE_AQ_CFG_PACING_TYPE_FIXED\tICE_AQ_CFG_PACING_TYPE_M\n \t/* External Device Power Ability */\n \tu8 power_desc;\n-#define ICE_AQ_PWR_CLASS_M\t\t0x3\n+#define ICE_AQ_PWR_CLASS_M\t\t0x3F\n #define ICE_AQ_LINK_PWR_BASET_LOW_HIGH\t0\n #define ICE_AQ_LINK_PWR_BASET_HIGH\t1\n #define ICE_AQ_LINK_PWR_QSFP_CLASS_1\t0\n", "prefixes": [ "11/21" ] }