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GET /api/patches/81580/?format=api
{ "id": 81580, "url": "http://patches.dpdk.org/api/patches/81580/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201020105153.19690-3-leyi.rong@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201020105153.19690-3-leyi.rong@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201020105153.19690-3-leyi.rong@intel.com", "date": "2020-10-20T10:51:52", "name": "[v3,2/3] net/ice: add RSS hash parsing in AVX512 path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7ce84ab3b972edd838c6ce90f24c858c4f94fc2c", "submitter": { "id": 1204, "url": "http://patches.dpdk.org/api/people/1204/?format=api", "name": "Leyi Rong", "email": "leyi.rong@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201020105153.19690-3-leyi.rong@intel.com/mbox/", "series": [ { "id": 13141, "url": "http://patches.dpdk.org/api/series/13141/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13141", "date": "2020-10-20T10:51:50", "name": "AVX512 vPMD on ice", "version": 3, "mbox": "http://patches.dpdk.org/series/13141/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81580/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81580/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BC326A04DC;\n\tTue, 20 Oct 2020 13:14:47 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 840F2BC00;\n\tTue, 20 Oct 2020 13:14:13 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 143B3BBEE\n for <dev@dpdk.org>; Tue, 20 Oct 2020 13:14:08 +0200 (CEST)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 20 Oct 2020 04:14:08 -0700", "from dpdk-lrong-srv-04.sh.intel.com ([10.67.119.221])\n by orsmga004.jf.intel.com with ESMTP; 20 Oct 2020 04:14:07 -0700" ], "IronPort-SDR": [ "\n hKnWqGId0CcVIXGkZDiF8fVvyMTVA4+r/ktuk0VdxOYWBtYIOGldE77dNAinR1PKEdAVH+hDcG\n s513nUB4gXfQ==", "\n 1azUpo9kpaiUddIFgxQa6z1Ycid7P6Vt9iEt6BMxMckPyb0SEQvqRWp/3jdO94uIdSwfSt8fU6\n oXGwndHtGX4g==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9779\"; a=\"163700310\"", "E=Sophos;i=\"5.77,396,1596524400\"; d=\"scan'208\";a=\"163700310\"", "E=Sophos;i=\"5.77,396,1596524400\"; d=\"scan'208\";a=\"465895834\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Leyi Rong <leyi.rong@intel.com>", "To": "bruce.richardson@intel.com,\n\twenzhuo.lu@intel.com,\n\tqi.z.zhang@intel.com", "Cc": "dev@dpdk.org,\n\tLeyi Rong <leyi.rong@intel.com>", "Date": "Tue, 20 Oct 2020 18:51:52 +0800", "Message-Id": "<20201020105153.19690-3-leyi.rong@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20201020105153.19690-1-leyi.rong@intel.com>", "References": "<20200910065504.104217-1-leyi.rong@intel.com>\n <20201020105153.19690-1-leyi.rong@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 2/3] net/ice: add RSS hash parsing in AVX512\n\tpath", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Support RSS hash parsing in AVX512 data path as the default\nRXDID is set to #22, that means the RSS hash field locates\nin the 2nd 16B of each Flex Rx descriptor.\n\nSigned-off-by: Leyi Rong <leyi.rong@intel.com>\n---\n drivers/net/ice/ice_rxtx_vec_avx512.c | 105 ++++++++++++++++++++++++--\n 1 file changed, 98 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c\nindex 6a9d0a8eaa..a2a5d9987a 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx512.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c\n@@ -176,8 +176,8 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,\n \t/* mask to shuffle from desc. to mbuf (4 descriptors)*/\n \tconst __m512i shuf_msk =\n \t\t_mm512_set4_epi32\n-\t\t\t(/* octet 12~15, 32 bits rss */\n-\t\t\t 15 << 24 | 14 << 16 | 13 << 8 | 12,\n+\t\t\t(/* rss hash parsed separately */\n+\t\t\t 0xFFFFFFFF,\n \t\t\t /* octet 10~11, 16 bits vlan_macip */\n \t\t\t /* octet 4~5, 16 bits data_len */\n \t\t\t 11 << 24 | 10 << 16 | 5 << 8 | 4,\n@@ -399,6 +399,11 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,\n \t\tmb4_7 = _mm512_mask_blend_epi32(0x1111, mb4_7, ptype4_7);\n \t\tmb0_3 = _mm512_mask_blend_epi32(0x1111, mb0_3, ptype0_3);\n \n+\t\t__m256i mb4_5 = _mm512_extracti64x4_epi64(mb4_7, 0);\n+\t\t__m256i mb6_7 = _mm512_extracti64x4_epi64(mb4_7, 1);\n+\t\t__m256i mb0_1 = _mm512_extracti64x4_epi64(mb0_3, 0);\n+\t\t__m256i mb2_3 = _mm512_extracti64x4_epi64(mb0_3, 1);\n+\n \t\t/**\n \t\t * use permute/extract to get status content\n \t\t * After the operations, the packets status flags are in the\n@@ -438,6 +443,97 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,\n \t\t/* merge flags */\n \t\tconst __m256i mbuf_flags = _mm256_or_si256(l3_l4_flags,\n \t\t\t\trss_vlan_flags);\n+\n+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n+\t\t/**\n+\t\t * needs to load 2nd 16B of each desc for RSS hash parsing,\n+\t\t * will cause performance drop to get into this context.\n+\t\t */\n+\t\tif (rxq->vsi->adapter->eth_dev->data->dev_conf.rxmode.offloads &\n+\t\t\t\tDEV_RX_OFFLOAD_RSS_HASH) {\n+\t\t\t/* load bottom half of every 32B desc */\n+\t\t\tconst __m128i raw_desc_bh7 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[7].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh6 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[6].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh5 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[5].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh4 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[4].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh3 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[3].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh2 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[2].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh1 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[1].wb.status_error1));\n+\t\t\trte_compiler_barrier();\n+\t\t\tconst __m128i raw_desc_bh0 =\n+\t\t\t\t_mm_load_si128\n+\t\t\t\t\t((void *)(&rxdp[0].wb.status_error1));\n+\n+\t\t\t__m256i raw_desc_bh6_7 =\n+\t\t\t\t_mm256_inserti128_si256\n+\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh6),\n+\t\t\t\t\traw_desc_bh7, 1);\n+\t\t\t__m256i raw_desc_bh4_5 =\n+\t\t\t\t_mm256_inserti128_si256\n+\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh4),\n+\t\t\t\t\traw_desc_bh5, 1);\n+\t\t\t__m256i raw_desc_bh2_3 =\n+\t\t\t\t_mm256_inserti128_si256\n+\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh2),\n+\t\t\t\t\traw_desc_bh3, 1);\n+\t\t\t__m256i raw_desc_bh0_1 =\n+\t\t\t\t_mm256_inserti128_si256\n+\t\t\t\t\t(_mm256_castsi128_si256(raw_desc_bh0),\n+\t\t\t\t\traw_desc_bh1, 1);\n+\n+\t\t\t/**\n+\t\t\t * to shift the 32b RSS hash value to the\n+\t\t\t * highest 32b of each 128b before mask\n+\t\t\t */\n+\t\t\t__m256i rss_hash6_7 =\n+\t\t\t\t_mm256_slli_epi64(raw_desc_bh6_7, 32);\n+\t\t\t__m256i rss_hash4_5 =\n+\t\t\t\t_mm256_slli_epi64(raw_desc_bh4_5, 32);\n+\t\t\t__m256i rss_hash2_3 =\n+\t\t\t\t_mm256_slli_epi64(raw_desc_bh2_3, 32);\n+\t\t\t__m256i rss_hash0_1 =\n+\t\t\t\t_mm256_slli_epi64(raw_desc_bh0_1, 32);\n+\n+\t\t\t__m256i rss_hash_msk =\n+\t\t\t\t_mm256_set_epi32(0xFFFFFFFF, 0, 0, 0,\n+\t\t\t\t\t\t 0xFFFFFFFF, 0, 0, 0);\n+\n+\t\t\trss_hash6_7 = _mm256_and_si256\n+\t\t\t\t\t(rss_hash6_7, rss_hash_msk);\n+\t\t\trss_hash4_5 = _mm256_and_si256\n+\t\t\t\t\t(rss_hash4_5, rss_hash_msk);\n+\t\t\trss_hash2_3 = _mm256_and_si256\n+\t\t\t\t\t(rss_hash2_3, rss_hash_msk);\n+\t\t\trss_hash0_1 = _mm256_and_si256\n+\t\t\t\t\t(rss_hash0_1, rss_hash_msk);\n+\n+\t\t\tmb6_7 = _mm256_or_si256(mb6_7, rss_hash6_7);\n+\t\t\tmb4_5 = _mm256_or_si256(mb4_5, rss_hash4_5);\n+\t\t\tmb2_3 = _mm256_or_si256(mb2_3, rss_hash2_3);\n+\t\t\tmb0_1 = _mm256_or_si256(mb0_1, rss_hash0_1);\n+\t\t} /* if() on RSS hash parsing */\n+#endif\n+\n \t\t/**\n \t\t * At this point, we have the 8 sets of flags in the low 16-bits\n \t\t * of each 32-bit value in vlan0.\n@@ -471,11 +567,6 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,\n \t\t\t\t\t _mm256_srli_si256(mbuf_flags, 4),\n \t\t\t\t\t 0x04);\n \n-\t\tconst __m256i mb4_5 = _mm512_extracti64x4_epi64(mb4_7, 0);\n-\t\tconst __m256i mb6_7 = _mm512_extracti64x4_epi64(mb4_7, 1);\n-\t\tconst __m256i mb0_1 = _mm512_extracti64x4_epi64(mb0_3, 0);\n-\t\tconst __m256i mb2_3 = _mm512_extracti64x4_epi64(mb0_3, 1);\n-\n \t\t/* permute to add in the rx_descriptor e.g. rss fields */\n \t\trearm6 = _mm256_permute2f128_si256(rearm6, mb6_7, 0x20);\n \t\trearm4 = _mm256_permute2f128_si256(rearm4, mb4_5, 0x20);\n", "prefixes": [ "v3", "2/3" ] }