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GET /api/patches/81334/?format=api
{ "id": 81334, "url": "http://patches.dpdk.org/api/patches/81334/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-52-jiawenwu@trustnetic.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201019085415.82207-52-jiawenwu@trustnetic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201019085415.82207-52-jiawenwu@trustnetic.com", "date": "2020-10-19T08:54:08", "name": "[v4,51/58] net/txgbe: add register dump support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "83be710a9274abce544ca10d43ebf5651340f6f0", "submitter": { "id": 1932, "url": "http://patches.dpdk.org/api/people/1932/?format=api", "name": "Jiawen Wu", "email": "jiawenwu@trustnetic.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201019085415.82207-52-jiawenwu@trustnetic.com/mbox/", "series": [ { "id": 13094, "url": "http://patches.dpdk.org/api/series/13094/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=13094", "date": "2020-10-19T08:53:17", "name": "net: txgbe PMD", "version": 4, "mbox": "http://patches.dpdk.org/series/13094/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/81334/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/81334/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 85FAEA04DC;\n\tMon, 19 Oct 2020 11:13:30 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E9602E27F;\n\tMon, 19 Oct 2020 10:54:14 +0200 (CEST)", "from qq.com (smtpbg554.qq.com [183.3.226.186])\n by dpdk.org (Postfix) with ESMTP id 43763C80C\n for <dev@dpdk.org>; Mon, 19 Oct 2020 10:53:37 +0200 (CEST)", "from localhost.localdomain.com (unknown [183.129.236.74])\n by esmtp6.qq.com (ESMTP) with\n id ; Mon, 19 Oct 2020 16:53:33 +0800 (CST)" ], "X-QQ-mid": "bizesmtp6t1603097613twv7kw9zp", "X-QQ-SSF": "01400000002000C0C000B00A0000000", "X-QQ-FEAT": "kuhMzgBNbeKit9oz7C6vbX+v7zpIc8tsiAO7BShnEt7BW6SEqbY51d4nVnH1+\n erV2iIIudYk9G4BCYvLfLd9OOyAefOjzCIa+eYFGugQ93VYHGhwx/nxfBF9FawmnBCRmcs1\n kiigjbpsHzAbOPoJNPtf8UuX6BKW0zvwaqXQotbAyuBOiuA6c2dCk43zpFgRmuzZS+OKCgQ\n NBkKgIJS/6++603reLvSaCJT2K+KPic8Go6a1QZ1dm8M/S3Rggii6+vm1B2HabNNuJF8X8f\n KlXmdttUXVkOgOc+c2ynPKfq9s+V3IRxyQYzK3ob258zS6l+voemFIEo/mwSt2OHjnd26ug\n G1UFhNcJZVw9QksuYvw0wc/5cTQlw==", "X-QQ-GoodBg": "2", "From": "Jiawen Wu <jiawenwu@trustnetic.com>", "To": "dev@dpdk.org", "Cc": "Jiawen Wu <jiawenwu@trustnetic.com>", "Date": "Mon, 19 Oct 2020 16:54:08 +0800", "Message-Id": "<20201019085415.82207-52-jiawenwu@trustnetic.com>", "X-Mailer": "git-send-email 2.18.4", "In-Reply-To": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "References": "<20201019085415.82207-1-jiawenwu@trustnetic.com>", "X-QQ-SENDSIZE": "520", "Feedback-ID": "bizesmtp:trustnetic.com:qybgweb:qybgweb11", "Subject": "[dpdk-dev] [PATCH v4 51/58] net/txgbe: add register dump support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add register dump support.\n\nSigned-off-by: Jiawen Wu <jiawenwu@trustnetic.com>\n---\n doc/guides/nics/features/txgbe.ini | 1 +\n drivers/net/txgbe/base/txgbe_type.h | 1 +\n drivers/net/txgbe/txgbe_ethdev.c | 113 +++++++++++++++++++++++++++\n drivers/net/txgbe/txgbe_regs_group.h | 54 +++++++++++++\n 4 files changed, 169 insertions(+)\n create mode 100644 drivers/net/txgbe/txgbe_regs_group.h", "diff": "diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini\nindex 08a412cf6..20a02706c 100644\n--- a/doc/guides/nics/features/txgbe.ini\n+++ b/doc/guides/nics/features/txgbe.ini\n@@ -41,6 +41,7 @@ Stats per queue = Y\n FW version = Y\n EEPROM dump = Y\n Module EEPROM dump = Y\n+Registers dump = Y\n Multiprocess aware = Y\n Linux UIO = Y\n Linux VFIO = Y\ndiff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h\nindex ac36cb22d..b322a2cac 100644\n--- a/drivers/net/txgbe/base/txgbe_type.h\n+++ b/drivers/net/txgbe/base/txgbe_type.h\n@@ -665,6 +665,7 @@ struct txgbe_hw {\n \tu16 vendor_id;\n \tu16 subsystem_device_id;\n \tu16 subsystem_vendor_id;\n+\tu8 revision_id;\n \tbool adapter_stopped;\n \tbool allow_unsupported_sfp;\n \tbool need_crosstalk_fix;\ndiff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c\nindex e48fad576..86d0a5ac9 100644\n--- a/drivers/net/txgbe/txgbe_ethdev.c\n+++ b/drivers/net/txgbe/txgbe_ethdev.c\n@@ -21,6 +21,72 @@\n #include \"base/txgbe.h\"\n #include \"txgbe_ethdev.h\"\n #include \"txgbe_rxtx.h\"\n+#include \"txgbe_regs_group.h\"\n+\n+static const struct reg_info txgbe_regs_general[] = {\n+\t{TXGBE_RST, 1, 1, \"TXGBE_RST\"},\n+\t{TXGBE_STAT, 1, 1, \"TXGBE_STAT\"},\n+\t{TXGBE_PORTCTL, 1, 1, \"TXGBE_PORTCTL\"},\n+\t{TXGBE_SDP, 1, 1, \"TXGBE_SDP\"},\n+\t{TXGBE_SDPCTL, 1, 1, \"TXGBE_SDPCTL\"},\n+\t{TXGBE_LEDCTL, 1, 1, \"TXGBE_LEDCTL\"},\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_nvm[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_interrupt[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_fctl_others[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_rxdma[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_rx[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static struct reg_info txgbe_regs_tx[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_wakeup[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_dcb[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_mac[] = {\n+\t{0, 0, 0, \"\"}\n+};\n+\n+static const struct reg_info txgbe_regs_diagnostic[] = {\n+\t{0, 0, 0, \"\"},\n+};\n+\n+/* PF registers */\n+static const struct reg_info *txgbe_regs_others[] = {\n+\t\t\t\ttxgbe_regs_general,\n+\t\t\t\ttxgbe_regs_nvm,\n+\t\t\t\ttxgbe_regs_interrupt,\n+\t\t\t\ttxgbe_regs_fctl_others,\n+\t\t\t\ttxgbe_regs_rxdma,\n+\t\t\t\ttxgbe_regs_rx,\n+\t\t\t\ttxgbe_regs_tx,\n+\t\t\t\ttxgbe_regs_wakeup,\n+\t\t\t\ttxgbe_regs_dcb,\n+\t\t\t\ttxgbe_regs_mac,\n+\t\t\t\ttxgbe_regs_diagnostic,\n+\t\t\t\tNULL};\n \n static int txgbe_dev_set_link_up(struct rte_eth_dev *dev);\n static int txgbe_dev_set_link_down(struct rte_eth_dev *dev);\n@@ -3414,6 +3480,52 @@ txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,\n \t\t\t\t\t txgbe_dev_addr_list_itr, TRUE);\n }\n \n+static int\n+txgbe_get_reg_length(struct rte_eth_dev *dev __rte_unused)\n+{\n+\tint count = 0;\n+\tint g_ind = 0;\n+\tconst struct reg_info *reg_group;\n+\tconst struct reg_info **reg_set = txgbe_regs_others;\n+\n+\twhile ((reg_group = reg_set[g_ind++]))\n+\t\tcount += txgbe_regs_group_count(reg_group);\n+\n+\treturn count;\n+}\n+\n+static int\n+txgbe_get_regs(struct rte_eth_dev *dev,\n+\t struct rte_dev_reg_info *regs)\n+{\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\tuint32_t *data = regs->data;\n+\tint g_ind = 0;\n+\tint count = 0;\n+\tconst struct reg_info *reg_group;\n+\tconst struct reg_info **reg_set = txgbe_regs_others;\n+\n+\tif (data == NULL) {\n+\t\tregs->length = txgbe_get_reg_length(dev);\n+\t\tregs->width = sizeof(uint32_t);\n+\t\treturn 0;\n+\t}\n+\n+\t/* Support only full register dump */\n+\tif (regs->length == 0 ||\n+\t regs->length == (uint32_t)txgbe_get_reg_length(dev)) {\n+\t\tregs->version = hw->mac.type << 24 |\n+\t\t\t\thw->revision_id << 16 |\n+\t\t\t\thw->device_id;\n+\t\twhile ((reg_group = reg_set[g_ind++]))\n+\t\t\tcount += txgbe_read_regs_group(dev, &data[count],\n+\t\t\t\t\t\t reg_group);\n+\t\treturn 0;\n+\t}\n+\n+\treturn -ENOTSUP;\n+}\n+\n static int\n txgbe_get_eeprom_length(struct rte_eth_dev *dev)\n {\n@@ -3601,6 +3713,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {\n \t.set_mc_addr_list = txgbe_dev_set_mc_addr_list,\n \t.rxq_info_get = txgbe_rxq_info_get,\n \t.txq_info_get = txgbe_txq_info_get,\n+\t.get_reg = txgbe_get_regs,\n \t.get_eeprom_length = txgbe_get_eeprom_length,\n \t.get_eeprom = txgbe_get_eeprom,\n \t.set_eeprom = txgbe_set_eeprom,\ndiff --git a/drivers/net/txgbe/txgbe_regs_group.h b/drivers/net/txgbe/txgbe_regs_group.h\nnew file mode 100644\nindex 000000000..6f8f0bc29\n--- /dev/null\n+++ b/drivers/net/txgbe/txgbe_regs_group.h\n@@ -0,0 +1,54 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2015-2020\n+ */\n+\n+#ifndef _TXGBE_REGS_GROUP_H_\n+#define _TXGBE_REGS_GROUP_H_\n+\n+#include \"txgbe_ethdev.h\"\n+\n+struct txgbe_hw;\n+struct reg_info {\n+\tuint32_t base_addr;\n+\tuint32_t count;\n+\tuint32_t stride;\n+\tconst char *name;\n+};\n+\n+static inline int\n+txgbe_read_regs(struct txgbe_hw *hw, const struct reg_info *reg,\n+\tuint32_t *reg_buf)\n+{\n+\tunsigned int i;\n+\n+\tfor (i = 0; i < reg->count; i++)\n+\t\treg_buf[i] = rd32(hw,\n+\t\t\t\t\treg->base_addr + i * reg->stride);\n+\treturn reg->count;\n+};\n+\n+static inline int\n+txgbe_regs_group_count(const struct reg_info *regs)\n+{\n+\tint count = 0;\n+\tint i = 0;\n+\n+\twhile (regs[i].count)\n+\t\tcount += regs[i++].count;\n+\treturn count;\n+};\n+\n+static inline int\n+txgbe_read_regs_group(struct rte_eth_dev *dev, uint32_t *reg_buf,\n+\t\t\t\t\t const struct reg_info *regs)\n+{\n+\tint count = 0;\n+\tint i = 0;\n+\tstruct txgbe_hw *hw = TXGBE_DEV_HW(dev);\n+\n+\twhile (regs[i].count)\n+\t\tcount += txgbe_read_regs(hw, ®s[i++], ®_buf[count]);\n+\treturn count;\n+};\n+\n+#endif /* _TXGBE_REGS_GROUP_H_ */\n", "prefixes": [ "v4", "51/58" ] }