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GET /api/patches/79911/?format=api
http://patches.dpdk.org/api/patches/79911/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/da0b6184e70e64b157d93e1ba5f4814aaf852111.1602086562.git.vladimir.medvedkin@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<da0b6184e70e64b157d93e1ba5f4814aaf852111.1602086562.git.vladimir.medvedkin@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/da0b6184e70e64b157d93e1ba5f4814aaf852111.1602086562.git.vladimir.medvedkin@intel.com", "date": "2020-10-07T16:10:38", "name": "[v9,4/8] fib: introduce AVX512 lookup", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "707a4b37238faddffe3663120cf594bab0726cc0", "submitter": { "id": 1216, "url": "http://patches.dpdk.org/api/people/1216/?format=api", "name": "Vladimir Medvedkin", "email": "vladimir.medvedkin@intel.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/da0b6184e70e64b157d93e1ba5f4814aaf852111.1602086562.git.vladimir.medvedkin@intel.com/mbox/", "series": [ { "id": 12758, "url": "http://patches.dpdk.org/api/series/12758/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12758", "date": "2020-10-07T16:10:34", "name": "fib: implement AVX512 vector lookup", "version": 9, "mbox": "http://patches.dpdk.org/series/12758/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/79911/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/79911/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B6CE7A04BA;\n\tWed, 7 Oct 2020 18:12:21 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7E26C1BBD2;\n\tWed, 7 Oct 2020 18:11:05 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 7164D1BA5D\n for <dev@dpdk.org>; Wed, 7 Oct 2020 18:11:03 +0200 (CEST)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Oct 2020 09:11:00 -0700", "from silpixa00400072.ir.intel.com ([10.237.222.213])\n by fmsmga004.fm.intel.com with ESMTP; 07 Oct 2020 09:10:53 -0700" ], "IronPort-SDR": [ "\n WdHMqt+Tk470AEk8JJn+MG9b+pY0HW77Dh+UHEWlaCKI36PsGTMzN0TLzgvsrP0wtgaa2CY89p\n 2mOLy/CAmkbw==", "\n 4L9WxeNjeWxtJrfV600VpY28r1GHoPs5IFggnCJg+soINGmSALOl8Db4kODJfZXvxSVfGNvoZL\n dw1hgDigFuKw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9767\"; a=\"182477174\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"182477174\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"342953059\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>", "To": "dev@dpdk.org", "Cc": "david.marchand@redhat.com, jerinj@marvell.com, mdr@ashroe.eu,\n thomas@monjalon.net, konstantin.ananyev@intel.com,\n bruce.richardson@intel.com, ciara.power@intel.com", "Date": "Wed, 7 Oct 2020 17:10:38 +0100", "Message-Id": "\n <da0b6184e70e64b157d93e1ba5f4814aaf852111.1602086562.git.vladimir.medvedkin@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": [ "<cover.1602086562.git.vladimir.medvedkin@intel.com>", "<cover.1602086562.git.vladimir.medvedkin@intel.com>" ], "References": [ "<cover.1602086562.git.vladimir.medvedkin@intel.com>", "<cover.1601461541.git.vladimir.medvedkin@intel.com>\n <cover.1602086562.git.vladimir.medvedkin@intel.com>" ], "Subject": "[dpdk-dev] [PATCH v9 4/8] fib: introduce AVX512 lookup", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add new lookup implementation for DIR24_8 algorithm using\nAVX512 instruction set\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n doc/guides/rel_notes/release_20_11.rst | 3 +\n lib/librte_fib/dir24_8.c | 36 +++++++\n lib/librte_fib/dir24_8_avx512.c | 165 +++++++++++++++++++++++++++++++++\n lib/librte_fib/dir24_8_avx512.h | 24 +++++\n lib/librte_fib/meson.build | 34 +++++++\n lib/librte_fib/rte_fib.c | 2 +-\n lib/librte_fib/rte_fib.h | 4 +-\n 7 files changed, 266 insertions(+), 2 deletions(-)\n create mode 100644 lib/librte_fib/dir24_8_avx512.c\n create mode 100644 lib/librte_fib/dir24_8_avx512.h", "diff": "diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex 4eb3224..26a7d8e 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -78,6 +78,9 @@ New Features\n ``--portmask=N``\n where N represents the hexadecimal bitmask of ports used.\n \n+* **Added AVX512 lookup implementation for FIB.**\n+\n+ Added a AVX512 lookup functions implementation into FIB library.\n \n Removed Items\n -------------\ndiff --git a/lib/librte_fib/dir24_8.c b/lib/librte_fib/dir24_8.c\nindex b5f2363..d3611c9 100644\n--- a/lib/librte_fib/dir24_8.c\n+++ b/lib/librte_fib/dir24_8.c\n@@ -18,6 +18,12 @@\n #include <rte_fib.h>\n #include \"dir24_8.h\"\n \n+#ifdef CC_DIR24_8_AVX512_SUPPORT\n+\n+#include \"dir24_8_avx512.h\"\n+\n+#endif /* CC_DIR24_8_AVX512_SUPPORT */\n+\n #define DIR24_8_NAMESIZE\t64\n \n #define ROUNDUP(x, y)\t RTE_ALIGN_CEIL(x, (1 << (32 - y)))\n@@ -56,11 +62,36 @@ get_scalar_fn_inlined(enum rte_fib_dir24_8_nh_sz nh_sz)\n \t}\n }\n \n+static inline rte_fib_lookup_fn_t\n+get_vector_fn(enum rte_fib_dir24_8_nh_sz nh_sz)\n+{\n+#ifdef CC_DIR24_8_AVX512_SUPPORT\n+\tif ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) <= 0) ||\n+\t\t\t(rte_get_max_simd_bitwidth() < RTE_MAX_512_SIMD))\n+\t\treturn NULL;\n+\n+\tswitch (nh_sz) {\n+\tcase RTE_FIB_DIR24_8_1B:\n+\t\treturn rte_dir24_8_vec_lookup_bulk_1b;\n+\tcase RTE_FIB_DIR24_8_2B:\n+\t\treturn rte_dir24_8_vec_lookup_bulk_2b;\n+\tcase RTE_FIB_DIR24_8_4B:\n+\t\treturn rte_dir24_8_vec_lookup_bulk_4b;\n+\tcase RTE_FIB_DIR24_8_8B:\n+\t\treturn rte_dir24_8_vec_lookup_bulk_8b;\n+\tdefault:\n+\t\treturn NULL;\n+\t}\n+#endif\n+\treturn NULL;\n+}\n+\n rte_fib_lookup_fn_t\n dir24_8_get_lookup_fn(void *p, enum rte_fib_dir24_8_lookup_type type)\n {\n \tenum rte_fib_dir24_8_nh_sz nh_sz;\n \tstruct dir24_8_tbl *dp = p;\n+\trte_fib_lookup_fn_t ret_fn = NULL;\n \n \tif (dp == NULL)\n \t\treturn NULL;\n@@ -74,6 +105,11 @@ dir24_8_get_lookup_fn(void *p, enum rte_fib_dir24_8_lookup_type type)\n \t\treturn get_scalar_fn_inlined(nh_sz);\n \tcase RTE_FIB_DIR24_8_SCALAR_UNI:\n \t\treturn dir24_8_lookup_bulk_uni;\n+\tcase RTE_FIB_DIR24_8_VECTOR_AVX512:\n+\t\treturn get_vector_fn(nh_sz);\n+\tcase RTE_FIB_DIR24_8_ANY:\n+\t\tret_fn = get_vector_fn(nh_sz);\n+\t\treturn (ret_fn) ? ret_fn : get_scalar_fn(nh_sz);\n \tdefault:\n \t\treturn NULL;\n \t}\ndiff --git a/lib/librte_fib/dir24_8_avx512.c b/lib/librte_fib/dir24_8_avx512.c\nnew file mode 100644\nindex 0000000..43dba28\n--- /dev/null\n+++ b/lib/librte_fib/dir24_8_avx512.c\n@@ -0,0 +1,165 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#include <rte_vect.h>\n+#include <rte_fib.h>\n+\n+#include \"dir24_8.h\"\n+#include \"dir24_8_avx512.h\"\n+\n+static __rte_always_inline void\n+dir24_8_vec_lookup_x16(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, int size)\n+{\n+\tstruct dir24_8_tbl *dp = (struct dir24_8_tbl *)p;\n+\t__mmask16 msk_ext;\n+\t__mmask16 exp_msk = 0x5555;\n+\t__m512i ip_vec, idxes, res, bytes;\n+\tconst __m512i zero = _mm512_set1_epi32(0);\n+\tconst __m512i lsb = _mm512_set1_epi32(1);\n+\tconst __m512i lsbyte_msk = _mm512_set1_epi32(0xff);\n+\t__m512i tmp1, tmp2, res_msk;\n+\t__m256i tmp256;\n+\t/* used to mask gather values if size is 1/2 (8/16 bit next hops) */\n+\tif (size == sizeof(uint8_t))\n+\t\tres_msk = _mm512_set1_epi32(UINT8_MAX);\n+\telse if (size == sizeof(uint16_t))\n+\t\tres_msk = _mm512_set1_epi32(UINT16_MAX);\n+\n+\tip_vec = _mm512_loadu_si512(ips);\n+\t/* mask 24 most significant bits */\n+\tidxes = _mm512_srli_epi32(ip_vec, 8);\n+\n+\t/**\n+\t * lookup in tbl24\n+\t * Put it inside branch to make compiler happy with -O0\n+\t */\n+\tif (size == sizeof(uint8_t)) {\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 1);\n+\t\tres = _mm512_and_epi32(res, res_msk);\n+\t} else if (size == sizeof(uint16_t)) {\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 2);\n+\t\tres = _mm512_and_epi32(res, res_msk);\n+\t} else\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 4);\n+\n+\t/* get extended entries indexes */\n+\tmsk_ext = _mm512_test_epi32_mask(res, lsb);\n+\n+\tif (msk_ext != 0) {\n+\t\tidxes = _mm512_srli_epi32(res, 1);\n+\t\tidxes = _mm512_slli_epi32(idxes, 8);\n+\t\tbytes = _mm512_and_epi32(ip_vec, lsbyte_msk);\n+\t\tidxes = _mm512_maskz_add_epi32(msk_ext, idxes, bytes);\n+\t\tif (size == sizeof(uint8_t)) {\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 1);\n+\t\t\tidxes = _mm512_and_epi32(idxes, res_msk);\n+\t\t} else if (size == sizeof(uint16_t)) {\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 2);\n+\t\t\tidxes = _mm512_and_epi32(idxes, res_msk);\n+\t\t} else\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 4);\n+\n+\t\tres = _mm512_mask_blend_epi32(msk_ext, res, idxes);\n+\t}\n+\n+\tres = _mm512_srli_epi32(res, 1);\n+\ttmp1 = _mm512_maskz_expand_epi32(exp_msk, res);\n+\ttmp256 = _mm512_extracti32x8_epi32(res, 1);\n+\ttmp2 = _mm512_maskz_expand_epi32(exp_msk,\n+\t\t_mm512_castsi256_si512(tmp256));\n+\t_mm512_storeu_si512(next_hops, tmp1);\n+\t_mm512_storeu_si512(next_hops + 8, tmp2);\n+}\n+\n+static __rte_always_inline void\n+dir24_8_vec_lookup_x8_8b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops)\n+{\n+\tstruct dir24_8_tbl *dp = (struct dir24_8_tbl *)p;\n+\tconst __m512i zero = _mm512_set1_epi32(0);\n+\tconst __m512i lsbyte_msk = _mm512_set1_epi64(0xff);\n+\tconst __m512i lsb = _mm512_set1_epi64(1);\n+\t__m512i res, idxes, bytes;\n+\t__m256i idxes_256, ip_vec;\n+\t__mmask8 msk_ext;\n+\n+\tip_vec = _mm256_loadu_si256((const void *)ips);\n+\t/* mask 24 most significant bits */\n+\tidxes_256 = _mm256_srli_epi32(ip_vec, 8);\n+\n+\t/* lookup in tbl24 */\n+\tres = _mm512_i32gather_epi64(idxes_256, (const void *)dp->tbl24, 8);\n+\n+\t/* get extended entries indexes */\n+\tmsk_ext = _mm512_test_epi64_mask(res, lsb);\n+\n+\tif (msk_ext != 0) {\n+\t\tbytes = _mm512_cvtepi32_epi64(ip_vec);\n+\t\tidxes = _mm512_srli_epi64(res, 1);\n+\t\tidxes = _mm512_slli_epi64(idxes, 8);\n+\t\tbytes = _mm512_and_epi64(bytes, lsbyte_msk);\n+\t\tidxes = _mm512_maskz_add_epi64(msk_ext, idxes, bytes);\n+\t\tidxes = _mm512_mask_i64gather_epi64(zero, msk_ext, idxes,\n+\t\t\t(const void *)dp->tbl8, 8);\n+\n+\t\tres = _mm512_mask_blend_epi64(msk_ext, res, idxes);\n+\t}\n+\n+\tres = _mm512_srli_epi64(res, 1);\n+\t_mm512_storeu_si512(next_hops, res);\n+}\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_1b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint8_t));\n+\n+\tdir24_8_lookup_bulk_1b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_2b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint16_t));\n+\n+\tdir24_8_lookup_bulk_2b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_4b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint32_t));\n+\n+\tdir24_8_lookup_bulk_4b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_8b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 8); i++)\n+\t\tdir24_8_vec_lookup_x8_8b(p, ips + i * 8, next_hops + i * 8);\n+\n+\tdir24_8_lookup_bulk_8b(p, ips + i * 8, next_hops + i * 8, n - i * 8);\n+}\ndiff --git a/lib/librte_fib/dir24_8_avx512.h b/lib/librte_fib/dir24_8_avx512.h\nnew file mode 100644\nindex 0000000..1d3c2b9\n--- /dev/null\n+++ b/lib/librte_fib/dir24_8_avx512.h\n@@ -0,0 +1,24 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#ifndef _DIR248_AVX512_H_\n+#define _DIR248_AVX512_H_\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_1b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n);\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_2b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n);\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_4b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n);\n+\n+void\n+rte_dir24_8_vec_lookup_bulk_8b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n);\n+\n+#endif /* _DIR248_AVX512_H_ */\ndiff --git a/lib/librte_fib/meson.build b/lib/librte_fib/meson.build\nindex 771828f..0a8adef 100644\n--- a/lib/librte_fib/meson.build\n+++ b/lib/librte_fib/meson.build\n@@ -5,3 +5,37 @@\n sources = files('rte_fib.c', 'rte_fib6.c', 'dir24_8.c', 'trie.c')\n headers = files('rte_fib.h', 'rte_fib6.h')\n deps += ['rib']\n+\n+# compile AVX512 version if:\n+# we are building 64-bit binary AND binutils can generate proper code\n+if dpdk_conf.has('RTE_ARCH_X86_64') and binutils_ok.returncode() == 0\n+\t# compile AVX512 version if either:\n+\t# a. we have AVX512F supported in minimum instruction set baseline\n+\t# b. it's not minimum instruction set, but supported by compiler\n+\t#\n+\t# in former case, just add avx512 C file to files list\n+\t# in latter case, compile c file to static lib, using correct\n+\t# compiler flags, and then have the .o file from static lib\n+\t# linked into main lib.\n+\n+\t# check if all required flags already enabled (variant a).\n+\tacl_avx512_flags = ['__AVX512F__','__AVX512DQ__']\n+\tacl_avx512_on = true\n+\tforeach f:acl_avx512_flags\n+\t\tif cc.get_define(f, args: machine_args) == ''\n+\t\t\tacl_avx512_on = false\n+\t\tendif\n+\tendforeach\n+\n+\tif acl_avx512_on == true\n+\t\tcflags += ['-DCC_DIR24_8_AVX512_SUPPORT']\n+\t\tsources += files('dir24_8_avx512.c')\n+\telif cc.has_multi_arguments('-mavx512f', '-mavx512dq')\n+\t\tdir24_8_avx512_tmp = static_library('dir24_8_avx512_tmp',\n+\t\t\t\t'dir24_8_avx512.c',\n+\t\t\t\tdependencies: static_rte_eal,\n+\t\t\t\tc_args: cflags + ['-mavx512f', '-mavx512dq'])\n+\t\tobjs += dir24_8_avx512_tmp.extract_objects('dir24_8_avx512.c')\n+\t\tcflags += '-DCC_DIR24_8_AVX512_SUPPORT'\n+\tendif\n+endif\ndiff --git a/lib/librte_fib/rte_fib.c b/lib/librte_fib/rte_fib.c\nindex b9f6efb..1af2a5f 100644\n--- a/lib/librte_fib/rte_fib.c\n+++ b/lib/librte_fib/rte_fib.c\n@@ -108,7 +108,7 @@ init_dataplane(struct rte_fib *fib, __rte_unused int socket_id,\n \t\tif (fib->dp == NULL)\n \t\t\treturn -rte_errno;\n \t\tfib->lookup = dir24_8_get_lookup_fn(fib->dp,\n-\t\t\tRTE_FIB_DIR24_8_SCALAR_MACRO);\n+\t\t\tRTE_FIB_DIR24_8_ANY);\n \t\tfib->modify = dir24_8_modify;\n \t\treturn 0;\n \tdefault:\ndiff --git a/lib/librte_fib/rte_fib.h b/lib/librte_fib/rte_fib.h\nindex a9bd0da..16514a9 100644\n--- a/lib/librte_fib/rte_fib.h\n+++ b/lib/librte_fib/rte_fib.h\n@@ -62,7 +62,9 @@ enum rte_fib_dir24_8_nh_sz {\n enum rte_fib_dir24_8_lookup_type {\n \tRTE_FIB_DIR24_8_SCALAR_MACRO,\n \tRTE_FIB_DIR24_8_SCALAR_INLINE,\n-\tRTE_FIB_DIR24_8_SCALAR_UNI\n+\tRTE_FIB_DIR24_8_SCALAR_UNI,\n+\tRTE_FIB_DIR24_8_VECTOR_AVX512,\n+\tRTE_FIB_DIR24_8_ANY = UINT32_MAX\n };\n \n /** FIB configuration structure */\n", "prefixes": [ "v9", "4/8" ] }{ "id": 79911, "url": "