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GET /api/patches/79339/?format=api
{ "id": 79339, "url": "http://patches.dpdk.org/api/patches/79339/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200930130415.11211-3-ciara.power@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200930130415.11211-3-ciara.power@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200930130415.11211-3-ciara.power@intel.com", "date": "2020-09-30T13:03:58", "name": "[v3,02/18] eal: add default SIMD bitwidth values", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4b44a282b2b9e4d0d30ca5827f9120884273278b", "submitter": { "id": 978, "url": "http://patches.dpdk.org/api/people/978/?format=api", "name": "Power, Ciara", "email": "ciara.power@intel.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200930130415.11211-3-ciara.power@intel.com/mbox/", "series": [ { "id": 12621, "url": "http://patches.dpdk.org/api/series/12621/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12621", "date": "2020-09-30T13:03:56", "name": "add max SIMD bitwidth to EAL", "version": 3, "mbox": "http://patches.dpdk.org/series/12621/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/79339/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/79339/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 07585A04B5;\n\tWed, 30 Sep 2020 15:08:45 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 107FE1DA10;\n\tWed, 30 Sep 2020 15:08:12 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 19A5A1D619\n for <dev@dpdk.org>; Wed, 30 Sep 2020 15:08:06 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 Sep 2020 06:08:06 -0700", "from silpixa00399953.ir.intel.com (HELO\n silpixa00399953.ger.corp.intel.com) ([10.237.222.53])\n by fmsmga008.fm.intel.com with ESMTP; 30 Sep 2020 06:08:04 -0700" ], "IronPort-SDR": [ "\n 4z/LzyksNqQS5Ry3HitqHW9JFIoKDXP7quMpCuvMT32eGmp8NX0HNVSjADnBPaL1tleVfXB5IR\n 5Epn3P/EoKyA==", "\n 280JDzs4QW/IroXsDY2Fn/1+VVotWSMydoX5F9GJxf9W6TQR2Vy38RHpPkdSB1U1TLzI04RrAN\n JCBy4iss3okQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9759\"; a=\"150223441\"", "E=Sophos;i=\"5.77,322,1596524400\"; d=\"scan'208\";a=\"150223441\"", "E=Sophos;i=\"5.77,322,1596524400\"; d=\"scan'208\";a=\"294603170\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Ciara Power <ciara.power@intel.com>", "To": "dev@dpdk.org", "Cc": "Ciara Power <ciara.power@intel.com>, Ruifeng Wang <ruifeng.wang@arm.com>,\n Jerin Jacob <jerinj@marvell.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Jan Viktorin <viktorin@rehivetech.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>", "Date": "Wed, 30 Sep 2020 14:03:58 +0100", "Message-Id": "<20200930130415.11211-3-ciara.power@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200930130415.11211-1-ciara.power@intel.com>", "References": "<20200807155859.63888-1-ciara.power@intel.com>\n <20200930130415.11211-1-ciara.power@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 02/18] eal: add default SIMD bitwidth values", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Each arch has a define for the default SIMD bitwidth value, this is used\non EAL init to set the config max SIMD bitwidth.\n\nCc: Ruifeng Wang <ruifeng.wang@arm.com>\nCc: Jerin Jacob <jerinj@marvell.com>\nCc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nCc: David Christensen <drc@linux.vnet.ibm.com>\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n\n---\nv3:\n - Removed unnecessary define in generic rte_vect.h\n - Changed default bitwidth for ARM to UINT16_MAX, to allow for SVE.\nv2: Changed default bitwidth for Arm to 128.\n---\n lib/librte_eal/arm/include/rte_vect.h | 2 ++\n lib/librte_eal/common/eal_common_options.c | 3 +++\n lib/librte_eal/ppc/include/rte_vect.h | 2 ++\n lib/librte_eal/x86/include/rte_vect.h | 2 ++\n 4 files changed, 9 insertions(+)", "diff": "diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h\nindex 01c51712a1..a3508e69d5 100644\n--- a/lib/librte_eal/arm/include/rte_vect.h\n+++ b/lib/librte_eal/arm/include/rte_vect.h\n@@ -14,6 +14,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH UINT16_MAX\n+\n typedef int32x4_t xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c\nindex e9117a96af..d412cae89b 100644\n--- a/lib/librte_eal/common/eal_common_options.c\n+++ b/lib/librte_eal/common/eal_common_options.c\n@@ -35,6 +35,7 @@\n #ifndef RTE_EXEC_ENV_WINDOWS\n #include <rte_telemetry.h>\n #endif\n+#include <rte_vect.h>\n \n #include \"eal_internal_cfg.h\"\n #include \"eal_options.h\"\n@@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg)\n \tinternal_cfg->user_mbuf_pool_ops_name = NULL;\n \tCPU_ZERO(&internal_cfg->ctrl_cpuset);\n \tinternal_cfg->init_complete = 0;\n+\tinternal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH;\n+\tinternal_cfg->max_simd_bitwidth.locked = 0;\n }\n \n static int\ndiff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h\nindex b0545c878c..70fbd0c423 100644\n--- a/lib/librte_eal/ppc/include/rte_vect.h\n+++ b/lib/librte_eal/ppc/include/rte_vect.h\n@@ -15,6 +15,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n typedef vector signed int xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h\nindex df5a607623..b1df75aca7 100644\n--- a/lib/librte_eal/x86/include/rte_vect.h\n+++ b/lib/librte_eal/x86/include/rte_vect.h\n@@ -35,6 +35,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n typedef __m128i xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\n", "prefixes": [ "v3", "02/18" ] }