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GET /api/patches/78580/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 78580,
    "url": "http://patches.dpdk.org/api/patches/78580/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200923142253.18853-6-radu.nicolau@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200923142253.18853-6-radu.nicolau@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200923142253.18853-6-radu.nicolau@intel.com",
    "date": "2020-09-23T14:22:53",
    "name": "[v12,5/5] net/ice: use WC store to update queue tail registers",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "1b3f78e89b0afe728201a15078189bd43740a6a3",
    "submitter": {
        "id": 743,
        "url": "http://patches.dpdk.org/api/people/743/?format=api",
        "name": "Radu Nicolau",
        "email": "radu.nicolau@intel.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200923142253.18853-6-radu.nicolau@intel.com/mbox/",
    "series": [
        {
            "id": 12444,
            "url": "http://patches.dpdk.org/api/series/12444/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12444",
            "date": "2020-09-23T14:22:48",
            "name": "eal: add WC store functions",
            "version": 12,
            "mbox": "http://patches.dpdk.org/series/12444/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/78580/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/78580/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3E979A04B1;\n\tWed, 23 Sep 2020 16:24:27 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7455B1DCC3;\n\tWed, 23 Sep 2020 16:23:56 +0200 (CEST)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by dpdk.org (Postfix) with ESMTP id A192B1DCB5\n for <dev@dpdk.org>; Wed, 23 Sep 2020 16:23:53 +0200 (CEST)",
            "from fmsmga005.fm.intel.com ([10.253.24.32])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Sep 2020 07:23:53 -0700",
            "from silpixa00399477.ir.intel.com ([10.237.214.232])\n by fmsmga005.fm.intel.com with ESMTP; 23 Sep 2020 07:23:50 -0700"
        ],
        "IronPort-SDR": [
            "\n 4aSz6zWQynNk12JV7JlmL4RqbhRwyWac1fMp2gEAxGthVbM0hwGVoE+9Ti8fr1oTXFyXOOISV/\n PoIGPFzXL8JQ==",
            "\n zl836N+z+K2KLNPT3+IyxlHO8/GNtwVzeLqVJu3jvJwOAlDHvnSLAgoGvJdGXC5Ue3Zjb1VagK\n 7p+fMBP85uVA=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9752\"; a=\"245732169\"",
            "E=Sophos;i=\"5.77,293,1596524400\"; d=\"scan'208\";a=\"245732169\"",
            "E=Sophos;i=\"5.77,293,1596524400\"; d=\"scan'208\";a=\"511663560\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Radu Nicolau <radu.nicolau@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "beilei.xing@intel.com, jia.guo@intel.com, bruce.richardson@intel.com,\n konstantin.ananyev@intel.com, jerinjacobk@gmail.com,\n david.marchand@redhat.com, fiona.trahe@intel.com, wei.zhao1@intel.com,\n ruifeng.wang@arm.com, qiming.yang@intel.com, qi.z.zhang@intel.com,\n Radu Nicolau <radu.nicolau@intel.com>",
        "Date": "Wed, 23 Sep 2020 14:22:53 +0000",
        "Message-Id": "<20200923142253.18853-6-radu.nicolau@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200923142253.18853-1-radu.nicolau@intel.com>",
        "References": "<1591870283-7776-1-git-send-email-radu.nicolau@intel.com>\n <20200923142253.18853-1-radu.nicolau@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v12 5/5] net/ice: use WC store to update queue\n\ttail registers",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Performance improvement: use a write combining store\ninstead of a regular mmio write to update queue tail\nregisters.\n\nSigned-off-by: Radu Nicolau <radu.nicolau@intel.com>\nReviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>\n---\n doc/guides/rel_notes/release_20_11.rst | 4 ++++\n drivers/net/ice/base/ice_osdep.h       | 1 +\n drivers/net/ice/ice_rxtx.c             | 6 +++---\n drivers/net/ice/ice_rxtx_vec_avx2.c    | 4 ++--\n drivers/net/ice/ice_rxtx_vec_sse.c     | 4 ++--\n 5 files changed, 12 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex caca04208..9d6e07474 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -97,6 +97,10 @@ New Features\n \n   Updated the Intel ixgbe driver to use write combining stores.\n \n+* **Updated Intel ice driver.**\n+\n+  Updated the Intel ice driver to use write combining stores.\n+\n Removed Items\n -------------\n \ndiff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h\nindex 9a170b514..c0f1e7725 100644\n--- a/drivers/net/ice/base/ice_osdep.h\n+++ b/drivers/net/ice/base/ice_osdep.h\n@@ -165,6 +165,7 @@ do {\t\t\t\t\t\t\t\t\t\\\n #endif\n \n #define ICE_PCI_REG_WRITE(reg, value) writel(value, reg)\n+#define ICE_PCI_REG_WC_WRITE(reg, value) rte_write32_wc(value, reg)\n \n #define ICE_READ_REG(hw, reg)         rd32(hw, reg)\n #define ICE_WRITE_REG(hw, reg, value) wr32(hw, reg, value)\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex fef6ad454..6bd5b4a0c 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -1788,7 +1788,7 @@ ice_recv_scattered_pkts(void *rx_queue,\n \t\trx_id = (uint16_t)(rx_id == 0 ?\n \t\t\t\t   (rxq->nb_rx_desc - 1) : (rx_id - 1));\n \t\t/* write TAIL register */\n-\t\tICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n \t\tnb_hold = 0;\n \t}\n \trxq->nb_rx_hold = nb_hold;\n@@ -2178,7 +2178,7 @@ ice_recv_pkts(void *rx_queue,\n \t\trx_id = (uint16_t)(rx_id == 0 ?\n \t\t\t\t   (rxq->nb_rx_desc - 1) : (rx_id - 1));\n \t\t/* write TAIL register */\n-\t\tICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\t\tICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n \t\tnb_hold = 0;\n \t}\n \trxq->nb_rx_hold = nb_hold;\n@@ -2893,7 +2893,7 @@ tx_xmit_pkts(struct ice_tx_queue *txq,\n \t\ttxq->tx_tail = 0;\n \n \t/* Update the tx tail register */\n-\tICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 5969a3048..b72a9e702 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -129,7 +129,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)\n \t\t\t     (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));\n \n \t/* Update the tail pointer on the NIC */\n-\tICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\tICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n }\n \n static inline __m256i\n@@ -962,7 +962,7 @@ ice_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \ttxq->tx_tail = tx_id;\n \n-\tICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\ndiff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex c4c9a9126..1afd96ac9 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -97,7 +97,7 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)\n \t\t\t   (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));\n \n \t/* Update the tail pointer on the NIC */\n-\tICE_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n+\tICE_PCI_REG_WC_WRITE(rxq->qrx_tail, rx_id);\n }\n \n static inline void\n@@ -689,7 +689,7 @@ ice_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \ttxq->tx_tail = tx_id;\n \n-\tICE_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\tICE_PCI_REG_WC_WRITE(txq->qtx_tail, txq->tx_tail);\n \n \treturn nb_pkts;\n }\n",
    "prefixes": [
        "v12",
        "5/5"
    ]
}