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GET /api/patches/77422/?format=api
{ "id": 77422, "url": "http://patches.dpdk.org/api/patches/77422/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-36-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200911131954.15999-36-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-36-qi.z.zhang@intel.com", "date": "2020-09-11T13:19:49", "name": "[v2,35/40] net/ice/base: minor code clean", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4e924892691a1e2ecce92fba86a8f6af7b862e04", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-36-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 12148, "url": "http://patches.dpdk.org/api/series/12148/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148", "date": "2020-09-11T13:19:15", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/12148/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/77422/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/77422/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 84CEEA04B7;\n\tFri, 11 Sep 2020 15:23:12 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B0F6E1C24A;\n\tFri, 11 Sep 2020 15:17:06 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id DD0111C0B9\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:51 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:51 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:50 -0700" ], "IronPort-SDR": [ "\n rhCDUn39Mo7JzWeJ2ljNoWhlmZ1T02zSfwKYVsSxSQJcR/LQaAJVyu9c6V62bVK+l5r/Shf48G\n ePI8VU/EFg+w==", "\n jY7KH+e+UqkVKFzAOlPobGokqlGBkdddIzb75KMtbIfT+SM56Sb5ZE1RC6IJrvdjkP7rDCURXS\n fUMBRV5I3UNw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9740\"; a=\"146482412\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482412\"", "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296762\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "ferruh.yigit@intel.com", "Cc": "dev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Date": "Fri, 11 Sep 2020 21:19:49 +0800", "Message-Id": "<20200911131954.15999-36-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>", "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 35/40] net/ice/base: minor code clean", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove unnecessary mac_type check, fix couple comment, and remove\nunnecessary empty line.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 7 +------\n drivers/net/ice/base/ice_flow.c | 9 ++++-----\n 2 files changed, 5 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 879a7d16a..9d8f78fdc 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -782,8 +782,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)\n \t\t\t\t ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);\n \tice_free(hw, pcaps);\n \tif (status)\n-\t\tice_debug(hw, ICE_DBG_PHY, \"%s: Get PHY capabilities failed, continuing anyway\\n\",\n-\t\t\t __func__);\n+\t\tice_debug(hw, ICE_DBG_PHY, \"Get PHY capabilities failed, continuing anyway\\n\");\n \n \t/* Initialize port_info struct with link information */\n \tstatus = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);\n@@ -4632,10 +4631,6 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)\n */\n bool ice_fw_supports_link_override(struct ice_hw *hw)\n {\n-\t/* Currently, only supported for E810 devices */\n-\tif (hw->mac_type != ICE_MAC_E810)\n-\t\treturn false;\n-\n \tif (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {\n \t\tif (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)\n \t\t\treturn true;\ndiff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 9e9878ae4..1b0caf642 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -2818,7 +2818,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,\n \tif (!entry || !(*entry) || !prof)\n \t\treturn ICE_ERR_BAD_PTR;\n \n-\te = *(entry);\n+\te = *entry;\n \n \tdo_chg_rng_chk = false;\n \tif (e->range_buf) {\n@@ -3236,8 +3236,7 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,\n \t(ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6)\n \n #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \\\n-\t(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \\\n-\t ICE_FLOW_SEG_HDR_SCTP)\n+\t(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP)\n \n #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \\\n \t(ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \\\n@@ -3573,7 +3572,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,\n \tif (status)\n \t\tgoto exit;\n \n-\t/* don't do RSS for GTPU outer */\n+\t/* Don't do RSS for GTPU Outer */\n \tif (segs_cnt == ICE_RSS_OUTER_HEADERS &&\n \t segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {\n \t\tstatus = ICE_SUCCESS;\n@@ -3696,7 +3695,6 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,\n \tice_acquire_lock(&hw->rss_locks);\n \tstatus = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs,\n \t\t\t\t ICE_RSS_OUTER_HEADERS, symm);\n-\n \tif (!status)\n \t\tstatus = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds,\n \t\t\t\t\t addl_hdrs, ICE_RSS_INNER_HEADERS,\n@@ -3736,6 +3734,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,\n \tif (status)\n \t\tgoto out;\n \n+\t/* Don't do RSS for GTPU Outer */\n \tif (segs_cnt == ICE_RSS_OUTER_HEADERS &&\n \t segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {\n \t\tstatus = ICE_SUCCESS;\n", "prefixes": [ "v2", "35/40" ] }