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GET /api/patches/77409/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 77409,
    "url": "http://patches.dpdk.org/api/patches/77409/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-23-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200911131954.15999-23-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200911131954.15999-23-qi.z.zhang@intel.com",
    "date": "2020-09-11T13:19:36",
    "name": "[v2,22/40] net/ice/base: support outer IP filter for GTPU without inner IP",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "cdbe37ad2097012286fcfde00677aacb647f636e",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200911131954.15999-23-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 12148,
            "url": "http://patches.dpdk.org/api/series/12148/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12148",
            "date": "2020-09-11T13:19:15",
            "name": "ice base code update",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/12148/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/77409/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/77409/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 20150A04B7;\n\tFri, 11 Sep 2020 15:20:26 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F18F51C1E3;\n\tFri, 11 Sep 2020 15:16:42 +0200 (CEST)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 0084C1C0D4\n for <dev@dpdk.org>; Fri, 11 Sep 2020 15:16:33 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Sep 2020 06:16:33 -0700",
            "from dpdk51.sh.intel.com ([10.67.111.82])\n by FMSMGA003.fm.intel.com with ESMTP; 11 Sep 2020 06:16:32 -0700"
        ],
        "IronPort-SDR": [
            "\n ROVjMzRY4vyWMXcEh7Rome9jLltIbjhLZi3iFgL+dEAy3FnmemdQIHS/Mjry/FJSsdfJ/lYtyu\n kqhEB0mBz8gw==",
            "\n YnMGmbmdoOFa9gT/ThXy5gKXEgjSm0OuAChBF/qwr7ozdfq6QXon7MPr80z1F/yHnDUqoFl7Md\n B75L3yh4+XXw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9740\"; a=\"146482295\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"146482295\"",
            "E=Sophos;i=\"5.76,415,1592895600\"; d=\"scan'208\";a=\"342296655\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "ferruh.yigit@intel.com",
        "Cc": "dev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>",
        "Date": "Fri, 11 Sep 2020 21:19:36 +0800",
        "Message-Id": "<20200911131954.15999-23-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.13.6",
        "In-Reply-To": "<20200911131954.15999-1-qi.z.zhang@intel.com>",
        "References": "<20200907112826.48493-1-qi.z.zhang@intel.com>\n <20200911131954.15999-1-qi.z.zhang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 22/40] net/ice/base: support outer IP filter\n\tfor GTPU without inner IP",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add ptype MAC_IPV4_GTPU into\nice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4\n\nAdd ptype MAC_IPV6_GTPU into\nice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4\n\nAdd ptype MAC_IPV4_GTPU and MAC_IPV6_GTPU into\nthe new ice_ptypes_gtpu_no_ip\n\nSo outer IP can be configured as input set for GTPU packet that without\ninner IP layer.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------\n drivers/net/ice/base/ice_flow.h |  1 +\n 2 files changed, 23 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 58a91448c..a612c8dc6 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -224,7 +224,7 @@ static const u32 ice_ptypes_macvlan_il[] = {\n static const u32 ice_ptypes_ipv4_ofos[] = {\n \t0x1DC00000, 0x04000800, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000155, 0x00000000, 0x00000000,\n-\t0x00000000, 0x000FC000, 0x000000A0, 0x00000000,\n+\t0x00000000, 0x000FC000, 0x000002A0, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = {\n static const u32 ice_ptypes_ipv4_ofos_all[] = {\n \t0x1DC00000, 0x04000800, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000155, 0x00000000, 0x00000000,\n-\t0x00000000, 0x000FC000, 0x83E0F8A0, 0x00000101,\n+\t0x00000000, 0x000FC000, 0x83E0FAA0, 0x00000101,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = {\n static const u32 ice_ptypes_ipv6_ofos[] = {\n \t0x00000000, 0x00000000, 0x77000000, 0x10002000,\n \t0x00000000, 0x000002AA, 0x00000000, 0x00000000,\n-\t0x00000000, 0x03F00000, 0x00000140, 0x00000000,\n+\t0x00000000, 0x03F00000, 0x00000540, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = {\n static const u32 ice_ptypes_ipv6_ofos_all[] = {\n \t0x00000000, 0x00000000, 0x77000000, 0x10002000,\n \t0x00000000, 0x000002AA, 0x00000000, 0x00000000,\n-\t0x00000000, 0x03F00000, 0x7C1F0140, 0x00000206,\n+\t0x00000000, 0x03F00000, 0x7C1F0540, 0x00000206,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -302,7 +302,7 @@ static const u32 ice_ptypes_ipv6_il[] = {\n static const u32 ice_ipv4_ofos_no_l4[] = {\n \t0x10C00000, 0x04000800, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n-\t0x00000000, 0x000cc000, 0x000000A0, 0x00000000,\n+\t0x00000000, 0x000cc000, 0x000002A0, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -326,7 +326,7 @@ static const u32 ice_ipv4_il_no_l4[] = {\n static const u32 ice_ipv6_ofos_no_l4[] = {\n \t0x00000000, 0x00000000, 0x43000000, 0x10002000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n-\t0x00000000, 0x02300000, 0x00000140, 0x00000000,\n+\t0x00000000, 0x02300000, 0x00000540, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n@@ -667,6 +667,17 @@ static const u32 ice_ptypes_mac_non_ip_ofos[] = {\n \t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n };\n \n+static const u32 ice_ptypes_gtpu_no_ip[] = {\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000600, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+\t0x00000000, 0x00000000, 0x00000000, 0x00000000,\n+};\n+\n /* Manage parameters and info. used during the creation of a flow profile */\n struct ice_flow_prof_params {\n \tenum ice_block blk;\n@@ -691,7 +702,7 @@ struct ice_flow_prof_params {\n \tICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU | \\\n \tICE_FLOW_SEG_HDR_PFCP_SESSION | ICE_FLOW_SEG_HDR_L2TPV3 | \\\n \tICE_FLOW_SEG_HDR_ESP | ICE_FLOW_SEG_HDR_AH | \\\n-\tICE_FLOW_SEG_HDR_NAT_T_ESP)\n+\tICE_FLOW_SEG_HDR_NAT_T_ESP | ICE_FLOW_SEG_HDR_GTPU_NON_IP)\n \n #define ICE_FLOW_SEG_HDRS_L2_MASK\t\\\n \t(ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN)\n@@ -911,6 +922,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)\n \t\t\tsrc = (const ice_bitmap_t *)ice_ptypes_gtpc_tid;\n \t\t\tice_and_bitmap(params->ptypes, params->ptypes,\n \t\t\t\t       src, ICE_FLOW_PTYPE_MAX);\n+\t\t} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_NON_IP) {\n+\t\t\tsrc = (const ice_bitmap_t *)ice_ptypes_gtpu_no_ip;\n+\t\t\tice_and_bitmap(params->ptypes, params->ptypes,\n+\t\t\t\t       src, ICE_FLOW_PTYPE_MAX);\n \t\t} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_DWN) {\n \t\t\tsrc = (const ice_bitmap_t *)ice_ptypes_gtpu;\n \t\t\tice_and_bitmap(params->ptypes, params->ptypes,\ndiff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h\nindex 92987664e..0a52409d5 100644\n--- a/drivers/net/ice/base/ice_flow.h\n+++ b/drivers/net/ice/base/ice_flow.h\n@@ -178,6 +178,7 @@ enum ice_flow_seg_hdr {\n \tICE_FLOW_SEG_HDR_AH\t\t= 0x00200000,\n \tICE_FLOW_SEG_HDR_NAT_T_ESP\t= 0x00400000,\n \tICE_FLOW_SEG_HDR_ETH_NON_IP\t= 0x00800000,\n+\tICE_FLOW_SEG_HDR_GTPU_NON_IP\t= 0x01000000,\n \t/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and\n \t * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs\n \t */\n",
    "prefixes": [
        "v2",
        "22/40"
    ]
}