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GET /api/patches/76958/?format=api
{ "id": 76958, "url": "http://patches.dpdk.org/api/patches/76958/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200908201830.74206-29-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200908201830.74206-29-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200908201830.74206-29-cristian.dumitrescu@intel.com", "date": "2020-09-08T20:18:17", "name": "[v3,28/41] pipeline: add SWX instruction optimizer", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c2b0b226cb67bd3c0f022df1138cc76e8de45908", "submitter": { "id": 19, "url": "http://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200908201830.74206-29-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 12034, "url": "http://patches.dpdk.org/api/series/12034/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12034", "date": "2020-09-08T20:17:52", "name": "Pipeline alignment with the P4 language", "version": 3, "mbox": "http://patches.dpdk.org/series/12034/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76958/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/76958/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8589DA04B1;\n\tTue, 8 Sep 2020 22:23:06 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 7CCA71C20E;\n\tTue, 8 Sep 2020 22:19:34 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by dpdk.org (Postfix) with ESMTP id 81DC61C11C\n for <dev@dpdk.org>; Tue, 8 Sep 2020 22:19:03 +0200 (CEST)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 08 Sep 2020 13:18:59 -0700", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.107])\n by fmsmga006.fm.intel.com with ESMTP; 08 Sep 2020 13:18:58 -0700" ], "IronPort-SDR": [ "\n u+5CTQeAt7gOxfnQEYYK8G7EahjqvySNYTPhKPlIH7731htamtZn1PbMqV9f5XVHf1lV3ZeIph\n a4T2A+BkzPBQ==", "\n njG3qLqB+YQJikwyMuIvJV1f+GKFJXJaprx9tponJzORs5zVx6TNy5iZWktAYKT4cEOVl6Y5+t\n CbO4N2Y84KoQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9738\"; a=\"145939431\"", "E=Sophos;i=\"5.76,407,1592895600\"; d=\"scan'208\";a=\"145939431\"", "E=Sophos;i=\"5.76,406,1592895600\"; d=\"scan'208\";a=\"504493499\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Date": "Tue, 8 Sep 2020 21:18:17 +0100", "Message-Id": "<20200908201830.74206-29-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200908201830.74206-1-cristian.dumitrescu@intel.com>", "References": "<20200907214032.95052-2-cristian.dumitrescu@intel.com>\n <20200908201830.74206-1-cristian.dumitrescu@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 28/41] pipeline: add SWX instruction optimizer", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Instruction optimizer. Detects frequent patterns and replaces them\nwith some more powerful vector-like pipeline instructions without any\nuser effort. Executes at instruction translation, not at run-time.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/librte_pipeline/rte_swx_pipeline.c | 226 +++++++++++++++++++++++++\n 1 file changed, 226 insertions(+)", "diff": "diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c\nindex d51fec821..77eae1927 100644\n--- a/lib/librte_pipeline/rte_swx_pipeline.c\n+++ b/lib/librte_pipeline/rte_swx_pipeline.c\n@@ -5700,6 +5700,230 @@ instr_verify(struct rte_swx_pipeline *p __rte_unused,\n \treturn 0;\n }\n \n+static int\n+instr_pattern_extract_many_detect(struct instruction *instr,\n+\t\t\t\t struct instruction_data *data,\n+\t\t\t\t uint32_t n_instr,\n+\t\t\t\t uint32_t *n_pattern_instr)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < n_instr; i++) {\n+\t\tif (data[i].invalid)\n+\t\t\tbreak;\n+\n+\t\tif (instr[i].type != INSTR_HDR_EXTRACT)\n+\t\t\tbreak;\n+\n+\t\tif (i == RTE_DIM(instr->io.hdr.header_id))\n+\t\t\tbreak;\n+\n+\t\tif (i && data[i].n_users)\n+\t\t\tbreak;\n+\t}\n+\n+\tif (i < 2)\n+\t\treturn 0;\n+\n+\t*n_pattern_instr = i;\n+\treturn 1;\n+}\n+\n+static void\n+instr_pattern_extract_many_optimize(struct instruction *instr,\n+\t\t\t\t struct instruction_data *data,\n+\t\t\t\t uint32_t n_instr)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 1; i < n_instr; i++) {\n+\t\tinstr[0].type++;\n+\t\tinstr[0].io.hdr.header_id[i] = instr[i].io.hdr.header_id[0];\n+\t\tinstr[0].io.hdr.struct_id[i] = instr[i].io.hdr.struct_id[0];\n+\t\tinstr[0].io.hdr.n_bytes[i] = instr[i].io.hdr.n_bytes[0];\n+\n+\t\tdata[i].invalid = 1;\n+\t}\n+}\n+\n+static int\n+instr_pattern_emit_many_tx_detect(struct instruction *instr,\n+\t\t\t\t struct instruction_data *data,\n+\t\t\t\t uint32_t n_instr,\n+\t\t\t\t uint32_t *n_pattern_instr)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < n_instr; i++) {\n+\t\tif (data[i].invalid)\n+\t\t\tbreak;\n+\n+\t\tif (instr[i].type != INSTR_HDR_EMIT)\n+\t\t\tbreak;\n+\n+\t\tif (i == RTE_DIM(instr->io.hdr.header_id))\n+\t\t\tbreak;\n+\n+\t\tif (i && data[i].n_users)\n+\t\t\tbreak;\n+\t}\n+\n+\tif (!i)\n+\t\treturn 0;\n+\n+\tif (instr[i].type != INSTR_TX)\n+\t\treturn 0;\n+\n+\ti++;\n+\n+\t*n_pattern_instr = i;\n+\treturn 1;\n+}\n+\n+static void\n+instr_pattern_emit_many_tx_optimize(struct instruction *instr,\n+\t\t\t\t struct instruction_data *data,\n+\t\t\t\t uint32_t n_instr)\n+{\n+\tuint32_t i;\n+\n+\t/* Any emit instruction in addition to the first one. */\n+\tfor (i = 1; i < n_instr - 1; i++) {\n+\t\tinstr[0].type++;\n+\t\tinstr[0].io.hdr.header_id[i] = instr[i].io.hdr.header_id[0];\n+\t\tinstr[0].io.hdr.struct_id[i] = instr[i].io.hdr.struct_id[0];\n+\t\tinstr[0].io.hdr.n_bytes[i] = instr[i].io.hdr.n_bytes[0];\n+\n+\t\tdata[i].invalid = 1;\n+\t}\n+\n+\t/* The TX instruction is the last one in the pattern. */\n+\tinstr[0].type++;\n+\tinstr[0].io.io.offset = instr[i].io.io.offset;\n+\tinstr[0].io.io.n_bits = instr[i].io.io.n_bits;\n+\tdata[i].invalid = 1;\n+}\n+\n+static int\n+instr_pattern_dma_many_detect(struct instruction *instr,\n+\t\t\t struct instruction_data *data,\n+\t\t\t uint32_t n_instr,\n+\t\t\t uint32_t *n_pattern_instr)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 0; i < n_instr; i++) {\n+\t\tif (data[i].invalid)\n+\t\t\tbreak;\n+\n+\t\tif (instr[i].type != INSTR_DMA_HT)\n+\t\t\tbreak;\n+\n+\t\tif (i == RTE_DIM(instr->dma.dst.header_id))\n+\t\t\tbreak;\n+\n+\t\tif (i && data[i].n_users)\n+\t\t\tbreak;\n+\t}\n+\n+\tif (i < 2)\n+\t\treturn 0;\n+\n+\t*n_pattern_instr = i;\n+\treturn 1;\n+}\n+\n+static void\n+instr_pattern_dma_many_optimize(struct instruction *instr,\n+\t\t\t\tstruct instruction_data *data,\n+\t\t\t\tuint32_t n_instr)\n+{\n+\tuint32_t i;\n+\n+\tfor (i = 1; i < n_instr; i++) {\n+\t\tinstr[0].type++;\n+\t\tinstr[0].dma.dst.header_id[i] = instr[i].dma.dst.header_id[0];\n+\t\tinstr[0].dma.dst.struct_id[i] = instr[i].dma.dst.struct_id[0];\n+\t\tinstr[0].dma.src.offset[i] = instr[i].dma.src.offset[0];\n+\t\tinstr[0].dma.n_bytes[i] = instr[i].dma.n_bytes[0];\n+\n+\t\tdata[i].invalid = 1;\n+\t}\n+}\n+\n+static uint32_t\n+instr_optimize(struct instruction *instructions,\n+\t struct instruction_data *instruction_data,\n+\t uint32_t n_instructions)\n+{\n+\tuint32_t i, pos = 0;\n+\n+\tfor (i = 0; i < n_instructions; ) {\n+\t\tstruct instruction *instr = &instructions[i];\n+\t\tstruct instruction_data *data = &instruction_data[i];\n+\t\tuint32_t n_instr = 0;\n+\t\tint detected;\n+\n+\t\t/* Extract many. */\n+\t\tdetected = instr_pattern_extract_many_detect(instr,\n+\t\t\t\t\t\t\t data,\n+\t\t\t\t\t\t\t n_instructions - i,\n+\t\t\t\t\t\t\t &n_instr);\n+\t\tif (detected) {\n+\t\t\tinstr_pattern_extract_many_optimize(instr,\n+\t\t\t\t\t\t\t data,\n+\t\t\t\t\t\t\t n_instr);\n+\t\t\ti += n_instr;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* Emit many + TX. */\n+\t\tdetected = instr_pattern_emit_many_tx_detect(instr,\n+\t\t\t\t\t\t\t data,\n+\t\t\t\t\t\t\t n_instructions - i,\n+\t\t\t\t\t\t\t &n_instr);\n+\t\tif (detected) {\n+\t\t\tinstr_pattern_emit_many_tx_optimize(instr,\n+\t\t\t\t\t\t\t data,\n+\t\t\t\t\t\t\t n_instr);\n+\t\t\ti += n_instr;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* DMA many. */\n+\t\tdetected = instr_pattern_dma_many_detect(instr,\n+\t\t\t\t\t\t\t data,\n+\t\t\t\t\t\t\t n_instructions - i,\n+\t\t\t\t\t\t\t &n_instr);\n+\t\tif (detected) {\n+\t\t\tinstr_pattern_dma_many_optimize(instr, data, n_instr);\n+\t\t\ti += n_instr;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* No pattern starting at the current instruction. */\n+\t\ti++;\n+\t}\n+\n+\t/* Eliminate the invalid instructions that have been optimized out. */\n+\tfor (i = 0; i < n_instructions; i++) {\n+\t\tstruct instruction *instr = &instructions[i];\n+\t\tstruct instruction_data *data = &instruction_data[i];\n+\n+\t\tif (data->invalid)\n+\t\t\tcontinue;\n+\n+\t\tif (i != pos) {\n+\t\t\tmemcpy(&instructions[pos], instr, sizeof(*instr));\n+\t\t\tmemcpy(&instruction_data[pos], data, sizeof(*data));\n+\t\t}\n+\n+\t\tpos++;\n+\t}\n+\n+\treturn pos;\n+}\n+\n static int\n instruction_config(struct rte_swx_pipeline *p,\n \t\t struct action *a,\n@@ -5752,6 +5976,8 @@ instruction_config(struct rte_swx_pipeline *p,\n \tif (err)\n \t\tgoto error;\n \n+\tn_instructions = instr_optimize(instr, data, n_instructions);\n+\n \terr = instr_jmp_resolve(instr, data, n_instructions);\n \tif (err)\n \t\tgoto error;\n", "prefixes": [ "v3", "28/41" ] }