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GET /api/patches/76910/?format=api
{ "id": 76910, "url": "http://patches.dpdk.org/api/patches/76910/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200908100956.25868-2-adwivedi@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200908100956.25868-2-adwivedi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200908100956.25868-2-adwivedi@marvell.com", "date": "2020-09-08T10:09:54", "name": "[1/3] crypto/octeontx2: move functions to helper file", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d874454a429db8e7ccb49fa4b500179e1ce83207", "submitter": { "id": 1561, "url": "http://patches.dpdk.org/api/people/1561/?format=api", "name": "Ankur Dwivedi", "email": "adwivedi@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200908100956.25868-2-adwivedi@marvell.com/mbox/", "series": [ { "id": 12021, "url": "http://patches.dpdk.org/api/series/12021/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=12021", "date": "2020-09-08T10:09:53", "name": "event/octeontx2: add support for event crypto adapter", "version": 1, "mbox": "http://patches.dpdk.org/series/12021/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76910/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/76910/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5AC93A04AA;\n\tTue, 8 Sep 2020 12:10:37 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3001E1C023;\n\tTue, 8 Sep 2020 12:10:37 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 228E81C023\n for <dev@dpdk.org>; Tue, 8 Sep 2020 12:10:34 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 088A56u8020360; Tue, 8 Sep 2020 03:10:34 -0700", "from sc-exch03.marvell.com ([199.233.58.183])\n by mx0a-0016f401.pphosted.com with ESMTP id 33c81pu21v-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 08 Sep 2020 03:10:34 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 8 Sep 2020 03:10:32 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 8 Sep 2020 03:10:31 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 8 Sep 2020 03:10:31 -0700", "from hyd1349.t110.caveonetworks.com (unknown [10.29.45.13])\n by maili.marvell.com (Postfix) with ESMTP id D23713F703F;\n Tue, 8 Sep 2020 03:10:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=FSk+2ztx9EzZ1NrproOLbsYRm3EKlhfEoIRzWb3SW6E=;\n b=gfBja3L2L5UN50wBz0Q7gHcgtptM5IfAlwyqKuAggbIvW9A7fXsHq2fJAtMVyKo9Gnmm\n 2oXSrOVCArKattzaUkN+h7V3zmWbgeg5Gnk6f2XVknanI7oyGC612W4AoG1fEAJz8aeu\n WXGYYSeDi1zfE9z6Kxc8d4K2p3e2+awFPvvkK/Gm3cQyvC5hTyEK2reBFaYd/jq+TKzw\n 6HBGkc//DJknIO3VCaqvOZTH+kAckjig/u0IZ4QVN+Wc32HUTRMgaNqDw98YOE9nIhKh\n lbaKPTrKhBWGWLNY0EdSq6ejw70Ox0Pgqb/KUFdl0BcKRX4pBmAKwJr4f84g04ZVzR9b 4w==", "From": "Ankur Dwivedi <adwivedi@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <pbhagavatula@marvell.com>, <akhil.goyal@nxp.com>,\n <anoobj@marvell.com>, Ankur Dwivedi <adwivedi@marvell.com>", "Date": "Tue, 8 Sep 2020 15:39:54 +0530", "Message-ID": "<20200908100956.25868-2-adwivedi@marvell.com>", "X-Mailer": "git-send-email 2.28.0", "In-Reply-To": "<20200908100956.25868-1-adwivedi@marvell.com>", "References": "<20200908100956.25868-1-adwivedi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-09-08_05:2020-09-08,\n 2020-09-08 signatures=0", "Subject": "[dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper\n\tfile", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Some functions are common across cryptodev pmd and the event\ncrypto adapter. This patch moves them into a helper file.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\n---\n drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 65 +---------------\n .../octeontx2/otx2_cryptodev_ops_helper.h | 74 +++++++++++++++++++\n 2 files changed, 75 insertions(+), 64 deletions(-)\n create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h", "diff": "diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\nindex ccf566d5f..77842b4ad 100644\n--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c\n@@ -13,6 +13,7 @@\n #include \"otx2_cryptodev_hw_access.h\"\n #include \"otx2_cryptodev_mbox.h\"\n #include \"otx2_cryptodev_ops.h\"\n+#include \"otx2_cryptodev_ops_helper.h\"\n #include \"otx2_ipsec_po_ops.h\"\n #include \"otx2_mbox.h\"\n #include \"otx2_sec_idev.h\"\n@@ -416,24 +417,6 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,\n \treturn -ENOTSUP;\n }\n \n-static void\n-sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)\n-{\n-\tvoid *priv = get_sym_session_private_data(sess, driver_id);\n-\tstruct rte_mempool *pool;\n-\n-\tif (priv == NULL)\n-\t\treturn;\n-\n-\tmemset(priv, 0, cpt_get_session_size());\n-\n-\tpool = rte_mempool_from_obj(priv);\n-\n-\tset_sym_session_private_data(sess, driver_id, NULL);\n-\n-\trte_mempool_put(pool, priv);\n-}\n-\n static __rte_always_inline int32_t __rte_hot\n otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,\n \t\t struct pending_queue *pend_q,\n@@ -917,52 +900,6 @@ otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,\n \t}\n }\n \n-static __rte_always_inline uint8_t\n-otx2_cpt_compcode_get(struct cpt_request_info *req)\n-{\n-\tvolatile struct cpt_res_s_9s *res;\n-\tuint8_t ret;\n-\n-\tres = (volatile struct cpt_res_s_9s *)req->completion_addr;\n-\n-\tif (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {\n-\t\tif (rte_get_timer_cycles() < req->time_out)\n-\t\t\treturn ERR_REQ_PENDING;\n-\n-\t\tCPT_LOG_DP_ERR(\"Request timed out\");\n-\t\treturn ERR_REQ_TIMEOUT;\n-\t}\n-\n-\tif (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {\n-\t\tret = NO_ERR;\n-\t\tif (unlikely(res->uc_compcode)) {\n-\t\t\tret = res->uc_compcode;\n-\t\t\tCPT_LOG_DP_DEBUG(\"Request failed with microcode error\");\n-\t\t\tCPT_LOG_DP_DEBUG(\"MC completion code 0x%x\",\n-\t\t\t\t\t res->uc_compcode);\n-\t\t}\n-\t} else {\n-\t\tCPT_LOG_DP_DEBUG(\"HW completion code 0x%x\", res->compcode);\n-\n-\t\tret = res->compcode;\n-\t\tswitch (res->compcode) {\n-\t\tcase CPT_9X_COMP_E_INSTERR:\n-\t\t\tCPT_LOG_DP_ERR(\"Request failed with instruction error\");\n-\t\t\tbreak;\n-\t\tcase CPT_9X_COMP_E_FAULT:\n-\t\t\tCPT_LOG_DP_ERR(\"Request failed with DMA fault\");\n-\t\t\tbreak;\n-\t\tcase CPT_9X_COMP_E_HWERR:\n-\t\t\tCPT_LOG_DP_ERR(\"Request failed with hardware error\");\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tCPT_LOG_DP_ERR(\"Request failed with unknown completion code\");\n-\t\t}\n-\t}\n-\n-\treturn ret;\n-}\n-\n static uint16_t\n otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n {\ndiff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h\nnew file mode 100644\nindex 000000000..764daadea\n--- /dev/null\n+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h\n@@ -0,0 +1,74 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (C) 2020 Marvell International Ltd.\n+ */\n+\n+#ifndef _OTX2_CRYPTODEV_OPS_HELPER_H_\n+#define _OTX2_CRYPTODEV_OPS_HELPER_H_\n+\n+#include \"cpt_pmd_logs.h\"\n+\n+static void\n+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)\n+{\n+\tvoid *priv = get_sym_session_private_data(sess, driver_id);\n+\tstruct rte_mempool *pool;\n+\n+\tif (priv == NULL)\n+\t\treturn;\n+\n+\tmemset(priv, 0, cpt_get_session_size());\n+\n+\tpool = rte_mempool_from_obj(priv);\n+\n+\tset_sym_session_private_data(sess, driver_id, NULL);\n+\n+\trte_mempool_put(pool, priv);\n+}\n+\n+static __rte_always_inline uint8_t\n+otx2_cpt_compcode_get(struct cpt_request_info *req)\n+{\n+\tvolatile struct cpt_res_s_9s *res;\n+\tuint8_t ret;\n+\n+\tres = (volatile struct cpt_res_s_9s *)req->completion_addr;\n+\n+\tif (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {\n+\t\tif (rte_get_timer_cycles() < req->time_out)\n+\t\t\treturn ERR_REQ_PENDING;\n+\n+\t\tCPT_LOG_DP_ERR(\"Request timed out\");\n+\t\treturn ERR_REQ_TIMEOUT;\n+\t}\n+\n+\tif (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {\n+\t\tret = NO_ERR;\n+\t\tif (unlikely(res->uc_compcode)) {\n+\t\t\tret = res->uc_compcode;\n+\t\t\tCPT_LOG_DP_DEBUG(\"Request failed with microcode error\");\n+\t\t\tCPT_LOG_DP_DEBUG(\"MC completion code 0x%x\",\n+\t\t\t\t\t res->uc_compcode);\n+\t\t}\n+\t} else {\n+\t\tCPT_LOG_DP_DEBUG(\"HW completion code 0x%x\", res->compcode);\n+\n+\t\tret = res->compcode;\n+\t\tswitch (res->compcode) {\n+\t\tcase CPT_9X_COMP_E_INSTERR:\n+\t\t\tCPT_LOG_DP_ERR(\"Request failed with instruction error\");\n+\t\t\tbreak;\n+\t\tcase CPT_9X_COMP_E_FAULT:\n+\t\t\tCPT_LOG_DP_ERR(\"Request failed with DMA fault\");\n+\t\t\tbreak;\n+\t\tcase CPT_9X_COMP_E_HWERR:\n+\t\t\tCPT_LOG_DP_ERR(\"Request failed with hardware error\");\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tCPT_LOG_DP_ERR(\"Request failed with unknown completion code\");\n+\t\t}\n+\t}\n+\n+\treturn ret;\n+}\n+\n+#endif /* _OTX2_CRYPTODEV_OPS_HELPER_H_ */\n", "prefixes": [ "1/3" ] }