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GET /api/patches/76665/?format=api
{ "id": 76665, "url": "http://patches.dpdk.org/api/patches/76665/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200907091711.5980-5-junyux.jiang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200907091711.5980-5-junyux.jiang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200907091711.5980-5-junyux.jiang@intel.com", "date": "2020-09-07T09:17:10", "name": "[v2,4/5] net/ice: support flow mark in SSE path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ede233766175d03b6238c1f8172fe64068471589", "submitter": { "id": 1408, "url": "http://patches.dpdk.org/api/people/1408/?format=api", "name": "Junyu Jiang", "email": "junyux.jiang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200907091711.5980-5-junyux.jiang@intel.com/mbox/", "series": [ { "id": 11987, "url": "http://patches.dpdk.org/api/series/11987/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11987", "date": "2020-09-07T09:17:06", "name": "supports RxDID #22 and FDID", "version": 2, "mbox": "http://patches.dpdk.org/series/11987/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/76665/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/76665/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 050C8A04B9;\n\tMon, 7 Sep 2020 11:27:14 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 5BDA41C116;\n\tMon, 7 Sep 2020 11:26:42 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 365341C10F\n for <dev@dpdk.org>; Mon, 7 Sep 2020 11:26:41 +0200 (CEST)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Sep 2020 02:26:40 -0700", "from unknown (HELO intel.sh.intel.com) ([10.239.255.60])\n by fmsmga001.fm.intel.com with ESMTP; 07 Sep 2020 02:26:39 -0700" ], "IronPort-SDR": [ "\n IpxMDilr2y13Hpk1kc52u0a1OIkMlcl0etVjyruQjY9xY5dHeXD8JKiKRq7EtD18Opg20fPDnJ\n DkiKhFJVfE0w==", "\n /oLvto6k+YyCvWdKj8aa7I9h01FG18zZBK2AHvuKbR+zZ4/lSdk5ps020CQwOWGsPfoRCpuY9k\n Pmk1Pf2P2Unw==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9736\"; a=\"157241158\"", "E=Sophos;i=\"5.76,401,1592895600\"; d=\"scan'208\";a=\"157241158\"", "E=Sophos;i=\"5.76,401,1592895600\"; d=\"scan'208\";a=\"406783321\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Junyu Jiang <junyux.jiang@intel.com>", "To": "dev@dpdk.org", "Cc": "Qi Zhang <qi.z.zhang@intel.com>, Qiming Yang <qiming.yang@intel.com>,\n Guinan Sun <guinanx.sun@intel.com>", "Date": "Mon, 7 Sep 2020 09:17:10 +0000", "Message-Id": "<20200907091711.5980-5-junyux.jiang@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200907091711.5980-1-junyux.jiang@intel.com>", "References": "<20200826075501.50052-1-guinanx.sun@intel.com>\n <20200907091711.5980-1-junyux.jiang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 4/5] net/ice: support flow mark in SSE path", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Guinan Sun <guinanx.sun@intel.com>\n\nSupport Flow Director mark ID parsing from Flex\nRx descriptor in SSE path.\n\nSigned-off-by: Guinan Sun <guinanx.sun@intel.com>\n---\n drivers/net/ice/ice_rxtx_vec_sse.c | 49 ++++++++++++++++++++++++++++++\n 1 file changed, 49 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_vec_sse.c b/drivers/net/ice/ice_rxtx_vec_sse.c\nindex fffb27138..965cd8b26 100644\n--- a/drivers/net/ice/ice_rxtx_vec_sse.c\n+++ b/drivers/net/ice/ice_rxtx_vec_sse.c\n@@ -10,6 +10,25 @@\n #pragma GCC diagnostic ignored \"-Wcast-qual\"\n #endif\n \n+static inline __m128i\n+ice_flex_rxd_to_fdir_flags_vec(const __m128i fdir_id0_3)\n+{\n+#define FDID_MIS_MAGIC 0xFFFFFFFF\n+\tRTE_BUILD_BUG_ON(PKT_RX_FDIR != (1 << 2));\n+\tRTE_BUILD_BUG_ON(PKT_RX_FDIR_ID != (1 << 13));\n+\tconst __m128i pkt_fdir_bit = _mm_set1_epi32(PKT_RX_FDIR |\n+\t\t\tPKT_RX_FDIR_ID);\n+\t/* desc->flow_id field == 0xFFFFFFFF means fdir mismatch */\n+\tconst __m128i fdir_mis_mask = _mm_set1_epi32(FDID_MIS_MAGIC);\n+\t__m128i fdir_mask = _mm_cmpeq_epi32(fdir_id0_3,\n+\t\t\tfdir_mis_mask);\n+\t/* this XOR op results to bit-reverse the fdir_mask */\n+\tfdir_mask = _mm_xor_si128(fdir_mask, fdir_mis_mask);\n+\tconst __m128i fdir_flags = _mm_and_si128(fdir_mask, pkt_fdir_bit);\n+\n+\treturn fdir_flags;\n+}\n+\n static inline void\n ice_rxq_rearm(struct ice_rx_queue *rxq)\n {\n@@ -159,6 +178,36 @@ ice_rx_desc_to_olflags_v(struct ice_rx_queue *rxq, __m128i descs[4],\n \t/* merge the flags */\n \tflags = _mm_or_si128(flags, rss_vlan);\n \n+\tif (rxq->fdir_enabled) {\n+\t\tconst __m128i fdir_id0_1 =\n+\t\t\t_mm_unpackhi_epi32(descs[0], descs[1]);\n+\n+\t\tconst __m128i fdir_id2_3 =\n+\t\t\t_mm_unpackhi_epi32(descs[2], descs[3]);\n+\n+\t\tconst __m128i fdir_id0_3 =\n+\t\t\t_mm_unpackhi_epi64(fdir_id0_1, fdir_id2_3);\n+\n+\t\tconst __m128i fdir_flags =\n+\t\t\tice_flex_rxd_to_fdir_flags_vec(fdir_id0_3);\n+\n+\t\t/* merge with fdir_flags */\n+\t\tflags = _mm_or_si128(flags, fdir_flags);\n+\n+\t\t/* write fdir_id to mbuf */\n+\t\trx_pkts[0]->hash.fdir.hi =\n+\t\t\t_mm_extract_epi32(fdir_id0_3, 0);\n+\n+\t\trx_pkts[1]->hash.fdir.hi =\n+\t\t\t_mm_extract_epi32(fdir_id0_3, 1);\n+\n+\t\trx_pkts[2]->hash.fdir.hi =\n+\t\t\t_mm_extract_epi32(fdir_id0_3, 2);\n+\n+\t\trx_pkts[3]->hash.fdir.hi =\n+\t\t\t_mm_extract_epi32(fdir_id0_3, 3);\n+\t} /* if() on fdir_enabled */\n+\n \t/**\n \t * At this point, we have the 4 sets of flags in the low 16-bits\n \t * of each 32-bit value in flags.\n", "prefixes": [ "v2", "4/5" ] }