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GET /api/patches/75976/?format=api
{ "id": 75976, "url": "http://patches.dpdk.org/api/patches/75976/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200826075501.50052-4-guinanx.sun@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200826075501.50052-4-guinanx.sun@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200826075501.50052-4-guinanx.sun@intel.com", "date": "2020-08-26T07:54:57", "name": "[3/7] net/ice: support flexible descriptor RxDID #22", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "34fb50fbbc367a05333a9e8be2d95646d0f13b6f", "submitter": { "id": 1476, "url": "http://patches.dpdk.org/api/people/1476/?format=api", "name": "Guinan Sun", "email": "guinanx.sun@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200826075501.50052-4-guinanx.sun@intel.com/mbox/", "series": [ { "id": 11796, "url": "http://patches.dpdk.org/api/series/11796/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11796", "date": "2020-08-26T07:54:54", "name": "support RXDID22 and FDID22", "version": 1, "mbox": "http://patches.dpdk.org/series/11796/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/75976/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/75976/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EE547A04B1;\n\tWed, 26 Aug 2020 10:13:56 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 87B611C0CF;\n\tWed, 26 Aug 2020 10:13:35 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 02C231C0C2\n for <dev@dpdk.org>; Wed, 26 Aug 2020 10:13:32 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Aug 2020 01:13:32 -0700", "from dpdk.sh.intel.com ([10.239.255.12])\n by orsmga002.jf.intel.com with ESMTP; 26 Aug 2020 01:13:30 -0700" ], "IronPort-SDR": [ "\n l2KCIzQHqvGEZxlE7f+BmD2AupEiDoMCvCkYNKari8Rr4r/9LlMsrJ9c65+PiIQH7dzFFRMVx0\n 1348/fCy1B+w==", "\n rCHDYBYHpP0DK576/ppSdK9iAUR0zb6K2lVIj/SCtO9IrPCXXTWnUeO58sWHYAxOfUQ+izEGvD\n CmEfuT8rN29w==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9724\"; a=\"155512884\"", "E=Sophos;i=\"5.76,354,1592895600\"; d=\"scan'208\";a=\"155512884\"", "E=Sophos;i=\"5.76,354,1592895600\"; d=\"scan'208\";a=\"312816192\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Guinan Sun <guinanx.sun@intel.com>", "To": "dev@dpdk.org", "Cc": "Qi Zhang <qi.z.zhang@intel.com>, Qiming Yang <qiming.yang@intel.com>,\n Junyu Jiang <junyux.jiang@intel.com>", "Date": "Wed, 26 Aug 2020 07:54:57 +0000", "Message-Id": "<20200826075501.50052-4-guinanx.sun@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200826075501.50052-1-guinanx.sun@intel.com>", "References": "<20200826075501.50052-1-guinanx.sun@intel.com>", "Subject": "[dpdk-dev] [PATCH 3/7] net/ice: support flexible descriptor RxDID\n\t#22", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Junyu Jiang <junyux.jiang@intel.com>\n\nAdd structure and macro definition for flex Rx descriptor RxDID #22,\nand support flex Rx descriptor RxDID #22 format in normal path.\n\nSigned-off-by: Junyu Jiang <junyux.jiang@intel.com>\n---\n drivers/net/ice/ice_rxtx.c | 16 ++++++++-------\n drivers/net/ice/ice_rxtx.h | 42 ++++++++++++++++++++++++++++++++++++++\n 2 files changed, 51 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 2e1f06d2c..a31a976a1 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -50,7 +50,7 @@ static inline uint8_t\n ice_proto_xtr_type_to_rxdid(uint8_t xtr_type)\n {\n \tstatic uint8_t rxdid_map[] = {\n-\t\t[PROTO_XTR_NONE] = ICE_RXDID_COMMS_GENERIC,\n+\t\t[PROTO_XTR_NONE] = ICE_RXDID_COMMS_OVS,\n \t\t[PROTO_XTR_VLAN] = ICE_RXDID_COMMS_AUX_VLAN,\n \t\t[PROTO_XTR_IPV4] = ICE_RXDID_COMMS_AUX_IPV4,\n \t\t[PROTO_XTR_IPV6] = ICE_RXDID_COMMS_AUX_IPV6,\n@@ -59,7 +59,7 @@ ice_proto_xtr_type_to_rxdid(uint8_t xtr_type)\n \t};\n \n \treturn xtr_type < RTE_DIM(rxdid_map) ?\n-\t\t\t\trxdid_map[xtr_type] : ICE_RXDID_COMMS_GENERIC;\n+\t\t\t\trxdid_map[xtr_type] : ICE_RXDID_COMMS_OVS;\n }\n \n static enum ice_status\n@@ -72,7 +72,7 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)\n \tenum ice_status err;\n \tuint16_t buf_size, len;\n \tstruct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;\n-\tuint32_t rxdid = ICE_RXDID_COMMS_GENERIC;\n+\tuint32_t rxdid = ICE_RXDID_COMMS_OVS;\n \tuint32_t regval;\n \n \t/* Set buffer size as the head split is disabled. */\n@@ -1309,7 +1309,7 @@ ice_rxd_to_vlan_tci(struct rte_mbuf *mb, volatile union ice_rx_flex_desc *rxdp)\n \n static void\n ice_rxd_to_proto_xtr(struct rte_mbuf *mb,\n-\t\t volatile struct ice_32b_rx_flex_desc_comms *desc)\n+\t\t volatile struct ice_32b_rx_flex_desc_comms_ovs *desc)\n {\n \tuint16_t stat_err = rte_le_to_cpu_16(desc->status_error1);\n \tuint32_t metadata;\n@@ -1338,8 +1338,9 @@ static inline void\n ice_rxd_to_pkt_fields(struct rte_mbuf *mb,\n \t\t volatile union ice_rx_flex_desc *rxdp)\n {\n-\tvolatile struct ice_32b_rx_flex_desc_comms *desc =\n-\t\t\t(volatile struct ice_32b_rx_flex_desc_comms *)rxdp;\n+\tvolatile struct ice_32b_rx_flex_desc_comms_ovs *desc =\n+\t\t\t(volatile struct ice_32b_rx_flex_desc_comms_ovs *)rxdp;\n+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n \tuint16_t stat_err;\n \n \tstat_err = rte_le_to_cpu_16(desc->status_error0);\n@@ -1347,13 +1348,14 @@ ice_rxd_to_pkt_fields(struct rte_mbuf *mb,\n \t\tmb->ol_flags |= PKT_RX_RSS_HASH;\n \t\tmb->hash.rss = rte_le_to_cpu_32(desc->rss_hash);\n \t}\n+#endif\n \n-#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n \tif (desc->flow_id != 0xFFFFFFFF) {\n \t\tmb->ol_flags |= PKT_RX_FDIR | PKT_RX_FDIR_ID;\n \t\tmb->hash.fdir.hi = rte_le_to_cpu_32(desc->flow_id);\n \t}\n \n+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n \tif (unlikely(rte_net_ice_dynf_proto_xtr_metadata_avail()))\n \t\tice_rxd_to_proto_xtr(mb, desc);\n #endif\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex 2fdcfb7d0..e21ba152d 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -38,6 +38,8 @@\n \n #define ICE_FDIR_PKT_LEN\t512\n \n+#define ICE_RXDID_COMMS_OVS\t22\n+\n typedef void (*ice_rx_release_mbufs_t)(struct ice_rx_queue *rxq);\n typedef void (*ice_tx_release_mbufs_t)(struct ice_tx_queue *txq);\n \n@@ -135,6 +137,46 @@ union ice_tx_offload {\n \t};\n };\n \n+/* Rx Flex Descriptor for Comms Package Profile\n+ * RxDID Profile ID 22 (swap Hash and FlowID)\n+ * Flex-field 0: Flow ID lower 16-bits\n+ * Flex-field 1: Flow ID upper 16-bits\n+ * Flex-field 2: RSS hash lower 16-bits\n+ * Flex-field 3: RSS hash upper 16-bits\n+ * Flex-field 4: AUX0\n+ * Flex-field 5: AUX1\n+ */\n+struct ice_32b_rx_flex_desc_comms_ovs {\n+\t/* Qword 0 */\n+\tu8 rxdid;\n+\tu8 mir_id_umb_cast;\n+\t__le16 ptype_flexi_flags0;\n+\t__le16 pkt_len;\n+\t__le16 hdr_len_sph_flex_flags1;\n+\n+\t/* Qword 1 */\n+\t__le16 status_error0;\n+\t__le16 l2tag1;\n+\t__le32 flow_id;\n+\n+\t/* Qword 2 */\n+\t__le16 status_error1;\n+\tu8 flexi_flags2;\n+\tu8 ts_low;\n+\t__le16 l2tag2_1st;\n+\t__le16 l2tag2_2nd;\n+\n+\t/* Qword 3 */\n+\t__le32 rss_hash;\n+\tunion {\n+\t\tstruct {\n+\t\t\t__le16 aux0;\n+\t\t\t__le16 aux1;\n+\t\t} flex;\n+\t\t__le32 ts_high;\n+\t} flex_ts;\n+};\n+\n int ice_rx_queue_setup(struct rte_eth_dev *dev,\n \t\t uint16_t queue_idx,\n \t\t uint16_t nb_desc,\n", "prefixes": [ "3/7" ] }