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GET /api/patches/75649/?format=api
http://patches.dpdk.org/api/patches/75649/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1597791894-37041-7-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1597791894-37041-7-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1597791894-37041-7-git-send-email-nicolas.chautru@intel.com", "date": "2020-08-18T23:04:49", "name": "[v2,06/11] baseband/acc100: add HARQ loopback support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7f9e5abd6197e161278ae77cbf90d91ae7bd551d", "submitter": { "id": 1314, "url": "http://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1597791894-37041-7-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 11695, "url": "http://patches.dpdk.org/api/series/11695/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11695", "date": "2020-08-18T23:04:43", "name": "bbdev PMD ACC100", "version": 2, "mbox": "http://patches.dpdk.org/series/11695/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/75649/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/75649/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0301DA04AF;\n\tWed, 19 Aug 2020 01:07:43 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 9AF391C0C2;\n\tWed, 19 Aug 2020 01:06:54 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 37FF31C020\n for <dev@dpdk.org>; Wed, 19 Aug 2020 01:06:47 +0200 (CEST)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Aug 2020 16:06:44 -0700", "from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210])\n by orsmga004.jf.intel.com with ESMTP; 18 Aug 2020 16:06:44 -0700" ], "IronPort-SDR": [ "\n xth0G+wfuwFwXzQvuZp6IaMFhkCE24CPYgY9ZvC6eTWAFgBc9K0fTifSQ4gdSrL9DNimjXR8QC\n XfnzTqbgVwKg==", "\n ta6Gj1HzQimWjTlr76PhqI+96o2NOnSZHU9kqpyU5A9bsui2r/o9byJCossNHiyKWiFsvf2Cyn\n yQtlz9ELBEAA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9717\"; a=\"154281361\"", "E=Sophos;i=\"5.76,329,1592895600\"; d=\"scan'208\";a=\"154281361\"", "E=Sophos;i=\"5.76,329,1592895600\"; d=\"scan'208\";a=\"441400705\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\takhil.goyal@nxp.com", "Cc": "bruce.richardson@intel.com,\n\tNicolas Chautru <nicolas.chautru@intel.com>", "Date": "Tue, 18 Aug 2020 16:04:49 -0700", "Message-Id": "<1597791894-37041-7-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1597791894-37041-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1597791894-37041-1-git-send-email-nicolas.chautru@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 06/11] baseband/acc100: add HARQ loopback\n\tsupport", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Additional support for HARQ memory loopback\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/acc100/rte_acc100_pmd.c | 158 +++++++++++++++++++++++++++++++\n 1 file changed, 158 insertions(+)", "diff": "diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c\nindex 5f32813..b44b2f5 100644\n--- a/drivers/baseband/acc100/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc100/rte_acc100_pmd.c\n@@ -658,6 +658,7 @@\n \t\t\t\tRTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE |\n \t\t\t\tRTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE |\n #ifdef ACC100_EXT_MEM\n+\t\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK |\n \t\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE |\n \t\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE |\n #endif\n@@ -1480,12 +1481,169 @@\n \treturn 1;\n }\n \n+static inline int\n+harq_loopback(struct acc100_queue *q, struct rte_bbdev_dec_op *op,\n+\t\tuint16_t total_enqueued_cbs) {\n+\tstruct acc100_fcw_ld *fcw;\n+\tunion acc100_dma_desc *desc;\n+\tint next_triplet = 1;\n+\tstruct rte_mbuf *hq_output_head, *hq_output;\n+\tuint16_t harq_in_length = op->ldpc_dec.harq_combined_input.length;\n+\tif (harq_in_length == 0) {\n+\t\trte_bbdev_log(ERR, \"Loopback of invalid null size\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tint h_comp = check_bit(op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_HARQ_6BIT_COMPRESSION\n+\t\t\t) ? 1 : 0;\n+\tif (h_comp == 1)\n+\t\tharq_in_length = harq_in_length * 8 / 6;\n+\tharq_in_length = RTE_ALIGN(harq_in_length, 64);\n+\tuint16_t harq_dma_length_in = (h_comp == 0) ?\n+\t\t\tharq_in_length :\n+\t\t\tharq_in_length * 6 / 8;\n+\tuint16_t harq_dma_length_out = harq_dma_length_in;\n+\tbool ddr_mem_in = check_bit(op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_IN_ENABLE);\n+\tunion acc100_harq_layout_data *harq_layout = q->d->harq_layout;\n+\tuint16_t harq_index = (ddr_mem_in ?\n+\t\t\top->ldpc_dec.harq_combined_input.offset :\n+\t\t\top->ldpc_dec.harq_combined_output.offset)\n+\t\t\t/ ACC100_HARQ_OFFSET;\n+\n+\tuint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)\n+\t\t\t& q->sw_ring_wrap_mask);\n+\tdesc = q->ring_addr + desc_idx;\n+\tfcw = &desc->req.fcw_ld;\n+\t/* Set the FCW from loopback into DDR */\n+\tmemset(fcw, 0, sizeof(struct acc100_fcw_ld));\n+\tfcw->FCWversion = ACC100_FCW_VER;\n+\tfcw->qm = 2;\n+\tfcw->Zc = 384;\n+\tif (harq_in_length < 16 * N_ZC_1)\n+\t\tfcw->Zc = 16;\n+\tfcw->ncb = fcw->Zc * N_ZC_1;\n+\tfcw->rm_e = 2;\n+\tfcw->hcin_en = 1;\n+\tfcw->hcout_en = 1;\n+\n+\trte_bbdev_log(DEBUG, \"Loopback IN %d Index %d offset %d length %d %d\\n\",\n+\t\t\tddr_mem_in, harq_index,\n+\t\t\tharq_layout[harq_index].offset, harq_in_length,\n+\t\t\tharq_dma_length_in);\n+\n+\tif (ddr_mem_in && (harq_layout[harq_index].offset > 0)) {\n+\t\tfcw->hcin_size0 = harq_layout[harq_index].size0;\n+\t\tfcw->hcin_offset = harq_layout[harq_index].offset;\n+\t\tfcw->hcin_size1 = harq_in_length - fcw->hcin_offset;\n+\t\tharq_dma_length_in = (fcw->hcin_size0 + fcw->hcin_size1);\n+\t\tif (h_comp == 1)\n+\t\t\tharq_dma_length_in = harq_dma_length_in * 6 / 8;\n+\t} else {\n+\t\tfcw->hcin_size0 = harq_in_length;\n+\t}\n+\tharq_layout[harq_index].val = 0;\n+\trte_bbdev_log(DEBUG, \"Loopback FCW Config %d %d %d\\n\",\n+\t\t\tfcw->hcin_size0, fcw->hcin_offset, fcw->hcin_size1);\n+\tfcw->hcout_size0 = harq_in_length;\n+\tfcw->hcin_decomp_mode = h_comp;\n+\tfcw->hcout_comp_mode = h_comp;\n+\tfcw->gain_i = 1;\n+\tfcw->gain_h = 1;\n+\n+\t/* Set the prefix of descriptor. This could be done at polling */\n+\tdesc->req.word0 = ACC100_DMA_DESC_TYPE;\n+\tdesc->req.word1 = 0; /**< Timestamp could be disabled */\n+\tdesc->req.word2 = 0;\n+\tdesc->req.word3 = 0;\n+\tdesc->req.numCBs = 1;\n+\n+\t/* Null LLR input for Decoder */\n+\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\tq->lb_in_addr_phys;\n+\tdesc->req.data_ptrs[next_triplet].blen = 2;\n+\tdesc->req.data_ptrs[next_triplet].blkid = ACC100_DMA_BLKID_IN;\n+\tdesc->req.data_ptrs[next_triplet].last = 0;\n+\tdesc->req.data_ptrs[next_triplet].dma_ext = 0;\n+\tnext_triplet++;\n+\n+\t/* HARQ Combine input from either Memory interface */\n+\tif (!ddr_mem_in) {\n+\t\tnext_triplet = acc100_dma_fill_blk_type_out(&desc->req,\n+\t\t\t\top->ldpc_dec.harq_combined_input.data,\n+\t\t\t\top->ldpc_dec.harq_combined_input.offset,\n+\t\t\t\tharq_dma_length_in,\n+\t\t\t\tnext_triplet,\n+\t\t\t\tACC100_DMA_BLKID_IN_HARQ);\n+\t} else {\n+\t\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\t\top->ldpc_dec.harq_combined_input.offset;\n+\t\tdesc->req.data_ptrs[next_triplet].blen =\n+\t\t\t\tharq_dma_length_in;\n+\t\tdesc->req.data_ptrs[next_triplet].blkid =\n+\t\t\t\tACC100_DMA_BLKID_IN_HARQ;\n+\t\tdesc->req.data_ptrs[next_triplet].dma_ext = 1;\n+\t\tnext_triplet++;\n+\t}\n+\tdesc->req.data_ptrs[next_triplet - 1].last = 1;\n+\tdesc->req.m2dlen = next_triplet;\n+\n+\t/* Dropped decoder hard output */\n+\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\tq->lb_out_addr_phys;\n+\tdesc->req.data_ptrs[next_triplet].blen = BYTES_IN_WORD;\n+\tdesc->req.data_ptrs[next_triplet].blkid = ACC100_DMA_BLKID_OUT_HARD;\n+\tdesc->req.data_ptrs[next_triplet].last = 0;\n+\tdesc->req.data_ptrs[next_triplet].dma_ext = 0;\n+\tnext_triplet++;\n+\n+\t/* HARQ Combine output to either Memory interface */\n+\tif (check_bit(op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_OUT_ENABLE\n+\t\t\t)) {\n+\t\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\t\top->ldpc_dec.harq_combined_output.offset;\n+\t\tdesc->req.data_ptrs[next_triplet].blen =\n+\t\t\t\tharq_dma_length_out;\n+\t\tdesc->req.data_ptrs[next_triplet].blkid =\n+\t\t\t\tACC100_DMA_BLKID_OUT_HARQ;\n+\t\tdesc->req.data_ptrs[next_triplet].dma_ext = 1;\n+\t\tnext_triplet++;\n+\t} else {\n+\t\thq_output_head = op->ldpc_dec.harq_combined_output.data;\n+\t\thq_output = op->ldpc_dec.harq_combined_output.data;\n+\t\tnext_triplet = acc100_dma_fill_blk_type_out(\n+\t\t\t\t&desc->req,\n+\t\t\t\top->ldpc_dec.harq_combined_output.data,\n+\t\t\t\top->ldpc_dec.harq_combined_output.offset,\n+\t\t\t\tharq_dma_length_out,\n+\t\t\t\tnext_triplet,\n+\t\t\t\tACC100_DMA_BLKID_OUT_HARQ);\n+\t\t/* HARQ output */\n+\t\tmbuf_append(hq_output_head, hq_output, harq_dma_length_out);\n+\t\top->ldpc_dec.harq_combined_output.length =\n+\t\t\t\tharq_dma_length_out;\n+\t}\n+\tdesc->req.data_ptrs[next_triplet - 1].last = 1;\n+\tdesc->req.d2mlen = next_triplet - desc->req.m2dlen;\n+\tdesc->req.op_addr = op;\n+\n+\t/* One CB (one op) was successfully prepared to enqueue */\n+\treturn 1;\n+}\n+\n /** Enqueue one decode operations for ACC100 device in CB mode */\n static inline int\n enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,\n \t\tuint16_t total_enqueued_cbs, bool same_op)\n {\n \tint ret;\n+\tif (unlikely(check_bit(op->ldpc_dec.op_flags,\n+\t\t\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK))) {\n+\t\tret = harq_loopback(q, op, total_enqueued_cbs);\n+\t\treturn ret;\n+\t}\n \n \tunion acc100_dma_desc *desc;\n \tuint16_t desc_idx = ((q->sw_ring_head + total_enqueued_cbs)\n", "prefixes": [ "v2", "06/11" ] }{ "id": 75649, "url": "