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GET /api/patches/75306/?format=api
http://patches.dpdk.org/api/patches/75306/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200807155859.63888-10-ciara.power@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200807155859.63888-10-ciara.power@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200807155859.63888-10-ciara.power@intel.com", "date": "2020-08-07T15:58:56", "name": "[20.11,09/12] net/ice: add checks for max SIMD bitwidth", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "efd72bd5e0f4f0a2508aae196e560525463e8c22", "submitter": { "id": 978, "url": "http://patches.dpdk.org/api/people/978/?format=api", "name": "Power, Ciara", "email": "ciara.power@intel.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200807155859.63888-10-ciara.power@intel.com/mbox/", "series": [ { "id": 11550, "url": "http://patches.dpdk.org/api/series/11550/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11550", "date": "2020-08-07T15:58:47", "name": "add max SIMD bitwidth to EAL", "version": 1, "mbox": "http://patches.dpdk.org/series/11550/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/75306/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/75306/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1DF0CA04B0;\n\tFri, 7 Aug 2020 18:08:10 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2775F1C0CE;\n\tFri, 7 Aug 2020 18:06:43 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 431F91C0DB\n for <dev@dpdk.org>; Fri, 7 Aug 2020 18:06:39 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Aug 2020 09:06:38 -0700", "from silpixa00399953.ir.intel.com (HELO\n silpixa00399953.ger.corp.intel.com) ([10.237.222.53])\n by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:37 -0700" ], "IronPort-SDR": [ "\n hnrXzW88QM5UpYJoUaUTKRazcjjhHEuY2zaVL0Xbm8Kq826Tufu0MJAlKyDRMf72Wx7ozv84PP\n cmmLg3OPhliA==", "\n 0IbuKoRR0YXpS5xtIWmAGtsmRICqW7WjhhNF+wP+qDywupkqwJnvkq92XtUYqAXCzzzFjMfbZr\n AP6ooE3MeQjQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9705\"; a=\"171183098\"", "E=Sophos;i=\"5.75,446,1589266800\"; d=\"scan'208\";a=\"171183098\"", "E=Sophos;i=\"5.75,446,1589266800\"; d=\"scan'208\";a=\"275407926\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Ciara Power <ciara.power@intel.com>", "To": "dev@dpdk.org", "Cc": "bruce.richardson@intel.com, Ciara Power <ciara.power@intel.com>,\n Qiming Yang <qiming.yang@intel.com>, Qi Zhang <qi.z.zhang@intel.com>", "Date": "Fri, 7 Aug 2020 16:58:56 +0100", "Message-Id": "<20200807155859.63888-10-ciara.power@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20200807155859.63888-1-ciara.power@intel.com>", "References": "<20200807155859.63888-1-ciara.power@intel.com>", "Subject": "[dpdk-dev] [PATCH 20.11 09/12] net/ice: add checks for max SIMD\n\tbitwidth", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When choosing a vector path to take, an extra condition must be\nsatisfied to ensure the max SIMD bitwidth allows for the CPU enabled\npath.\n\nCc: Qiming Yang <qiming.yang@intel.com>\nCc: Qi Zhang <qi.z.zhang@intel.com>\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n---\n drivers/net/ice/ice_rxtx.c | 20 ++++++++++++++------\n 1 file changed, 14 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 2e1f06d2c0..eda2d9a8c7 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -2889,7 +2889,9 @@ ice_set_rx_function(struct rte_eth_dev *dev)\n \tbool use_avx2 = false;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n-\t\tif (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed) {\n+\t\tif (!ice_rx_vec_dev_check(dev) && ad->rx_bulk_alloc_allowed &&\n+\t\t\t\trte_get_max_simd_bitwidth()\n+\t\t\t\t>= RTE_MAX_128_SIMD) {\n \t\t\tad->rx_vec_allowed = true;\n \t\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n \t\t\t\trxq = dev->data->rx_queues[i];\n@@ -2899,8 +2901,10 @@ ice_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t\t}\n \t\t\t}\n \n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n-\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)\n+\t\t\tif ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n+\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&\n+\t\t\t\t\trte_get_max_simd_bitwidth()\n+\t\t\t\t\t>= RTE_MAX_256_SIMD)\n \t\t\t\tuse_avx2 = true;\n \n \t\t} else {\n@@ -3067,7 +3071,9 @@ ice_set_tx_function(struct rte_eth_dev *dev)\n \tbool use_avx2 = false;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n-\t\tif (!ice_tx_vec_dev_check(dev)) {\n+\t\tif (!ice_tx_vec_dev_check(dev) &&\n+\t\t\t\trte_get_max_simd_bitwidth()\n+\t\t\t\t>= RTE_MAX_128_SIMD) {\n \t\t\tad->tx_vec_allowed = true;\n \t\t\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n \t\t\t\ttxq = dev->data->tx_queues[i];\n@@ -3077,8 +3083,10 @@ ice_set_tx_function(struct rte_eth_dev *dev)\n \t\t\t\t}\n \t\t\t}\n \n-\t\t\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n-\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)\n+\t\t\tif ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 ||\n+\t\t\trte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1) &&\n+\t\t\t\t\trte_get_max_simd_bitwidth()\n+\t\t\t\t\t>= RTE_MAX_256_SIMD)\n \t\t\t\tuse_avx2 = true;\n \n \t\t} else {\n", "prefixes": [ "20.11", "09/12" ] }{ "id": 75306, "url": "