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GET /api/patches/75299/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 75299,
    "url": "http://patches.dpdk.org/api/patches/75299/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200807155859.63888-3-ciara.power@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200807155859.63888-3-ciara.power@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200807155859.63888-3-ciara.power@intel.com",
    "date": "2020-08-07T15:58:49",
    "name": "[20.11,02/12] eal: add default SIMD bitwidth values",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "65f6ee95ac953f100ca0b2c2c3936c72acd10ea1",
    "submitter": {
        "id": 978,
        "url": "http://patches.dpdk.org/api/people/978/?format=api",
        "name": "Power, Ciara",
        "email": "ciara.power@intel.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200807155859.63888-3-ciara.power@intel.com/mbox/",
    "series": [
        {
            "id": 11550,
            "url": "http://patches.dpdk.org/api/series/11550/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11550",
            "date": "2020-08-07T15:58:47",
            "name": "add max SIMD bitwidth to EAL",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/11550/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/75299/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/75299/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B1156A04B0;\n\tFri,  7 Aug 2020 18:06:50 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 53B0B1C0AD;\n\tFri,  7 Aug 2020 18:06:32 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by dpdk.org (Postfix) with ESMTP id 8AB722C39\n for <dev@dpdk.org>; Fri,  7 Aug 2020 18:06:29 +0200 (CEST)",
            "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Aug 2020 09:06:29 -0700",
            "from silpixa00399953.ir.intel.com (HELO\n silpixa00399953.ger.corp.intel.com) ([10.237.222.53])\n by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:27 -0700"
        ],
        "IronPort-SDR": [
            "\n lq4cy9zZviMkJmb0LkEcTR76L7e9pO+95/OSTYg/+zuaRnfIeLcMZS+xwT9Ss1beTmc/2TseZp\n ecbRfyPU5EuQ==",
            "\n mK0lEBhamH/tuBv/vf8jMXLN4hyvSt/AgFCyEiZjrO0pLPQDCpOUIq8aYnGiG55b3zcxJz9+ya\n 8d9te3IpkHLg=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9705\"; a=\"171183022\"",
            "E=Sophos;i=\"5.75,446,1589266800\"; d=\"scan'208\";a=\"171183022\"",
            "E=Sophos;i=\"5.75,446,1589266800\"; d=\"scan'208\";a=\"275407882\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Ciara Power <ciara.power@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "bruce.richardson@intel.com, Ciara Power <ciara.power@intel.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Jerin Jacob <jerinj@marvell.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n David Christensen <drc@linux.vnet.ibm.com>",
        "Date": "Fri,  7 Aug 2020 16:58:49 +0100",
        "Message-Id": "<20200807155859.63888-3-ciara.power@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200807155859.63888-1-ciara.power@intel.com>",
        "References": "<20200807155859.63888-1-ciara.power@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 20.11 02/12] eal: add default SIMD bitwidth values",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Each arch has a define for the default SIMD bitwidth value, this is used\non EAL init to set the config max SIMD bitwidth.\n\nCc: Ruifeng Wang <ruifeng.wang@arm.com>\nCc: Jerin Jacob <jerinj@marvell.com>\nCc: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nCc: David Christensen <drc@linux.vnet.ibm.com>\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n---\n lib/librte_eal/arm/include/rte_vect.h      | 2 ++\n lib/librte_eal/common/eal_common_options.c | 3 +++\n lib/librte_eal/include/generic/rte_vect.h  | 2 ++\n lib/librte_eal/ppc/include/rte_vect.h      | 2 ++\n lib/librte_eal/x86/include/rte_vect.h      | 2 ++\n 5 files changed, 11 insertions(+)",
    "diff": "diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h\nindex 01c51712a1..7487a53862 100644\n--- a/lib/librte_eal/arm/include/rte_vect.h\n+++ b/lib/librte_eal/arm/include/rte_vect.h\n@@ -14,6 +14,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n typedef int32x4_t xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c\nindex 90f4e8f5c3..c2a9624f89 100644\n--- a/lib/librte_eal/common/eal_common_options.c\n+++ b/lib/librte_eal/common/eal_common_options.c\n@@ -35,6 +35,7 @@\n #ifndef RTE_EXEC_ENV_WINDOWS\n #include <rte_telemetry.h>\n #endif\n+#include <rte_vect.h>\n \n #include \"eal_internal_cfg.h\"\n #include \"eal_options.h\"\n@@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg)\n \tinternal_cfg->user_mbuf_pool_ops_name = NULL;\n \tCPU_ZERO(&internal_cfg->ctrl_cpuset);\n \tinternal_cfg->init_complete = 0;\n+\tinternal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH;\n+\tinternal_cfg->max_simd_bitwidth.locked = 0;\n }\n \n static int\ndiff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/librte_eal/include/generic/rte_vect.h\nindex 3fc47979f8..e98f184a97 100644\n--- a/lib/librte_eal/include/generic/rte_vect.h\n+++ b/lib/librte_eal/include/generic/rte_vect.h\n@@ -14,6 +14,8 @@\n \n #include <stdint.h>\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n /* Unsigned vector types */\n \n /**\ndiff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h\nindex b0545c878c..70fbd0c423 100644\n--- a/lib/librte_eal/ppc/include/rte_vect.h\n+++ b/lib/librte_eal/ppc/include/rte_vect.h\n@@ -15,6 +15,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n typedef vector signed int xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\ndiff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h\nindex df5a607623..b1df75aca7 100644\n--- a/lib/librte_eal/x86/include/rte_vect.h\n+++ b/lib/librte_eal/x86/include/rte_vect.h\n@@ -35,6 +35,8 @@\n extern \"C\" {\n #endif\n \n+#define RTE_DEFAULT_SIMD_BITWIDTH 256\n+\n typedef __m128i xmm_t;\n \n #define\tXMM_SIZE\t(sizeof(xmm_t))\n",
    "prefixes": [
        "20.11",
        "02/12"
    ]
}