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GET /api/patches/74861/?format=api
{ "id": 74861, "url": "http://patches.dpdk.org/api/patches/74861/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200727174715.330117-2-parav@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200727174715.330117-2-parav@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200727174715.330117-2-parav@mellanox.com", "date": "2020-07-27T17:47:06", "name": "[v12,01/10] eal: introduce macro for bit definition", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c138ccfb01d118b79b95ffc8ef85536368fcb6c9", "submitter": { "id": 1780, "url": "http://patches.dpdk.org/api/people/1780/?format=api", "name": "Parav Pandit", "email": "parav@mellanox.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200727174715.330117-2-parav@mellanox.com/mbox/", "series": [ { "id": 11333, "url": "http://patches.dpdk.org/api/series/11333/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11333", "date": "2020-07-27T17:47:05", "name": "Improve mlx5 PMD driver framework for multiple classes", "version": 12, "mbox": "http://patches.dpdk.org/series/11333/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74861/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/74861/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=BwqtZY28M4Nr7gtAruC86z/ClWlXDk0p2ESSkwO69RI=;\n b=TH75YuyTpXJIk/4EacfoCO4PX/kazXfL+eO7SLT4PNxeU0sC2E3R7hFLarsALxmZPP/7iC47hCp5ME8VeNVVaW0MsA3vXNXfAuCt4xQse0Cz1fScXghQ7KCkQ2YZhu84ZK4Aw0Pxxp9+yIOYL7IidIABk6Cj1UNa28KXOWN+z5iy0BPqqQZQ/kldsVGfAo4fwgmj8/1Bzsgl5jx2D7tsXfxSYOdH60EbGMpB5944hPPtpIgP6uUa/qYe2pRmkvXW5EyG+GmsYKm2NOSurHsy/rNtWERI56zzLjAr9EIuS3QL/4voj2Gbj4PwA4W8esrl4obydpAdDJCZ+q6/0K+azw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=mellanox.com; dmarc=pass action=none header.from=mellanox.com;\n dkim=pass header.d=mellanox.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=BwqtZY28M4Nr7gtAruC86z/ClWlXDk0p2ESSkwO69RI=;\n b=mVYNWAZ7UAtqddzXSAxX2mQrSBg+X4n6zNO8Xr9PVBbAS90KabH6oKzgARBIhFoXIbUyqD+XcZJGBsrel24+QMCQf2znoqMRiV0ii3AsK9zJgiRiSf+sz0xAyx23/nmvW1FhKGnkfc02jCol5AXeC4UHvBdbpVJ7RRZm/VQ88Xs=", "Authentication-Results": "dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com;", "From": "Parav Pandit <parav@mellanox.com>", "To": "dev@dpdk.org, grive@u256.net, ferruh.yigit@intel.com, thomas@monjalon.net", "Cc": "rasland@mellanox.com, orika@mellanox.com, matan@mellanox.com,\n joyce.kong@arm.com, Parav Pandit <parav@mellanox.com>, =?utf-8?q?Morten_Br?=\n\t=?utf-8?q?=C3=B8rup?= <mb@smartsharesystems.com>", "Date": "Mon, 27 Jul 2020 20:47:06 +0300", "Message-Id": "<20200727174715.330117-2-parav@mellanox.com>", "X-Mailer": [ "git-send-email 2.26.2", "git-send-email 2.26.2" ], "In-Reply-To": "<20200727174715.330117-1-parav@mellanox.com>", "References": "<20200610171728.89-2-parav@mellanox.com>\n <20200727174715.330117-1-parav@mellanox.com>", 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InWYeWebcI8icFUOIxPM3Xa6yN5BZvR/yeJFs8Pa3OTfsseolQT04ecca3Ix+oxSNXJup07F9GhiHEgNqmTcyi2rNhg8F+E+u2UbfVdjuEWDqLMyUhFMASs6Vw8GIup+v1Ka81WCq/v8o+FEGAI6y47Oaeyfo5P1uEeghBpMEKFYyxtf4Z4nMaDgdQ02eHMUkzcnhL3OP4Vh2oaVaDeiLbokf26ztlHHFfaDeIoKRjiw0B0X9bhCSYSgvBLqWL85Fzqu+5eruN0e/q/o3UZpsZVWeBRYsBXH3zo5c7uhmo1fHWYNfn6LnRwW1fGkHmI7uBmvPKhajdrr8Cdiwlo+2izyedb5o7g6m9Q+/rSfCNbDKbYdDFdoIzLb5T+PdZit8RALF+uvYRKxC/22vxIlAfgn8lO5a7nG+mTUcnY7+PCip6gIMQJnLjiH+5zQHpQDKuqTVHDdWubY61zqAby0mQA3XI7CzlFk3AZ7JVzAtoX4BG5Q4FFlIWcmOW+AWcFM", "X-OriginatorOrg": "Mellanox.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n fff92490-40f4-431d-41e2-08d832552afa", "X-MS-Exchange-CrossTenant-AuthSource": "AM0PR05MB4866.eurprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Jul 2020 17:47:44.9616 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "a652971c-7d2e-4d9b-a6a4-d149256f461b", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n A/rMB4w5GzBciO0fr2JtV8CDKuo/TngmDUfkGfjwdKvJJ/+QyL7L4pVkdJr+6W3a94bFnS6+LKO5Lk//0GL1Hw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM0PR05MB6227", "Subject": "[dpdk-dev] [PATCH v12 01/10] eal: introduce macro for bit definition", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "There are several drivers which duplicate bit generation macro.\nIntroduce a generic bit macros so that such drivers avoid redefining\nsame in multiple drivers.\n\nSigned-off-by: Parav Pandit <parav@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Morten Brørup <mb@smartsharesystems.com>\n---\nChangelog:\nv11->v12:\n - Define RTE_BIT32 macro as well\n - Use RTE_BIT32 and RTE_BIT64 macros in bitops as well\nv4->v5:\n - Addressed comments from Morten Brørup\n - Renamed newly added macro to RTE_BIT64\n - Added doxygen comment section for the macro\nv1->v2:\n - Addressed comments from Thomas and Gaten.\n - Avoided new file, added macro to rte_bitops.h\n---\n lib/librte_eal/include/rte_bitops.h | 34 +++++++++++++++++++++--------\n 1 file changed, 25 insertions(+), 9 deletions(-)", "diff": "diff --git a/lib/librte_eal/include/rte_bitops.h b/lib/librte_eal/include/rte_bitops.h\nindex 740927f3b..141e8ea73 100644\n--- a/lib/librte_eal/include/rte_bitops.h\n+++ b/lib/librte_eal/include/rte_bitops.h\n@@ -17,6 +17,22 @@\n #include <rte_debug.h>\n #include <rte_compat.h>\n \n+/**\n+ * Get the uint64_t value for a specified bit set.\n+ *\n+ * @param nr\n+ * The bit number in range of 0 to 63.\n+ */\n+#define RTE_BIT64(nr) (UINT64_C(1) << (nr))\n+\n+/**\n+ * Get the uint32_t value for a specified bit set.\n+ *\n+ * @param nr\n+ * The bit number in range of 0 to 31.\n+ */\n+#define RTE_BIT32(nr) (UINT32_C(1) << (nr))\n+\n /*------------------------ 32-bit relaxed operations ------------------------*/\n \n /**\n@@ -59,7 +75,7 @@ rte_bit_relaxed_set32(unsigned int nr, volatile uint32_t *addr)\n {\n \tRTE_ASSERT(nr < 32);\n \n-\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t mask = RTE_BIT32(nr);\n \t*addr = (*addr) | mask;\n }\n \n@@ -80,7 +96,7 @@ rte_bit_relaxed_clear32(unsigned int nr, volatile uint32_t *addr)\n {\n \tRTE_ASSERT(nr < 32);\n \n-\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t mask = RTE_BIT32(nr);\n \t*addr = (*addr) & (~mask);\n }\n \n@@ -104,7 +120,7 @@ rte_bit_relaxed_test_and_set32(unsigned int nr, volatile uint32_t *addr)\n {\n \tRTE_ASSERT(nr < 32);\n \n-\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t mask = RTE_BIT32(nr);\n \tuint32_t val = *addr;\n \t*addr = val | mask;\n \treturn val & mask;\n@@ -130,7 +146,7 @@ rte_bit_relaxed_test_and_clear32(unsigned int nr, volatile uint32_t *addr)\n {\n \tRTE_ASSERT(nr < 32);\n \n-\tuint32_t mask = UINT32_C(1) << nr;\n+\tuint32_t mask = RTE_BIT32(nr);\n \tuint32_t val = *addr;\n \t*addr = val & (~mask);\n \treturn val & mask;\n@@ -157,7 +173,7 @@ rte_bit_relaxed_get64(unsigned int nr, volatile uint64_t *addr)\n {\n \tRTE_ASSERT(nr < 64);\n \n-\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t mask = RTE_BIT64(nr);\n \treturn (*addr) & mask;\n }\n \n@@ -178,7 +194,7 @@ rte_bit_relaxed_set64(unsigned int nr, volatile uint64_t *addr)\n {\n \tRTE_ASSERT(nr < 64);\n \n-\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t mask = RTE_BIT64(nr);\n \t(*addr) = (*addr) | mask;\n }\n \n@@ -199,7 +215,7 @@ rte_bit_relaxed_clear64(unsigned int nr, volatile uint64_t *addr)\n {\n \tRTE_ASSERT(nr < 64);\n \n-\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t mask = RTE_BIT64(nr);\n \t*addr = (*addr) & (~mask);\n }\n \n@@ -223,7 +239,7 @@ rte_bit_relaxed_test_and_set64(unsigned int nr, volatile uint64_t *addr)\n {\n \tRTE_ASSERT(nr < 64);\n \n-\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t mask = RTE_BIT64(nr);\n \tuint64_t val = *addr;\n \t*addr = val | mask;\n \treturn val;\n@@ -249,7 +265,7 @@ rte_bit_relaxed_test_and_clear64(unsigned int nr, volatile uint64_t *addr)\n {\n \tRTE_ASSERT(nr < 64);\n \n-\tuint64_t mask = UINT64_C(1) << nr;\n+\tuint64_t mask = RTE_BIT64(nr);\n \tuint64_t val = *addr;\n \t*addr = val & (~mask);\n \treturn val & mask;\n", "prefixes": [ "v12", "01/10" ] }