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GET /api/patches/74053/?format=api
{ "id": 74053, "url": "http://patches.dpdk.org/api/patches/74053/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-11-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1594794114-16313-11-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1594794114-16313-11-git-send-email-viacheslavo@mellanox.com", "date": "2020-07-15T06:21:47", "name": "[v2,10/17] net/mlx5: prepare Tx queue structures to support timestamp", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "772424c92126a63691e6e3d05d390c280f82b8ea", "submitter": { "id": 1102, "url": "http://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-11-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 11032, "url": "http://patches.dpdk.org/api/series/11032/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11032", "date": "2020-07-15T06:21:37", "name": "net/mlx5: introduce accurate packet Tx scheduling", "version": 2, "mbox": "http://patches.dpdk.org/series/11032/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74053/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/74053/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CBC7AA0540;\n\tWed, 15 Jul 2020 08:23:59 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C2A8C1C1A9;\n\tWed, 15 Jul 2020 08:22:26 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 96DC41C136\n for <dev@dpdk.org>; Wed, 15 Jul 2020 08:22:17 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com) with SMTP; 15 Jul 2020 09:22:14 +0300", "from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx\n [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06F6MEoX007052;\n Wed, 15 Jul 2020 09:22:14 +0300", "from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06F6MEAT016448;\n Wed, 15 Jul 2020 06:22:14 GMT", "(from viacheslavo@localhost)\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06F6ME3P016447;\n Wed, 15 Jul 2020 06:22:14 GMT" ], "X-Authentication-Warning": "pegasus12.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, olivier.matz@6wind.com,\n thomas@monjalon.net, ferruh.yigit@intel.com", "Date": "Wed, 15 Jul 2020 06:21:47 +0000", "Message-Id": "<1594794114-16313-11-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1591771085-24959-1-git-send-email-viacheslavo@mellanox.com>\n <1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 10/17] net/mlx5: prepare Tx queue structures\n\tto support timestamp", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The fields to support send scheduling on dynamic timestamp\nfield are introduced and initialized on device start.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxtx.h | 4 ++++\n drivers/net/mlx5/mlx5_trigger.c | 2 ++\n drivers/net/mlx5/mlx5_txq.c | 32 ++++++++++++++++++++++++++++++++\n 3 files changed, 38 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 8a8d2b5..974a847 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -313,6 +313,9 @@ struct mlx5_txq_data {\n \tvolatile uint32_t *cq_db; /* Completion queue doorbell. */\n \tuint16_t port_id; /* Port ID of device. */\n \tuint16_t idx; /* Queue index. */\n+\tuint64_t ts_mask; /* Timestamp flag dynamic mask. */\n+\tint32_t ts_offset; /* Timestamp field dynamic offset. */\n+\tstruct mlx5_dev_ctx_shared *sh; /* Shared context. */\n \tstruct mlx5_txq_stats stats; /* TX queue counters. */\n #ifndef RTE_ARCH_64\n \trte_spinlock_t *uar_lock;\n@@ -468,6 +471,7 @@ struct mlx5_txq_ctrl *mlx5_txq_hairpin_new\n void txq_alloc_elts(struct mlx5_txq_ctrl *txq_ctrl);\n void txq_free_elts(struct mlx5_txq_ctrl *txq_ctrl);\n uint64_t mlx5_get_tx_port_offloads(struct rte_eth_dev *dev);\n+void mlx5_txq_dynf_timestamp_set(struct rte_eth_dev *dev);\n \n /* mlx5_rxtx.c */\n \ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex e324319..29aef54 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -331,6 +331,8 @@\n \t}\n \t/* Set a mask and offset of dynamic metadata flows into Rx queues*/\n \tmlx5_flow_rxq_dynf_metadata_set(dev);\n+\t/* Set a mask and offset of scheduling on timestamp into Tx queues*/\n+\tmlx5_txq_dynf_timestamp_set(dev);\n \t/*\n \t * In non-cached mode, it only needs to start the default mreg copy\n \t * action and no flow created by application exists anymore.\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex f9ed504..7f6a40a 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -1785,3 +1785,35 @@ struct mlx5_txq_ctrl *\n \t}\n \treturn ret;\n }\n+\n+/**\n+ * Set the Tx queue dynamic timestamp (mask and offset)\n+ *\n+ * @param[in] dev\n+ * Pointer to the Ethernet device structure.\n+ */\n+void\n+mlx5_txq_dynf_timestamp_set(struct rte_eth_dev *dev)\n+{\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_ctx_shared *sh = priv->sh;\n+\tstruct mlx5_txq_data *data;\n+\tint off, nbit;\n+\tunsigned int i;\n+\tuint64_t mask = 0;\n+\n+\tnbit = rte_mbuf_dynflag_lookup\n+\t\t\t\t(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL);\n+\toff = rte_mbuf_dynfield_lookup\n+\t\t\t\t(RTE_MBUF_DYNFIELD_TIMESTAMP_NAME, NULL);\n+\tif (nbit > 0 && off >= 0 && sh->txpp.refcnt)\n+\t\tmask = 1ULL << nbit;\n+\tfor (i = 0; i != priv->txqs_n; ++i) {\n+\t\tdata = (*priv->txqs)[i];\n+\t\tif (!data)\n+\t\t\tcontinue;\n+\t\tdata->sh = sh;\n+\t\tdata->ts_mask = mask;\n+\t\tdata->ts_offset = off;\n+\t}\n+}\n", "prefixes": [ "v2", "10/17" ] }