Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/74052/?format=api
{ "id": 74052, "url": "http://patches.dpdk.org/api/patches/74052/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-12-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1594794114-16313-12-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1594794114-16313-12-git-send-email-viacheslavo@mellanox.com", "date": "2020-07-15T06:21:48", "name": "[v2,11/17] net/mlx5: convert timestamp to completion index", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "44b69239d689d5c23d2061df055606e7dd8a8303", "submitter": { "id": 1102, "url": "http://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-12-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 11032, "url": "http://patches.dpdk.org/api/series/11032/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11032", "date": "2020-07-15T06:21:37", "name": "net/mlx5: introduce accurate packet Tx scheduling", "version": 2, "mbox": "http://patches.dpdk.org/series/11032/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/74052/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/74052/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CE60A0540;\n\tWed, 15 Jul 2020 08:23:48 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 783121C1A0;\n\tWed, 15 Jul 2020 08:22:25 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id AA0E31C137\n for <dev@dpdk.org>; Wed, 15 Jul 2020 08:22:17 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com) with SMTP; 15 Jul 2020 09:22:15 +0300", "from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx\n [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06F6MFHc007057;\n Wed, 15 Jul 2020 09:22:15 +0300", "from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06F6MFRF016450;\n Wed, 15 Jul 2020 06:22:15 GMT", "(from viacheslavo@localhost)\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06F6MFKr016449;\n Wed, 15 Jul 2020 06:22:15 GMT" ], "X-Authentication-Warning": "pegasus12.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, olivier.matz@6wind.com,\n thomas@monjalon.net, ferruh.yigit@intel.com", "Date": "Wed, 15 Jul 2020 06:21:48 +0000", "Message-Id": "<1594794114-16313-12-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1591771085-24959-1-git-send-email-viacheslavo@mellanox.com>\n <1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 11/17] net/mlx5: convert timestamp to\n\tcompletion index", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The application provides timestamps in Tx mbuf as clocks,\nthe hardware performs scheduling on Clock Queue completion index\nmatch. This patch introduces the timestamp-to-completion-index\ninline routine.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_rxtx.h | 55 ++++++++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_txpp.c | 5 ++++\n 3 files changed, 62 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex e599bbb..a61394c 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -585,6 +585,8 @@ struct mlx5_dev_txpp {\n \trte_atomic32_t err_miss_int; /* Missed service interrupt. */\n \trte_atomic32_t err_rearm_queue; /* Rearm Queue errors. */\n \trte_atomic32_t err_clock_queue; /* Clock Queue errors. */\n+\trte_atomic32_t err_ts_past; /* Timestamp in the past. */\n+\trte_atomic32_t err_ts_future; /* Timestamp in the distant future. */\n };\n \n /*\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 974a847..d082cd7 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -719,4 +719,59 @@ int mlx5_dma_unmap(struct rte_pci_device *pdev, void *addr, uint64_t iova,\n \treturn (ts & UINT32_MAX) + (ts >> 32) * NS_PER_S;\n }\n \n+/**\n+ * Convert timestamp from mbuf format to linear counter\n+ * of Clock Queue completions (24 bits)\n+ *\n+ * @param sh\n+ * Pointer to the device shared context to fetch Tx\n+ * packet pacing timestamp and parameters.\n+ * @param ts\n+ * Timestamp from mbuf to convert.\n+ * @return\n+ * positive or zero value - completion ID to wait\n+ * negative value - conversion error\n+ */\n+static __rte_always_inline int32_t\n+mlx5_txpp_convert_tx_ts(struct mlx5_dev_ctx_shared *sh, uint64_t mts)\n+{\n+\tuint64_t ts, ci;\n+\tuint32_t tick;\n+\n+\tdo {\n+\t\t/*\n+\t\t * Read atomically two uint64_t fields and compare lsb bits.\n+\t\t * It there is no match - the timestamp was updated in\n+\t\t * the service thread, data should be re-read.\n+\t\t */\n+\t\trte_compiler_barrier();\n+\t\tci = rte_atomic64_read(&sh->txpp.ts.ci_ts);\n+\t\tts = rte_atomic64_read(&sh->txpp.ts.ts);\n+\t\trte_compiler_barrier();\n+\t\tif (!((ts ^ ci) << (64 - MLX5_CQ_INDEX_WIDTH)))\n+\t\t\tbreak;\n+\t} while (true);\n+\t/* Perform the skew correction, positive value to send earlier. */\n+\tmts -= sh->txpp.skew;\n+\tmts -= ts;\n+\tif (unlikely(mts >= UINT64_MAX / 2)) {\n+\t\t/* We have negative integer, mts is in the past. */\n+\t\trte_atomic32_inc(&sh->txpp.err_ts_past);\n+\t\treturn -1;\n+\t}\n+\ttick = sh->txpp.tick;\n+\tMLX5_ASSERT(tick);\n+\t/* Convert delta to completions, round up. */\n+\tmts = (mts + tick - 1) / tick;\n+\tif (unlikely(mts >= (1 << MLX5_CQ_INDEX_WIDTH) / 2 - 1)) {\n+\t\t/* We have mts is too distant future. */\n+\t\trte_atomic32_inc(&sh->txpp.err_ts_future);\n+\t\treturn -1;\n+\t}\n+\tmts <<= 64 - MLX5_CQ_INDEX_WIDTH;\n+\tci += mts;\n+\tci >>= 64 - MLX5_CQ_INDEX_WIDTH;\n+\treturn ci;\n+}\n+\n #endif /* RTE_PMD_MLX5_RXTX_H_ */\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex 17d64ff..799b20a 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -858,6 +858,11 @@\n \tint flags;\n \tint ret;\n \n+\trte_atomic32_set(&sh->txpp.err_miss_int, 0);\n+\trte_atomic32_set(&sh->txpp.err_rearm_queue, 0);\n+\trte_atomic32_set(&sh->txpp.err_clock_queue, 0);\n+\trte_atomic32_set(&sh->txpp.err_ts_past, 0);\n+\trte_atomic32_set(&sh->txpp.err_ts_future, 0);\n \t/* Attach interrupt handler to process Rearm Queue completions. */\n \tflags = fcntl(sh->txpp.echan->fd, F_GETFL);\n \tret = fcntl(sh->txpp.echan->fd, F_SETFL, flags | O_NONBLOCK);\n", "prefixes": [ "v2", "11/17" ] }