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{
    "id": 74050,
    "url": "http://patches.dpdk.org/api/patches/74050/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-13-git-send-email-viacheslavo@mellanox.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1594794114-16313-13-git-send-email-viacheslavo@mellanox.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1594794114-16313-13-git-send-email-viacheslavo@mellanox.com",
    "date": "2020-07-15T06:21:49",
    "name": "[v2,12/17] net/mlx5: prepare Tx datapath to support sheduling",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ada88ddde02f6a62b23c5adbf645e30a3c105a48",
    "submitter": {
        "id": 1102,
        "url": "http://patches.dpdk.org/api/people/1102/?format=api",
        "name": "Slava Ovsiienko",
        "email": "viacheslavo@mellanox.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1594794114-16313-13-git-send-email-viacheslavo@mellanox.com/mbox/",
    "series": [
        {
            "id": 11032,
            "url": "http://patches.dpdk.org/api/series/11032/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11032",
            "date": "2020-07-15T06:21:37",
            "name": "net/mlx5: introduce accurate packet Tx scheduling",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/11032/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/74050/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/74050/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 71F14A0540;\n\tWed, 15 Jul 2020 08:23:31 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8B8FA1C197;\n\tWed, 15 Jul 2020 08:22:22 +0200 (CEST)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id BCA9C1C138\n for <dev@dpdk.org>; Wed, 15 Jul 2020 08:22:17 +0200 (CEST)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com) with SMTP; 15 Jul 2020 09:22:16 +0300",
            "from pegasus12.mtr.labs.mlnx (pegasus12.mtr.labs.mlnx\n [10.210.17.40])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 06F6MGmH007060;\n Wed, 15 Jul 2020 09:22:16 +0300",
            "from pegasus12.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 06F6MG24016452;\n Wed, 15 Jul 2020 06:22:16 GMT",
            "(from viacheslavo@localhost)\n by pegasus12.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 06F6MGDE016451;\n Wed, 15 Jul 2020 06:22:16 GMT"
        ],
        "X-Authentication-Warning": "pegasus12.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f",
        "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>",
        "To": "dev@dpdk.org",
        "Cc": "matan@mellanox.com, rasland@mellanox.com, olivier.matz@6wind.com,\n thomas@monjalon.net, ferruh.yigit@intel.com",
        "Date": "Wed, 15 Jul 2020 06:21:49 +0000",
        "Message-Id": "<1594794114-16313-13-git-send-email-viacheslavo@mellanox.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>",
        "References": "<1591771085-24959-1-git-send-email-viacheslavo@mellanox.com>\n <1594794114-16313-1-git-send-email-viacheslavo@mellanox.com>",
        "Subject": "[dpdk-dev] [PATCH v2 12/17] net/mlx5: prepare Tx datapath to\n\tsupport sheduling",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The new static control flag is introduced to control\nroutine generating from template, enabling the scheduling\non timestamps.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxtx.c | 97 +++++++++++++++++++++++++++++++++++++++++++-\n drivers/net/mlx5/mlx5_txq.c  |  2 +\n 2 files changed, 97 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex 227289e..76fe12b 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -66,6 +66,7 @@ enum mlx5_txcmp_code {\n #define MLX5_TXOFF_CONFIG_METADATA (1u << 6) /* Flow metadata. */\n #define MLX5_TXOFF_CONFIG_EMPW (1u << 8) /* Enhanced MPW supported.*/\n #define MLX5_TXOFF_CONFIG_MPW (1u << 9) /* Legacy MPW supported.*/\n+#define MLX5_TXOFF_CONFIG_TXPP (1u << 10) /* Scheduling on timestamp.*/\n \n /* The most common offloads groups. */\n #define MLX5_TXOFF_CONFIG_NONE 0\n@@ -5268,6 +5269,45 @@ enum mlx5_txcmp_code {\n \t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_VLAN |\n \t\tMLX5_TXOFF_CONFIG_METADATA)\n \n+/* Generate routines with timestamp scheduling. */\n+MLX5_TXOFF_DECL(full_ts_nompw,\n+\t\tMLX5_TXOFF_CONFIG_FULL | MLX5_TXOFF_CONFIG_TXPP)\n+\n+MLX5_TXOFF_DECL(full_ts_nompwi,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_SWP | MLX5_TXOFF_CONFIG_CSUM |\n+\t\tMLX5_TXOFF_CONFIG_VLAN | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP)\n+\n+MLX5_TXOFF_DECL(full_ts,\n+\t\tMLX5_TXOFF_CONFIG_FULL | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_DECL(full_ts_noi,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_SWP | MLX5_TXOFF_CONFIG_CSUM |\n+\t\tMLX5_TXOFF_CONFIG_VLAN | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_DECL(none_ts,\n+\t\tMLX5_TXOFF_CONFIG_NONE | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_DECL(mdi_ts,\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_DECL(mti_ts,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_DECL(mtiv_ts,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_VLAN |\n+\t\tMLX5_TXOFF_CONFIG_METADATA | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n /*\n  * Generate routines with Legacy Multi-Packet Write support.\n  * This mode is supported by ConnectX-4 Lx only and imposes\n@@ -5372,6 +5412,44 @@ enum mlx5_txcmp_code {\n \t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_VLAN |\n \t\tMLX5_TXOFF_CONFIG_METADATA | MLX5_TXOFF_CONFIG_EMPW)\n \n+MLX5_TXOFF_INFO(full_ts_nompw,\n+\t\tMLX5_TXOFF_CONFIG_FULL | MLX5_TXOFF_CONFIG_TXPP)\n+\n+MLX5_TXOFF_INFO(full_ts_nompwi,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_SWP | MLX5_TXOFF_CONFIG_CSUM |\n+\t\tMLX5_TXOFF_CONFIG_VLAN | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP)\n+\n+MLX5_TXOFF_INFO(full_ts,\n+\t\tMLX5_TXOFF_CONFIG_FULL | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_INFO(full_ts_noi,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_SWP | MLX5_TXOFF_CONFIG_CSUM |\n+\t\tMLX5_TXOFF_CONFIG_VLAN | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_INFO(none_ts,\n+\t\tMLX5_TXOFF_CONFIG_NONE | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_INFO(mdi_ts,\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_INFO(mti_ts,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_METADATA |\n+\t\tMLX5_TXOFF_CONFIG_TXPP | MLX5_TXOFF_CONFIG_EMPW)\n+\n+MLX5_TXOFF_INFO(mtiv_ts,\n+\t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n+\t\tMLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_VLAN |\n+\t\tMLX5_TXOFF_CONFIG_METADATA | MLX5_TXOFF_CONFIG_TXPP |\n+\t\tMLX5_TXOFF_CONFIG_EMPW)\n+\n MLX5_TXOFF_INFO(full,\n \t\tMLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_TSO |\n \t\tMLX5_TXOFF_CONFIG_SWP |\tMLX5_TXOFF_CONFIG_CSUM |\n@@ -5518,6 +5596,14 @@ enum mlx5_txcmp_code {\n \t\t/* We should support VLAN insertion. */\n \t\tolx |= MLX5_TXOFF_CONFIG_VLAN;\n \t}\n+\tif (tx_offloads & DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP &&\n+\t    rte_mbuf_dynflag_lookup\n+\t\t\t(RTE_MBUF_DYNFLAG_TX_TIMESTAMP_NAME, NULL) > 0 &&\n+\t    rte_mbuf_dynfield_lookup\n+\t\t\t(RTE_MBUF_DYNFIELD_TIMESTAMP_NAME, NULL) > 0) {\n+\t\t/* Offload configured, dynamic entities registered. */\n+\t\tolx |= MLX5_TXOFF_CONFIG_TXPP;\n+\t}\n \tif (priv->txqs_n && (*priv->txqs)[0]) {\n \t\tstruct mlx5_txq_data *txd = (*priv->txqs)[0];\n \n@@ -5587,6 +5673,9 @@ enum mlx5_txcmp_code {\n \t\tif ((olx ^ tmp) & MLX5_TXOFF_CONFIG_INLINE)\n \t\t\t/* Do not enable inlining if not configured. */\n \t\t\tcontinue;\n+\t\tif ((olx ^ tmp) & MLX5_TXOFF_CONFIG_TXPP)\n+\t\t\t/* Do not enable scheduling if not configured. */\n+\t\t\tcontinue;\n \t\t/*\n \t\t * Some routine meets the requirements.\n \t\t * Check whether it has minimal amount\n@@ -5631,6 +5720,8 @@ enum mlx5_txcmp_code {\n \t\tDRV_LOG(DEBUG, \"\\tVLANI (VLAN insertion)\");\n \tif (txoff_func[m].olx & MLX5_TXOFF_CONFIG_METADATA)\n \t\tDRV_LOG(DEBUG, \"\\tMETAD (tx Flow metadata)\");\n+\tif (txoff_func[m].olx & MLX5_TXOFF_CONFIG_TXPP)\n+\t\tDRV_LOG(DEBUG, \"\\tMETAD (tx Scheduling)\");\n \tif (txoff_func[m].olx & MLX5_TXOFF_CONFIG_EMPW) {\n \t\tif (txoff_func[m].olx & MLX5_TXOFF_CONFIG_MPW)\n \t\t\tDRV_LOG(DEBUG, \"\\tMPW   (Legacy MPW)\");\n@@ -5705,7 +5796,7 @@ enum mlx5_txcmp_code {\n \t\tif (pkt_burst == txoff_func[i].func) {\n \t\t\tolx = txoff_func[i].olx;\n \t\t\tsnprintf(mode->info, sizeof(mode->info),\n-\t\t\t\t \"%s%s%s%s%s%s%s%s\",\n+\t\t\t\t \"%s%s%s%s%s%s%s%s%s\",\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_EMPW) ?\n \t\t\t\t ((olx & MLX5_TXOFF_CONFIG_MPW) ?\n \t\t\t\t \"Legacy MPW\" : \"Enhanced MPW\") : \"No MPW\",\n@@ -5722,7 +5813,9 @@ enum mlx5_txcmp_code {\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_VLAN) ?\n \t\t\t\t \" + VLAN\" : \"\",\n \t\t\t\t (olx & MLX5_TXOFF_CONFIG_METADATA) ?\n-\t\t\t\t \" + METADATA\" : \"\");\n+\t\t\t\t \" + METADATA\" : \"\",\n+\t\t\t\t (olx & MLX5_TXOFF_CONFIG_TXPP) ?\n+\t\t\t\t \" + TXPP\" : \"\");\n \t\t\treturn 0;\n \t\t}\n \t}\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex 7f6a40a..4ab6ac1 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -119,6 +119,8 @@\n \t\t\t     DEV_TX_OFFLOAD_TCP_CKSUM);\n \tif (config->tso)\n \t\toffloads |= DEV_TX_OFFLOAD_TCP_TSO;\n+\tif (config->tx_pp)\n+\t\toffloads |= DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP;\n \tif (config->swp) {\n \t\tif (config->hw_csum)\n \t\t\toffloads |= DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;\n",
    "prefixes": [
        "v2",
        "12/17"
    ]
}