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GET /api/patches/73964/?format=api
{ "id": 73964, "url": "http://patches.dpdk.org/api/patches/73964/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200713151319.17547-8-manishc@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200713151319.17547-8-manishc@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200713151319.17547-8-manishc@marvell.com", "date": "2020-07-13T15:13:19", "name": "[v2,7/7] net/qede: add VF FLR support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "3bfdeb3fed0bbc169ac500d2431b28d42fb67a28", "submitter": { "id": 1591, "url": "http://patches.dpdk.org/api/people/1591/?format=api", "name": "Manish Chopra", "email": "manishc@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200713151319.17547-8-manishc@marvell.com/mbox/", "series": [ { "id": 11003, "url": "http://patches.dpdk.org/api/series/11003/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=11003", "date": "2020-07-13T15:13:12", "name": "qede: SR-IOV PF driver support", "version": 2, "mbox": "http://patches.dpdk.org/series/11003/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/73964/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/73964/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B0564A0540;\n\tMon, 13 Jul 2020 17:16:48 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 80AD11D657;\n\tMon, 13 Jul 2020 17:16:48 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 032AC1D618\n for <dev@dpdk.org>; Mon, 13 Jul 2020 17:16:46 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 06DFANsu004255; Mon, 13 Jul 2020 08:16:46 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 327asn7ywy-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 13 Jul 2020 08:16:46 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 13 Jul 2020 08:16:44 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 13 Jul 2020 08:16:44 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 13 Jul 2020 08:16:44 -0700", "from dut1171.mv.qlogic.com (unknown [10.112.88.18])\n by maili.marvell.com (Postfix) with ESMTP id 234DD3F703F;\n Mon, 13 Jul 2020 08:16:44 -0700 (PDT)", "from dut1171.mv.qlogic.com (localhost [127.0.0.1])\n by dut1171.mv.qlogic.com (8.14.7/8.14.7) with ESMTP id 06DFGhbI017645;\n Mon, 13 Jul 2020 08:16:43 -0700", "(from root@localhost)\n by dut1171.mv.qlogic.com (8.14.7/8.14.7/Submit) id 06DFGhMB017636;\n Mon, 13 Jul 2020 08:16:43 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0818; bh=d+IqPUJm8EXhvHNkgzOqlyRHHVTu6PVb2ZKp/VduH9g=;\n b=Mb/h2tizN/uT/fDuwGf5AxT/CjTZ4HBvFDKELiOkJwB4eUe0Qnytudt2KdcWu9JaPF1I\n NA3I1/r2S7umfIrYYL7iLSB19Ii/bVX0/1+r3Q7qxjsdT+xGQGJNFi3Gn1N51PsS6+ZK\n NsW8bCt1U7cGTRArmD4XswNW8tPR+VU4sa7gr4aMi8r9W3dt4sOQhFyGNyceA+fHD4RH\n CxJpeckSo+yi6m6vwAgNXudAbKvRjfdA9jZPBxVYQHNJrvUfIc+x630cWclPe6sZqWqc\n JX3wrUGxOQAvWjUtyCruC92c0+F//up809KLNqkqOqoVlg2i6oxDi8ONW+/O9JJt+PnU yQ==", "From": "Manish Chopra <manishc@marvell.com>", "To": "<jerinjacobk@gmail.com>, <jerinj@marvell.com>, <ferruh.yigit@intel.com>,\n <grive@u256.net>", "CC": "<dev@dpdk.org>, <irusskikh@marvell.com>, <rmody@marvell.com>,\n <GR-Everest-DPDK-Dev@marvell.com>, <anatoly.burakov@intel.com>,\n <xavier.huwei@huawei.com>, <humin29@huawei.com>,\n <yisen.zhuang@huawei.com>, <xiao.w.wang@intel.com>,\n <qiming.yang@intel.com>, <qi.z.zhang@intel.com>,\n <heinrich.kuhn@netronome.com>", "Date": "Mon, 13 Jul 2020 08:13:19 -0700", "Message-ID": "<20200713151319.17547-8-manishc@marvell.com>", "X-Mailer": "git-send-email 2.12.0", "In-Reply-To": "<20200713151319.17547-1-manishc@marvell.com>", "References": "<20200713151319.17547-1-manishc@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-07-13_14:2020-07-13,\n 2020-07-13 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 7/7] net/qede: add VF FLR support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds required bit to handle VF FLR\nindication from Management FW (MFW) of the device\n\nWith that VFs were able to load in VM (VF attached as PCI\npassthrough to the guest VM) followed by FLR successfully\n\nUpdated the docs/guides with the feature support\n\nSigned-off-by: Manish Chopra <manishc@marvell.com>\nSigned-off-by: Igor Russkikh <irusskikh@marvell.com>\nSigned-off-by: Rasesh Mody <rmody@marvell.com>\n---\n doc/guides/nics/features/qede.ini | 1 +\n doc/guides/nics/qede.rst | 7 +------\n drivers/net/qede/base/bcm_osal.c | 5 +++++\n drivers/net/qede/base/bcm_osal.h | 4 +++-\n drivers/net/qede/qede_sriov.c | 18 ++++++++++++++++++\n 5 files changed, 28 insertions(+), 7 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/qede.ini b/doc/guides/nics/features/qede.ini\nindex f8716523e..46fba8e6c 100644\n--- a/doc/guides/nics/features/qede.ini\n+++ b/doc/guides/nics/features/qede.ini\n@@ -32,6 +32,7 @@ Basic stats = Y\n Extended stats = Y\n Stats per queue = Y\n Registers dump = Y\n+SR-IOV = Y\n Multiprocess aware = Y\n Linux UIO = Y\n Linux VFIO = Y\ndiff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst\nindex 5b2f86895..e874915c2 100644\n--- a/doc/guides/nics/qede.rst\n+++ b/doc/guides/nics/qede.rst\n@@ -34,18 +34,13 @@ Supported Features\n - VLAN offload - Filtering and stripping\n - N-tuple filter and flow director (limited support)\n - NPAR (NIC Partitioning)\n-- SR-IOV VF\n+- SR-IOV PF and VF\n - GRE Tunneling offload\n - GENEVE Tunneling offload\n - VXLAN Tunneling offload\n - MPLSoUDP Tx Tunneling offload\n - Generic flow API\n \n-Non-supported Features\n-----------------------\n-\n-- SR-IOV PF\n-\n Co-existence considerations\n ---------------------------\n \ndiff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c\nindex ef47339df..44a8692f5 100644\n--- a/drivers/net/qede/base/bcm_osal.c\n+++ b/drivers/net/qede/base/bcm_osal.c\n@@ -29,6 +29,11 @@ int osal_pf_vf_msg(struct ecore_hwfn *p_hwfn)\n \treturn rc;\n }\n \n+void osal_vf_flr_update(struct ecore_hwfn *p_hwfn)\n+{\n+\tqed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);\n+}\n+\n void osal_poll_mode_dpc(osal_int_ptr_t hwfn_cookie)\n {\n \tstruct ecore_hwfn *p_hwfn = (struct ecore_hwfn *)hwfn_cookie;\ndiff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h\nindex fad441752..75084ce23 100644\n--- a/drivers/net/qede/base/bcm_osal.h\n+++ b/drivers/net/qede/base/bcm_osal.h\n@@ -353,7 +353,9 @@ u32 qede_find_first_zero_bit(u32 *bitmap, u32 length);\n /* SR-IOV channel */\n \n int osal_pf_vf_msg(struct ecore_hwfn *p_hwfn);\n-#define OSAL_VF_FLR_UPDATE(hwfn) nothing\n+void osal_vf_flr_update(struct ecore_hwfn *p_hwfn);\n+#define OSAL_VF_FLR_UPDATE(hwfn) \\\n+\tosal_vf_flr_update(hwfn)\n #define OSAL_VF_SEND_MSG2PF(dev, done, msg, reply_addr, msg_size, reply_size) 0\n #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol)\t(0)\n #define OSAL_PF_VF_MSG(hwfn, vfid) \\\ndiff --git a/drivers/net/qede/qede_sriov.c b/drivers/net/qede/qede_sriov.c\nindex 93f7a2a55..0b99a8d6f 100644\n--- a/drivers/net/qede/qede_sriov.c\n+++ b/drivers/net/qede/qede_sriov.c\n@@ -151,6 +151,7 @@ static void qed_handle_bulletin_post(struct ecore_hwfn *hwfn)\n void qed_iov_pf_task(void *arg)\n {\n \tstruct ecore_hwfn *p_hwfn = arg;\n+\tint rc;\n \n \tif (OSAL_GET_BIT(QED_IOV_WQ_MSG_FLAG, &p_hwfn->iov_task_flags)) {\n \t\tOSAL_CLEAR_BIT(QED_IOV_WQ_MSG_FLAG, &p_hwfn->iov_task_flags);\n@@ -163,6 +164,23 @@ void qed_iov_pf_task(void *arg)\n \t\t\t &p_hwfn->iov_task_flags);\n \t\tqed_handle_bulletin_post(p_hwfn);\n \t}\n+\n+\tif (OSAL_GET_BIT(QED_IOV_WQ_FLR_FLAG, &p_hwfn->iov_task_flags)) {\n+\t\tstruct ecore_ptt *p_ptt = ecore_ptt_acquire(p_hwfn);\n+\n+\t\tOSAL_CLEAR_BIT(QED_IOV_WQ_FLR_FLAG, &p_hwfn->iov_task_flags);\n+\n+\t\tif (!p_ptt) {\n+\t\t\tqed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);\n+\t\t\treturn;\n+\t\t}\n+\n+\t\trc = ecore_iov_vf_flr_cleanup(p_hwfn, p_ptt);\n+\t\tif (rc)\n+\t\t\tqed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);\n+\n+\t\tecore_ptt_release(p_hwfn, p_ptt);\n+\t}\n }\n \n int qed_schedule_iov(struct ecore_hwfn *p_hwfn, enum qed_iov_wq_flag flag)\n", "prefixes": [ "v2", "7/7" ] }