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GET /api/patches/73119/?format=api
{ "id": 73119, "url": "http://patches.dpdk.org/api/patches/73119/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1593941027-86651-10-git-send-email-orika@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1593941027-86651-10-git-send-email-orika@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1593941027-86651-10-git-send-email-orika@mellanox.com", "date": "2020-07-05T09:23:36", "name": "[09/20] common/mlx5: add write and read RXP registers", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "17236fb182f6fc3342226558728f565d2e3f23c8", "submitter": { "id": 795, "url": "http://patches.dpdk.org/api/people/795/?format=api", "name": "Ori Kam", "email": "orika@mellanox.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1593941027-86651-10-git-send-email-orika@mellanox.com/mbox/", "series": [ { "id": 10792, "url": "http://patches.dpdk.org/api/series/10792/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10792", "date": "2020-07-05T09:23:27", "name": "add Mellanox RegEx PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/10792/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/73119/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/73119/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E1149A00C5;\n\tSun, 5 Jul 2020 11:25:39 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8D9C21DB26;\n\tSun, 5 Jul 2020 11:24:49 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id D54EF1DB40\n for <dev@dpdk.org>; Sun, 5 Jul 2020 11:24:47 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n orika@mellanox.com) with SMTP; 5 Jul 2020 12:24:46 +0300", "from pegasus04.mtr.labs.mlnx. (pegasus04.mtr.labs.mlnx\n [10.210.16.126])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0659OC3t028191;\n Sun, 5 Jul 2020 12:24:45 +0300" ], "From": "Ori Kam <orika@mellanox.com>", "To": "jerinj@marvell.com, xiang.w.wang@intel.com, matan@mellanox.com,\n viacheslavo@mellanox.com, Shahaf Shuler <shahafs@mellanox.com>,\n Ray Kinsella <mdr@ashroe.eu>, Neil Horman <nhorman@tuxdriver.com>", "Cc": "guyk@marvell.com, dev@dpdk.org, pbhagavatula@marvell.com,\n hemant.agrawal@nxp.com, opher@mellanox.com, alexr@mellanox.com,\n dovrat@marvell.com, pkapoor@marvell.com, nipun.gupta@nxp.com,\n bruce.richardson@intel.com, yang.a.hong@intel.com,\n harry.chang@intel.com, gu.jian1@zte.com.cn, shanjiangh@chinatelecom.cn,\n zhangy.yun@chinatelecom.cn, lixingfu@huachentel.com,\n wushuai@inspur.com, yuyingxia@yxlink.com, fanchenggang@sunyainfo.com,\n davidfgao@tencent.com, liuzhong1@chinaunicom.cn, zhaoyong11@huawei.com,\n oc@yunify.com, jim@netgate.com, hongjun.ni@intel.com, deri@ntop.org,\n fc@napatech.com, arthur.su@lionic.com, thomas@monjalon.net,\n orika@mellanox.com, rasland@mellanox.com", "Date": "Sun, 5 Jul 2020 09:23:36 +0000", "Message-Id": "<1593941027-86651-10-git-send-email-orika@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1593941027-86651-1-git-send-email-orika@mellanox.com>", "References": "<1593941027-86651-1-git-send-email-orika@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 09/20] common/mlx5: add write and read RXP\n\tregisters", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This commits add the write and read RXP registers functionality.\n\nSigned-off-by: Ori Kam <orika@mellanox.com>\n---\n drivers/common/mlx5/mlx5_devx_cmds.c | 78 +++++++++++++++++++++++++\n drivers/common/mlx5/mlx5_devx_cmds.h | 10 ++++\n drivers/common/mlx5/rte_common_mlx5_version.map | 2 +\n 3 files changed, 90 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c\nindex f8760e6..4fad7cd 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.c\n@@ -1720,3 +1720,81 @@ struct mlx5_devx_obj *\n \treturn 0;\n }\n \n+/**\n+ * Write to RXP registers.\n+ *\n+ * @param ctx\n+ * ibv device handle\n+ * @param engine_id\n+ * Chooses on which engine the register will be written..\n+ * @param addr\n+ * Register address.\n+ * @param data\n+ * Data to be written to the register.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,\n+\t\t\t uint32_t addr, uint32_t data)\n+{\n+\tuint32_t out[DEVX_ST_SZ_DW(set_regexp_register_out)] = {};\n+\tuint32_t in[DEVX_ST_SZ_DW(set_regexp_register_in)] = {};\n+\tint ret;\n+\n+\tDEVX_SET(set_regexp_register_in, in, opcode,\n+\t\t MLX5_CMD_SET_REGEX_REGISTERS);\n+\tDEVX_SET(set_regexp_register_in, in, engine_id, engine_id);\n+\tDEVX_SET(set_regexp_register_in, in, register_address, addr);\n+\tDEVX_SET(set_regexp_register_in, in, register_data, data);\n+\n+\tret = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in), out,\n+\t\t\t\t\t sizeof(out));\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Set regexp register failed %d\", ret);\n+\t\trte_errno = errno;\n+\t\treturn -errno;\n+\t}\n+\treturn 0;\n+}\n+\n+\n+/**\n+ * Read from RXP registers\n+ *\n+ * @param ctx\n+ * ibv device handle\n+ * @param engine_id\n+ * Chooses from which engine to read.\n+ * @param addr\n+ * Register address.\n+ * @param data\n+ * Output containing the pointer to the data..\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,\n+\t\t\t uint32_t addr, uint32_t *data)\n+{\n+\tuint32_t out[DEVX_ST_SZ_DW(query_regexp_register_out)] = {};\n+\tuint32_t in[DEVX_ST_SZ_DW(query_regexp_register_in)] = {};\n+\tint ret;\n+\n+\tDEVX_SET(query_regexp_register_in, in, opcode,\n+\t\t MLX5_CMD_QUERY_REGEX_REGISTERS);\n+\tDEVX_SET(query_regexp_register_in, in, engine_id, engine_id);\n+\tDEVX_SET(query_regexp_register_in, in, register_address, addr);\n+\n+\tret = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in), out,\n+\t\t\t\t\t sizeof(out));\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Query regexp register failed %d\", ret);\n+\t\trte_errno = errno;\n+\t\treturn -errno;\n+\t}\n+\t*data = DEVX_GET(query_regexp_register_out, out, register_data);\n+\treturn 0;\n+}\ndiff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h\nindex 655e31f..a2a9045 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.h\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.h\n@@ -374,6 +374,10 @@ int mlx5_devx_cmd_modify_qp_state(struct mlx5_devx_obj *qp,\n __rte_internal\n int mlx5_devx_cmd_modify_rqt(struct mlx5_devx_obj *rqt,\n \t\t\t struct mlx5_devx_rqt_attr *rqt_attr);\n+int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,\n+\t\t\t\t uint32_t addr, uint32_t data);\n+int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,\n+\t\t\t\t uint32_t addr, uint32_t *data);\n \n /**\n * Create virtio queue counters object DevX API.\n@@ -408,4 +412,10 @@ int mlx5_devx_cmd_query_virtio_q_counters(struct mlx5_devx_obj *couners_obj,\n __rte_internal\n int mlx5_devx_regex_database_program(void *ctx, uint8_t engine,\n \t\t\t\t uint32_t umem_id, uint64_t umem_offset);\n+__rte_internal\n+int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,\n+\t\t\t\t uint32_t addr, uint32_t *data);\n+__rte_internal\n+int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,\n+\t\t\t\t uint32_t addr, uint32_t data);\n #endif /* RTE_PMD_MLX5_DEVX_CMDS_H_ */\ndiff --git a/drivers/common/mlx5/rte_common_mlx5_version.map b/drivers/common/mlx5/rte_common_mlx5_version.map\nindex 6054d39..138719d 100644\n--- a/drivers/common/mlx5/rte_common_mlx5_version.map\n+++ b/drivers/common/mlx5/rte_common_mlx5_version.map\n@@ -38,6 +38,8 @@ INTERNAL {\n \tmlx5_devx_regex_database_program;\n \tmlx5_devx_regex_database_resume;\n \tmlx5_devx_regex_database_stop;\n+\tmlx5_devx_regex_register_read;\n+\tmlx5_devx_regex_register_write;\n \n \tmlx5_get_ifname_sysfs;\n \tmlx5_get_dbr;\n", "prefixes": [ "09/20" ] }