get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/71906/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 71906,
    "url": "http://patches.dpdk.org/api/patches/71906/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200622064634.70941-40-guinanx.sun@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200622064634.70941-40-guinanx.sun@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200622064634.70941-40-guinanx.sun@intel.com",
    "date": "2020-06-22T06:46:03",
    "name": "[39/70] net/e1000/base: increased timeout for ME ULP exit",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "69d98c85542f3c5134fe1b04a3363104b8993922",
    "submitter": {
        "id": 1476,
        "url": "http://patches.dpdk.org/api/people/1476/?format=api",
        "name": "Guinan Sun",
        "email": "guinanx.sun@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200622064634.70941-40-guinanx.sun@intel.com/mbox/",
    "series": [
        {
            "id": 10543,
            "url": "http://patches.dpdk.org/api/series/10543/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10543",
            "date": "2020-06-22T06:45:24",
            "name": "update e1000 base code",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/10543/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/71906/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/71906/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 718F6A0350;\n\tMon, 22 Jun 2020 09:12:32 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 109871D561;\n\tMon, 22 Jun 2020 09:06:35 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 6814F1D54D\n for <dev@dpdk.org>; Mon, 22 Jun 2020 09:06:31 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Jun 2020 00:06:31 -0700",
            "from dpdk.sh.intel.com ([10.239.255.83])\n by fmsmga001.fm.intel.com with ESMTP; 22 Jun 2020 00:06:29 -0700"
        ],
        "IronPort-SDR": [
            "\n HSXOBW5fFo716bI8luQq3NlRFGLJhzy7R/9dNS+K4uGedJIhFehhq35HLQILIikm2MGY3thGP9\n TzIje+w+g+8g==",
            "\n Xtwvsxgba+4k9lww53ym5yPGi7Ng67qsNUmylF1qLJen4NcbINOfKs+dwynAAYkFpH1s4P/EZm\n gB2KTrPQRe2Q=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9659\"; a=\"141944888\"",
            "E=Sophos;i=\"5.75,266,1589266800\"; d=\"scan'208\";a=\"141944888\"",
            "E=Sophos;i=\"5.75,266,1589266800\"; d=\"scan'208\";a=\"384409094\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Guinan Sun <guinanx.sun@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jeff Guo <jia.guo@intel.com>, Zhao1 Wei <wei.zhao1@intel.com>,\n Guinan Sun <guinanx.sun@intel.com>, Efrati Nir <nir.efrati@intel.com>",
        "Date": "Mon, 22 Jun 2020 06:46:03 +0000",
        "Message-Id": "<20200622064634.70941-40-guinanx.sun@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200622064634.70941-1-guinanx.sun@intel.com>",
        "References": "<20200622064634.70941-1-guinanx.sun@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 39/70] net/e1000/base: increased timeout for ME\n\tULP exit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Due timing issues in WHL and since recovery by host is\nnot always supported, increased timeout for ME to finish\nULP exit flow for Nahum before timer expiration.\n\nSigned-off-by: Efrati Nir <nir.efrati@intel.com>\nSigned-off-by: Guinan Sun <guinanx.sun@intel.com>\n---\n drivers/net/e1000/base/e1000_ich8lan.c | 7 +++++--\n 1 file changed, 5 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c\nindex 1dc29553e..b79e3bad8 100644\n--- a/drivers/net/e1000/base/e1000_ich8lan.c\n+++ b/drivers/net/e1000/base/e1000_ich8lan.c\n@@ -1268,6 +1268,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)\n s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)\n {\n \ts32 ret_val = E1000_SUCCESS;\n+\tu8 ulp_exit_timeout = 30;\n \tu32 mac_reg;\n \tu16 phy_reg;\n \tint i = 0;\n@@ -1289,10 +1290,12 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)\n \t\t\tE1000_WRITE_REG(hw, E1000_H2ME, mac_reg);\n \t\t}\n \n-\t\t/* Poll up to 300msec for ME to clear ULP_CFG_DONE. */\n+\t\tif (hw->mac.type == e1000_pch_cnp)\n+\t\t\tulp_exit_timeout = 100;\n+\n \t\twhile (E1000_READ_REG(hw, E1000_FWSM) &\n \t\t       E1000_FWSM_ULP_CFG_DONE) {\n-\t\t\tif (i++ == 30) {\n+\t\t\tif (i++ == ulp_exit_timeout) {\n \t\t\t\tret_val = -E1000_ERR_PHY;\n \t\t\t\tgoto out;\n \t\t\t}\n",
    "prefixes": [
        "39/70"
    ]
}