get:
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patch:
Update a patch.

put:
Update a patch.

GET /api/patches/71904/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 71904,
    "url": "http://patches.dpdk.org/api/patches/71904/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200622064634.70941-38-guinanx.sun@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200622064634.70941-38-guinanx.sun@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200622064634.70941-38-guinanx.sun@intel.com",
    "date": "2020-06-22T06:46:01",
    "name": "[37/70] net/e1000/base: add missing register defines",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "313c7f00d3dfdbfaf8d72458d55af5a4739f260e",
    "submitter": {
        "id": 1476,
        "url": "http://patches.dpdk.org/api/people/1476/?format=api",
        "name": "Guinan Sun",
        "email": "guinanx.sun@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200622064634.70941-38-guinanx.sun@intel.com/mbox/",
    "series": [
        {
            "id": 10543,
            "url": "http://patches.dpdk.org/api/series/10543/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10543",
            "date": "2020-06-22T06:45:24",
            "name": "update e1000 base code",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/10543/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/71904/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/71904/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C2B9EA0350;\n\tMon, 22 Jun 2020 09:12:05 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 38A331D552;\n\tMon, 22 Jun 2020 09:06:32 +0200 (CEST)",
            "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id 03AE01D539\n for <dev@dpdk.org>; Mon, 22 Jun 2020 09:06:28 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Jun 2020 00:06:28 -0700",
            "from dpdk.sh.intel.com ([10.239.255.83])\n by fmsmga001.fm.intel.com with ESMTP; 22 Jun 2020 00:06:25 -0700"
        ],
        "IronPort-SDR": [
            "\n UtTY3wT3pwLM0deCYXkREnqaxTvX69aA2jlniCnO/xbinapX2oxvMqQeRpSzMcLqh8LRCiziTv\n ItyJgAg3AJCw==",
            "\n mgFBGksZffJaF2vp1hNhwnR4/5c0bDcrzm2wVQAStlPaM3QVpCiCD2QFC5xvBISrM3p5p3BATc\n PgN2SvuhKCLQ=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6000,8403,9659\"; a=\"141944879\"",
            "E=Sophos;i=\"5.75,266,1589266800\"; d=\"scan'208\";a=\"141944879\"",
            "E=Sophos;i=\"5.75,266,1589266800\"; d=\"scan'208\";a=\"384409085\""
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "From": "Guinan Sun <guinanx.sun@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Jeff Guo <jia.guo@intel.com>, Zhao1 Wei <wei.zhao1@intel.com>,\n Guinan Sun <guinanx.sun@intel.com>,\n Jeff Kirsher <jeffrey.t.kirsher@intel.com>",
        "Date": "Mon, 22 Jun 2020 06:46:01 +0000",
        "Message-Id": "<20200622064634.70941-38-guinanx.sun@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20200622064634.70941-1-guinanx.sun@intel.com>",
        "References": "<20200622064634.70941-1-guinanx.sun@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 37/70] net/e1000/base: add missing register\n\tdefines",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for\nthe nvmupd_validate_offset function to correctly validate the NVM update\noffset.\n\nSigned-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>\nSigned-off-by: Guinan Sun <guinanx.sun@intel.com>\n---\n drivers/net/e1000/base/e1000_regs.h | 8 +++++++-\n 1 file changed, 7 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h\nindex 2e14ce109..afd27ac2b 100644\n--- a/drivers/net/e1000/base/e1000_regs.h\n+++ b/drivers/net/e1000/base/e1000_regs.h\n@@ -145,7 +145,10 @@\n #define E1000_RADV\t0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */\n #define E1000_EMIADD\t0x10     /* Extended Memory Indirect Address */\n #define E1000_EMIDATA\t0x11     /* Extended Memory Indirect Data */\n-#define E1000_SRWR\t\t0x12018  /* Shadow Ram Write Register - RW */\n+/* Shadow Ram Write Register - RW */\n+#define E1000_SRWR\t\t0x12018\n+#define E1000_EEC_REG\t\t0x12010\n+\n #define E1000_I210_FLMNGCTL\t0x12038\n #define E1000_I210_FLMNGDATA\t0x1203C\n #define E1000_I210_FLMNGCNT\t0x12040\n@@ -156,6 +159,9 @@\n \n #define E1000_I210_FLA\t\t0x1201C\n \n+#define E1000_SHADOWINF\t\t0x12068\n+#define E1000_FLFWUPDATE\t0x12108\n+\n #define E1000_INVM_DATA_REG(_n)\t(0x12120 + 4*(_n))\n #define E1000_INVM_SIZE\t\t64 /* Number of INVM Data Registers */\n \n",
    "prefixes": [
        "37/70"
    ]
}