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GET /api/patches/71047/?format=api
{ "id": 71047, "url": "http://patches.dpdk.org/api/patches/71047/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-41-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200609120001.35110-41-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200609120001.35110-41-qi.z.zhang@intel.com", "date": "2020-06-09T11:59:49", "name": "[v2,40/52] net/ice/base: add new API to check all autoneg enable bits", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1334964f81a786d3da0e993ed00ed9971dc79577", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-41-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 10359, "url": "http://patches.dpdk.org/api/series/10359/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10359", "date": "2020-06-09T11:59:09", "name": "net/ice: base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/10359/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/71047/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/71047/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 81FE6A0516;\n\tTue, 9 Jun 2020 14:03:14 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CFDBE1BFF4;\n\tTue, 9 Jun 2020 13:57:25 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 730CD2C6E\n for <dev@dpdk.org>; Tue, 9 Jun 2020 13:57:21 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Jun 2020 04:57:21 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:57:19 -0700" ], "IronPort-SDR": [ "\n CRZUi8rFi8oKFo/JVhc5HbPsie8BXjdeMD+s6pUSQHXODeQ4QNbi4zIXzlakH2Z/m7c+/Pazj8\n 9/JOWmDsFSrg==", "\n LrXuQFvBNkmjLvYE/1SvvAMDMaKjAwA0HMNJwYbrx9wXqH/nAdoHJWrF+faXGmfrx7dsxVrBO6\n yB80saeAlXoA==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,492,1583222400\"; d=\"scan'208\";a=\"473044236\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Paul Greenwalt <paul.greenwalt@intel.com>,\n \"Paul M . Stillwell Jr\" <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 9 Jun 2020 19:59:49 +0800", "Message-Id": "<20200609120001.35110-41-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200609120001.35110-1-qi.z.zhang@intel.com>", "References": "<20200603024016.30636-1-qi.z.zhang@intel.com>\n <20200609120001.35110-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all\n\tautoneg enable bits", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "struct ice_aqc_get_phy_caps_data has multiple autoneg enable bits.\nice_is_phy_caps_an_enabled checks all bits and returns true if any\nautoneg enable bits are set.\n\nSigned-off-by: Paul Greenwalt <paul.greenwalt@intel.com>\nSigned-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 15 +++++++++++++++\n drivers/net/ice/base/ice_common.h | 1 +\n 2 files changed, 16 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex e2e7f1137..8efc4b4cc 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -4533,3 +4533,18 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \n \treturn status;\n }\n+\n+/**\n+ * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled\n+ * @caps: get PHY capability data\n+ */\n+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)\n+{\n+\tif (caps->caps & ICE_AQC_PHY_AN_MODE ||\n+\t caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 |\n+\t\t\t\t ICE_AQC_PHY_AN_EN_CLAUSE73 |\n+\t\t\t\t ICE_AQC_PHY_AN_EN_CLAUSE37))\n+\t\treturn true;\n+\n+\treturn false;\n+}\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 46741a3f1..cb41497bc 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -143,6 +143,7 @@ bool ice_fw_supports_link_override(struct ice_hw *hw);\n enum ice_status\n ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,\n \t\t\t struct ice_port_info *pi);\n+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);\n \n enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);\n enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);\n", "prefixes": [ "v2", "40/52" ] }