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GET /api/patches/71033/?format=api
{ "id": 71033, "url": "http://patches.dpdk.org/api/patches/71033/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-27-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200609120001.35110-27-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200609120001.35110-27-qi.z.zhang@intel.com", "date": "2020-06-09T11:59:35", "name": "[v2,26/52] net/ice/base: use macro for sizeof", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c33b6865e3f2c621d68bee178c67130e08ac7019", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200609120001.35110-27-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 10359, "url": "http://patches.dpdk.org/api/series/10359/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10359", "date": "2020-06-09T11:59:09", "name": "net/ice: base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/10359/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/71033/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/71033/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 90325A0516;\n\tTue, 9 Jun 2020 14:00:22 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 0CE851BF75;\n\tTue, 9 Jun 2020 13:57:08 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by dpdk.org (Postfix) with ESMTP id 171741BDFD\n for <dev@dpdk.org>; Tue, 9 Jun 2020 13:56:54 +0200 (CEST)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Jun 2020 04:56:54 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:56:53 -0700" ], "IronPort-SDR": [ "\n ixeVNTUw/SoANFLk1uoAquZPFqHsYyXa0daFmmvMFkQd+36U1ZIKbYC6urOscqJTRFmyv/50P5\n CjHf7IXRluAA==", "\n lZ2u+An+xYkKAxA1jdkXS1js9bGdYNhffk2xzjnzQMoeJ50v7tEX8DTgvxva/tCt+jDa6ZemLo\n nv2jsciuC7vg==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,492,1583222400\"; d=\"scan'208\";a=\"473044135\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jacob Keller <jacob.e.keller@intel.com>,\n \"Paul M . Stillwell Jr\" <paul.m.stillwell.jr@intel.com>", "Date": "Tue, 9 Jun 2020 19:59:35 +0800", "Message-Id": "<20200609120001.35110-27-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200609120001.35110-1-qi.z.zhang@intel.com>", "References": "<20200603024016.30636-1-qi.z.zhang@intel.com>\n <20200609120001.35110-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 26/52] net/ice/base: use macro for sizeof", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The definition of ICE_SW_RULE_RX_TX_ETH_HDR_SIZE open codes the size of\na structure field. Replace this with the use of FIELD_SIZEOF.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_switch.h | 17 ++++++++---------\n 1 file changed, 8 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex 7317d17ef..8c7e98bfa 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -32,24 +32,24 @@\n #define DUMMY_ETH_HDR_LEN\t\t16\n #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \\\n \t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \\\n+\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n \t sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)\n #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \\\n \t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \\\n+\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n \t sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)\n #define ICE_SW_RULE_LG_ACT_SIZE(n) \\\n \t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \\\n+\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n \t sizeof(struct ice_sw_rule_lg_act) - \\\n-\t sizeof(((struct ice_sw_rule_lg_act *)0)->act) + \\\n-\t ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act)))\n+\t FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \\\n+\t ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))\n #define ICE_SW_RULE_VSI_LIST_SIZE(n) \\\n \t(sizeof(struct ice_aqc_sw_rules_elem) - \\\n-\t sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \\\n+\t FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \\\n \t sizeof(struct ice_sw_rule_vsi_list) - \\\n-\t sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi) + \\\n-\t ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi)))\n+\t FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \\\n+\t ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))\n \n /* Worst case buffer length for ice_aqc_opc_get_res_alloc */\n #define ICE_MAX_RES_TYPES 0x80\n@@ -490,5 +490,4 @@ ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,\n void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);\n void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);\n bool ice_is_prof_rule(enum ice_sw_tunnel_type type);\n-\n #endif /* _ICE_SWITCH_H_ */\n", "prefixes": [ "v2", "26/52" ] }