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GET /api/patches/70782/?format=api
{ "id": 70782, "url": "http://patches.dpdk.org/api/patches/70782/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200603024016.30636-21-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200603024016.30636-21-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200603024016.30636-21-qi.z.zhang@intel.com", "date": "2020-06-03T02:39:44", "name": "[20/52] net/ice/baes: add NVM help functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2ee0413c91f17130e7d19c6ff6e665e5d0929a31", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200603024016.30636-21-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 10300, "url": "http://patches.dpdk.org/api/series/10300/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=10300", "date": "2020-06-03T02:39:24", "name": "net/ice: base code update", "version": 1, "mbox": "http://patches.dpdk.org/series/10300/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/70782/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/70782/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3407BA04EF;\n\tWed, 3 Jun 2020 04:39:44 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 90D251C222;\n\tWed, 3 Jun 2020 04:37:04 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by dpdk.org (Postfix) with ESMTP id CDF931C224\n for <dev@dpdk.org>; Wed, 3 Jun 2020 04:37:02 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Jun 2020 19:37:02 -0700", "from dpdk51.sh.intel.com ([10.67.111.82])\n by orsmga001.jf.intel.com with ESMTP; 02 Jun 2020 19:37:00 -0700" ], "IronPort-SDR": [ "\n Uw0M6CRJm4EP7FqGl9SMJJrtSz2ZGmgb0V5k/ola+bRAKVBoCo/IlUnwpOsLkx6k9DeUXX98Te\n L8FQIEJHBKYg==", "\n e815w5TAIccUBD3+sXkfS+XQea+9OZBd6fpxSfUe5QJguoMPxKmKataiw06GL99+g3lASx9RMb\n 8vT7Q5Ng3A7A==" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.73,466,1583222400\"; d=\"scan'208\";a=\"347614031\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Wed, 3 Jun 2020 10:39:44 +0800", "Message-Id": "<20200603024016.30636-21-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200603024016.30636-1-qi.z.zhang@intel.com>", "References": "<20200603024016.30636-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 20/52] net/ice/baes: add NVM help functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add couple functions that DPDK would like to use for accessing the\nNVM.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.h | 1 -\n drivers/net/ice/base/ice_nvm.c | 67 +++++++++++++++++++++++++++++++++++++--\n drivers/net/ice/base/ice_nvm.h | 10 ++++++\n 3 files changed, 74 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 6d971a644..46741a3f1 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -18,7 +18,6 @@ enum ice_fw_modes {\n \tICE_FW_MODE_ROLLBACK\n };\n \n-enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);\n enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);\n void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);\n enum ice_status ice_init_hw(struct ice_hw *hw);\ndiff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c\nindex d5e6215de..bedfbcbb4 100644\n--- a/drivers/net/ice/base/ice_nvm.c\n+++ b/drivers/net/ice/base/ice_nvm.c\n@@ -17,7 +17,7 @@\n *\n * Read the NVM using the admin queue commands (0x0701)\n */\n-static enum ice_status\n+enum ice_status\n ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,\n \t\tvoid *data, bool last_command, bool read_shadow_ram,\n \t\tstruct ice_sq_cd *cd)\n@@ -186,7 +186,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)\n *\n * This function will request NVM ownership.\n */\n-static enum ice_status\n+enum ice_status\n ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)\n {\n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n@@ -203,7 +203,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)\n *\n * This function will release NVM ownership.\n */\n-static void ice_release_nvm(struct ice_hw *hw)\n+void ice_release_nvm(struct ice_hw *hw)\n {\n \tice_debug(hw, ICE_DBG_TRACE, \"%s\\n\", __func__);\n \n@@ -301,6 +301,67 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,\n }\n \n /**\n+ * ice_read_pba_string - Reads part number string from NVM\n+ * @hw: pointer to hardware structure\n+ * @pba_num: stores the part number string from the NVM\n+ * @pba_num_size: part number string buffer length\n+ *\n+ * Reads the part number string from the NVM.\n+ */\n+enum ice_status\n+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)\n+{\n+\tu16 pba_tlv, pba_tlv_len;\n+\tenum ice_status status;\n+\tu16 pba_word, pba_size;\n+\tu16 i;\n+\n+\tstatus = ice_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,\n+\t\t\t\t\tICE_SR_PBA_BLOCK_PTR);\n+\tif (status != ICE_SUCCESS) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read PBA Block TLV.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\t/* pba_size is the next word */\n+\tstatus = ice_read_sr_word(hw, (pba_tlv + 2), &pba_size);\n+\tif (status != ICE_SUCCESS) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Failed to read PBA Section size.\\n\");\n+\t\treturn status;\n+\t}\n+\n+\tif (pba_tlv_len < pba_size) {\n+\t\tice_debug(hw, ICE_DBG_INIT, \"Invalid PBA Block TLV size.\\n\");\n+\t\treturn ICE_ERR_INVAL_SIZE;\n+\t}\n+\n+\t/* Subtract one to get PBA word count (PBA Size word is included in\n+\t * total size)\n+\t */\n+\tpba_size--;\n+\tif (pba_num_size < (((u32)pba_size * 2) + 1)) {\n+\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t \"Buffer too small for PBA data.\\n\");\n+\t\treturn ICE_ERR_PARAM;\n+\t}\n+\n+\tfor (i = 0; i < pba_size; i++) {\n+\t\tstatus = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);\n+\t\tif (status != ICE_SUCCESS) {\n+\t\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t\t \"Failed to read PBA Block word %d.\\n\", i);\n+\t\t\treturn status;\n+\t\t}\n+\n+\t\tpba_num[(i * 2)] = (pba_word >> 8) & 0xFF;\n+\t\tpba_num[(i * 2) + 1] = pba_word & 0xFF;\n+\t}\n+\tpba_num[(pba_size * 2)] = '\\0';\n+\n+\treturn status;\n+}\n+\n+/**\n * ice_get_orom_ver_info - Read Option ROM version information\n * @hw: pointer to the HW struct\n *\ndiff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h\nindex 9a61d4153..8e2eb4df1 100644\n--- a/drivers/net/ice/base/ice_nvm.h\n+++ b/drivers/net/ice/base/ice_nvm.h\n@@ -85,13 +85,23 @@ enum ice_status\n ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,\n \t\t union ice_nvm_access_data *data);\n enum ice_status\n+ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);\n+void ice_release_nvm(struct ice_hw *hw);\n+enum ice_status\n+ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,\n+\t\tvoid *data, bool last_command, bool read_shadow_ram,\n+\t\tstruct ice_sq_cd *cd);\n+enum ice_status\n ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,\n \t\t bool read_shadow_ram);\n enum ice_status\n ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,\n \t\t u16 module_type);\n+enum ice_status\n+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);\n enum ice_status ice_init_nvm(struct ice_hw *hw);\n enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);\n enum ice_status\n ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);\n+enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);\n #endif /* _ICE_NVM_H_ */\n", "prefixes": [ "20/52" ] }