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{
    "id": 66456,
    "url": "http://patches.dpdk.org/api/patches/66456/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1583757826-375246-4-git-send-email-vladimir.medvedkin@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1583757826-375246-4-git-send-email-vladimir.medvedkin@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1583757826-375246-4-git-send-email-vladimir.medvedkin@intel.com",
    "date": "2020-03-09T12:43:43",
    "name": "[3/6] fib: introduce AVX512 lookup",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5c1f1fcbcc2b442e0163935d6dadef3d414db689",
    "submitter": {
        "id": 1216,
        "url": "http://patches.dpdk.org/api/people/1216/?format=api",
        "name": "Vladimir Medvedkin",
        "email": "vladimir.medvedkin@intel.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1583757826-375246-4-git-send-email-vladimir.medvedkin@intel.com/mbox/",
    "series": [
        {
            "id": 8847,
            "url": "http://patches.dpdk.org/api/series/8847/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8847",
            "date": "2020-03-09T12:43:40",
            "name": "fib: implement AVX512 vector lookup",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/8847/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/66456/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/66456/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8BDBBA052E;\n\tMon,  9 Mar 2020 13:44:18 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 129FB1C0CB;\n\tMon,  9 Mar 2020 13:43:58 +0100 (CET)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by dpdk.org (Postfix) with ESMTP id 6983E1C06D\n for <dev@dpdk.org>; Mon,  9 Mar 2020 13:43:55 +0100 (CET)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Mar 2020 05:43:55 -0700",
            "from silpixa00400072.ir.intel.com ([10.237.222.213])\n by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2020 05:43:54 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.70,533,1574150400\"; d=\"scan'208\";a=\"276500021\"",
        "From": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "konstantin.ananyev@intel.com,\n\tbruce.richardson@intel.com",
        "Date": "Mon,  9 Mar 2020 12:43:43 +0000",
        "Message-Id": "<1583757826-375246-4-git-send-email-vladimir.medvedkin@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1583757826-375246-1-git-send-email-vladimir.medvedkin@intel.com>",
        "References": "<1583757826-375246-1-git-send-email-vladimir.medvedkin@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 3/6] fib: introduce AVX512 lookup",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add new lookup implementation for DIR24_8 algorithm using\nAVX512 instruction set\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\n---\n lib/librte_fib/dir24_8.c        |  71 ++++++++++++++++++++++++\n lib/librte_fib/dir24_8_avx512.h | 116 ++++++++++++++++++++++++++++++++++++++++\n lib/librte_fib/rte_fib.h        |   3 +-\n 3 files changed, 189 insertions(+), 1 deletion(-)\n create mode 100644 lib/librte_fib/dir24_8_avx512.h",
    "diff": "diff --git a/lib/librte_fib/dir24_8.c b/lib/librte_fib/dir24_8.c\nindex 825d061..9f51dfc 100644\n--- a/lib/librte_fib/dir24_8.c\n+++ b/lib/librte_fib/dir24_8.c\n@@ -245,6 +245,62 @@ dir24_8_lookup_bulk_uni(void *p, const uint32_t *ips,\n \t}\n }\n \n+#ifdef __AVX512F__\n+\n+#include \"dir24_8_avx512.h\"\n+\n+static void\n+rte_dir24_8_vec_lookup_bulk_1b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint8_t));\n+\n+\tdir24_8_lookup_bulk_1b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+static void\n+rte_dir24_8_vec_lookup_bulk_2b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint16_t));\n+\n+\tdir24_8_lookup_bulk_2b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+static void\n+rte_dir24_8_vec_lookup_bulk_4b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 16); i++)\n+\t\tdir24_8_vec_lookup_x16(p, ips + i * 16, next_hops + i * 16,\n+\t\t\tsizeof(uint32_t));\n+\n+\tdir24_8_lookup_bulk_4b(p, ips + i * 16, next_hops + i * 16,\n+\t\tn - i * 16);\n+}\n+\n+static void\n+rte_dir24_8_vec_lookup_bulk_8b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, const unsigned int n)\n+{\n+\tuint32_t i;\n+\tfor (i = 0; i < (n / 8); i++)\n+\t\tdir24_8_vec_lookup_x8_8b(p, ips + i * 8, next_hops + i * 8);\n+\n+\tdir24_8_lookup_bulk_8b(p, ips + i * 8, next_hops + i * 8, n - i * 8);\n+}\n+\n+#endif /* __AVX512F__ */\n+\n rte_fib_lookup_fn_t\n dir24_8_get_lookup_fn(void *p, enum rte_fib_dir24_8_lookup_type type)\n {\n@@ -285,6 +341,21 @@ dir24_8_get_lookup_fn(void *p, enum rte_fib_dir24_8_lookup_type type)\n \t\t}\n \tcase RTE_FIB_DIR24_8_SCALAR_UNI:\n \t\treturn dir24_8_lookup_bulk_uni;\n+#ifdef __AVX512F__\n+\tcase RTE_FIB_DIR24_8_VECTOR:\n+\t\tswitch (nh_sz) {\n+\t\tcase RTE_FIB_DIR24_8_1B:\n+\t\t\treturn rte_dir24_8_vec_lookup_bulk_1b;\n+\t\tcase RTE_FIB_DIR24_8_2B:\n+\t\t\treturn rte_dir24_8_vec_lookup_bulk_2b;\n+\t\tcase RTE_FIB_DIR24_8_4B:\n+\t\t\treturn rte_dir24_8_vec_lookup_bulk_4b;\n+\t\tcase RTE_FIB_DIR24_8_8B:\n+\t\t\treturn rte_dir24_8_vec_lookup_bulk_8b;\n+\t\tdefault:\n+\t\t\treturn NULL;\n+\t\t}\n+#endif\n \tdefault:\n \t\treturn NULL;\n \t}\ndiff --git a/lib/librte_fib/dir24_8_avx512.h b/lib/librte_fib/dir24_8_avx512.h\nnew file mode 100644\nindex 0000000..3b6680c\n--- /dev/null\n+++ b/lib/librte_fib/dir24_8_avx512.h\n@@ -0,0 +1,116 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2020 Intel Corporation\n+ */\n+\n+#ifndef _DIR248_AVX512_H_\n+#define _DIR248_AVX512_H_\n+\n+#include <rte_vect.h>\n+\n+static __rte_always_inline void\n+dir24_8_vec_lookup_x16(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops, int size)\n+{\n+\tstruct dir24_8_tbl *dp = (struct dir24_8_tbl *)p;\n+\t__mmask16 msk_ext;\n+\t__mmask16 exp_msk = 0x5555;\n+\t__m512i ip_vec, idxes, res, bytes;\n+\tconst __m512i zero = _mm512_set1_epi32(0);\n+\tconst __m512i lsb = _mm512_set1_epi32(1);\n+\tconst __m512i lsbyte_msk = _mm512_set1_epi32(0xff);\n+\t__m512i tmp1, tmp2, res_msk;\n+\t__m256i tmp256;\n+\t/* used to mask gather values if size is 1/2 (8/16 bit next hops) */\n+\tif (size == sizeof(uint8_t))\n+\t\tres_msk = _mm512_set1_epi32(UINT8_MAX);\n+\telse if (size == sizeof(uint16_t))\n+\t\tres_msk = _mm512_set1_epi32(UINT16_MAX);\n+\n+\tip_vec = _mm512_loadu_si512(ips);\n+\t/* mask 24 most significant bits */\n+\tidxes = _mm512_srli_epi32(ip_vec, 8);\n+\n+\t/**\n+\t * lookup in tbl24\n+\t * Put it inside branch to make compiller happy with -O0\n+\t */\n+\tif (size == sizeof(uint8_t)) {\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 1);\n+\t\tres = _mm512_and_epi32(res, res_msk);\n+\t} else if (size == sizeof(uint16_t)) {\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 2);\n+\t\tres = _mm512_and_epi32(res, res_msk);\n+\t} else\n+\t\tres = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 4);\n+\n+\t/* get extended entries indexes */\n+\tmsk_ext = _mm512_test_epi32_mask(res, lsb);\n+\n+\tif (msk_ext != 0) {\n+\t\tidxes = _mm512_srli_epi32(res, 1);\n+\t\tidxes = _mm512_slli_epi32(idxes, 8);\n+\t\tbytes = _mm512_and_epi32(ip_vec, lsbyte_msk);\n+\t\tidxes = _mm512_maskz_add_epi32(msk_ext, idxes, bytes);\n+\t\tif (size == sizeof(uint8_t)) {\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 1);\n+\t\t\tidxes = _mm512_and_epi32(idxes, res_msk);\n+\t\t} else if (size == sizeof(uint16_t)) {\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 2);\n+\t\t\tidxes = _mm512_and_epi32(idxes, res_msk);\n+\t\t} else\n+\t\t\tidxes = _mm512_mask_i32gather_epi32(zero, msk_ext,\n+\t\t\t\tidxes, (const int *)dp->tbl8, 4);\n+\n+\t\tres = _mm512_mask_blend_epi32(msk_ext, res, idxes);\n+\t}\n+\n+\tres = _mm512_srli_epi32(res, 1);\n+\ttmp1 = _mm512_maskz_expand_epi32(exp_msk, res);\n+\ttmp256 = _mm512_extracti32x8_epi32(res, 1);\n+\ttmp2 = _mm512_maskz_expand_epi32(exp_msk,\n+\t\t_mm512_castsi256_si512(tmp256));\n+\t_mm512_storeu_si512(next_hops, tmp1);\n+\t_mm512_storeu_si512(next_hops + 8, tmp2);\n+}\n+\n+static __rte_always_inline void\n+dir24_8_vec_lookup_x8_8b(void *p, const uint32_t *ips,\n+\tuint64_t *next_hops)\n+{\n+\tstruct dir24_8_tbl *dp = (struct dir24_8_tbl *)p;\n+\tconst __m512i zero = _mm512_set1_epi32(0);\n+\tconst __m512i lsbyte_msk = _mm512_set1_epi64(0xff);\n+\tconst __m512i lsb = _mm512_set1_epi64(1);\n+\t__m512i res, idxes, bytes;\n+\t__m256i idxes_256, ip_vec;\n+\t__mmask8 msk_ext;\n+\n+\tip_vec = _mm256_loadu_si256((const void *)ips);\n+\t/* mask 24 most significant bits */\n+\tidxes_256 = _mm256_srli_epi32(ip_vec, 8);\n+\n+\t/* lookup in tbl24 */\n+\tres = _mm512_i32gather_epi64(idxes_256, (const void *)dp->tbl24, 8);\n+\n+\t/* get extended entries indexes */\n+\tmsk_ext = _mm512_test_epi64_mask(res, lsb);\n+\n+\tif (msk_ext != 0) {\n+\t\tbytes = _mm512_cvtepi32_epi64(ip_vec);\n+\t\tidxes = _mm512_srli_epi64(res, 1);\n+\t\tidxes = _mm512_slli_epi64(idxes, 8);\n+\t\tbytes = _mm512_and_epi64(bytes, lsbyte_msk);\n+\t\tidxes = _mm512_maskz_add_epi64(msk_ext, idxes, bytes);\n+\t\tidxes = _mm512_mask_i64gather_epi64(zero, msk_ext, idxes,\n+\t\t\t(const void *)dp->tbl8, 8);\n+\n+\t\tres = _mm512_mask_blend_epi64(msk_ext, res, idxes);\n+\t}\n+\n+\tres = _mm512_srli_epi64(res, 1);\n+\t_mm512_storeu_si512(next_hops, res);\n+}\n+\n+#endif /* _DIR248_AVX512_H_ */\ndiff --git a/lib/librte_fib/rte_fib.h b/lib/librte_fib/rte_fib.h\nindex 0e98775..89d0f12 100644\n--- a/lib/librte_fib/rte_fib.h\n+++ b/lib/librte_fib/rte_fib.h\n@@ -50,7 +50,8 @@ enum rte_fib_dir24_8_nh_sz {\n enum rte_fib_dir24_8_lookup_type {\n \tRTE_FIB_DIR24_8_SCALAR_MACRO,\n \tRTE_FIB_DIR24_8_SCALAR_INLINE,\n-\tRTE_FIB_DIR24_8_SCALAR_UNI\n+\tRTE_FIB_DIR24_8_SCALAR_UNI,\n+\tRTE_FIB_DIR24_8_VECTOR\n };\n \n /** FIB configuration structure */\n",
    "prefixes": [
        "3/6"
    ]
}