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GET /api/patches/66445/?format=api
{ "id": 66445, "url": "http://patches.dpdk.org/api/patches/66445/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200309114357.31800-29-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200309114357.31800-29-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200309114357.31800-29-qi.z.zhang@intel.com", "date": "2020-03-09T11:43:57", "name": "[28/28] net/ice/base: don't access some hardware registers in DCF", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "41616d831bbb7789dbd1e3a7e9fd8e6a562e7bb9", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200309114357.31800-29-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 8843, "url": "http://patches.dpdk.org/api/series/8843/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8843", "date": "2020-03-09T11:43:29", "name": "update ice base code", "version": 1, "mbox": "http://patches.dpdk.org/series/8843/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/66445/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/66445/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AEB5AA052E;\n\tMon, 9 Mar 2020 12:45:14 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CF78D1C1D7;\n\tMon, 9 Mar 2020 12:41:29 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by dpdk.org (Postfix) with ESMTP id DDDD91C001\n for <dev@dpdk.org>; Mon, 9 Mar 2020 12:41:27 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Mar 2020 04:41:27 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n by fmsmga002.fm.intel.com with ESMTP; 09 Mar 2020 04:41:25 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,533,1574150400\"; d=\"scan'208\";a=\"276483685\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com,\n\tbeilei.xing@intel.com", "Cc": "xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Haiyue Wang <haiyue.wang@intel.com>,\n Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 9 Mar 2020 19:43:57 +0800", "Message-Id": "<20200309114357.31800-29-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20200309114357.31800-1-qi.z.zhang@intel.com>", "References": "<20200309114357.31800-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 28/28] net/ice/base: don't access some hardware\n\tregisters in DCF", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "DCF runs as a VF so it can't access PF registers. And export the filter\nmanagement list static functions as public for make DCF initialization.\n\nSigned-off-by: Haiyue Wang <haiyue.wang@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 7 +++++--\n drivers/net/ice/base/ice_common.h | 3 ++-\n drivers/net/ice/base/ice_flex_pipe.c | 8 ++++++--\n drivers/net/ice/base/ice_type.h | 1 +\n 4 files changed, 14 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 14c923701..5f7a9c2e3 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -463,12 +463,13 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)\n * ice_init_fltr_mgmt_struct - initializes filter management list and locks\n * @hw: pointer to the HW struct\n */\n-static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)\n+enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)\n {\n \tstruct ice_switch_info *sw;\n \n \thw->switch_info = (struct ice_switch_info *)\n \t\t\t ice_malloc(hw, sizeof(*hw->switch_info));\n+\n \tsw = hw->switch_info;\n \n \tif (!sw)\n@@ -483,7 +484,7 @@ static enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)\n * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks\n * @hw: pointer to the HW struct\n */\n-static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)\n+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)\n {\n \tstruct ice_switch_info *sw = hw->switch_info;\n \tstruct ice_vsi_list_map_info *v_pos_map;\n@@ -1914,6 +1915,8 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,\n \t\t\t\t\t dev_p->num_flow_director_fltr);\n \t\t\t}\n \t\t\tif (func_p) {\n+\t\t\t\tif (hw->dcf_enabled)\n+\t\t\t\t\tbreak;\n \t\t\t\treg_val = rd32(hw, GLQF_FD_SIZE);\n \t\t\t\tval = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>\n \t\t\t\t GLQF_FD_SIZE_FD_GSIZE_S;\ndiff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h\nindex 087bdb1d8..7369e7fab 100644\n--- a/drivers/net/ice/base/ice_common.h\n+++ b/drivers/net/ice/base/ice_common.h\n@@ -19,7 +19,8 @@ enum ice_fw_modes {\n };\n \n enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);\n-\n+enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);\n+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);\n enum ice_status ice_init_hw(struct ice_hw *hw);\n void ice_deinit_hw(struct ice_hw *hw);\n enum ice_status\ndiff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c\nindex 882b7b886..6de8093cd 100644\n--- a/drivers/net/ice/base/ice_flex_pipe.c\n+++ b/drivers/net/ice/base/ice_flex_pipe.c\n@@ -1253,6 +1253,8 @@ static void ice_init_pkg_regs(struct ice_hw *hw)\n #define ICE_SW_BLK_INP_MASK_L 0xFFFFFFFF\n #define ICE_SW_BLK_INP_MASK_H 0x0000FFFF\n #define ICE_SW_BLK_IDX\t0\n+\tif (hw->dcf_enabled)\n+\t\treturn;\n \n \t/* setup Switch block input mask, which is 48-bits in two parts */\n \twr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);\n@@ -3600,7 +3602,8 @@ void ice_free_hw_tbls(struct ice_hw *hw)\n \t\tice_free(hw, r);\n \t}\n \tice_destroy_lock(&hw->rss_locks);\n-\tice_shutdown_all_prof_masks(hw);\n+\tif (!hw->dcf_enabled)\n+\t\tice_shutdown_all_prof_masks(hw);\n \tice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);\n }\n \n@@ -3680,7 +3683,8 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)\n \n \tice_init_lock(&hw->rss_locks);\n \tINIT_LIST_HEAD(&hw->rss_list_head);\n-\tice_init_all_prof_masks(hw);\n+\tif (!hw->dcf_enabled)\n+\t\tice_init_all_prof_masks(hw);\n \tfor (i = 0; i < ICE_BLK_COUNT; i++) {\n \t\tstruct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;\n \t\tstruct ice_prof_tcam *prof = &hw->blk[i].prof;\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 478940225..c14188f4c 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -822,6 +822,7 @@ struct ice_hw {\n \tint (*aq_send_cmd_fn)(void *param, struct ice_aq_desc *desc,\n \t\t\t void *buf, u16 buf_size);\n \tvoid *aq_send_cmd_param;\n+\tu8 dcf_enabled;\t\t/* Device Config Function */\n \n \tu8 api_branch;\t\t/* API branch version */\n \tu8 api_maj_ver;\t\t/* API major version */\n", "prefixes": [ "28/28" ] }