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GET /api/patches/65524/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 65524,
    "url": "http://patches.dpdk.org/api/patches/65524/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1580815045-32132-14-git-send-email-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1580815045-32132-14-git-send-email-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1580815045-32132-14-git-send-email-anoobj@marvell.com",
    "date": "2020-02-04T11:17:23",
    "name": "[v4,13/15] drivers/octeontx2: add sec in Tx fastpath framework",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "e53712f8a9f97ca635d91bf5fe22a6f954cf7c1f",
    "submitter": {
        "id": 1205,
        "url": "http://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1580815045-32132-14-git-send-email-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 8411,
            "url": "http://patches.dpdk.org/api/series/8411/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8411",
            "date": "2020-02-04T11:17:10",
            "name": "add OCTEON TX2 inline IPsec support",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/8411/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/65524/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/65524/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 571D4A0532;\n\tTue,  4 Feb 2020 12:20:37 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 32FB71BFAD;\n\tTue,  4 Feb 2020 12:19:24 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 31FEC1C1A9\n for <dev@dpdk.org>; Tue,  4 Feb 2020 12:19:22 +0100 (CET)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 014BFNTQ011176; Tue, 4 Feb 2020 03:19:21 -0800",
            "from sc-exch04.marvell.com ([199.233.58.184])\n by mx0b-0016f401.pphosted.com with ESMTP id 2xw9qukg3t-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 04 Feb 2020 03:19:21 -0800",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 Feb\n 2020 03:19:18 -0800",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 4 Feb 2020 03:19:18 -0800",
            "from ajoseph83.caveonetworks.com (unknown [10.29.45.60])\n by maili.marvell.com (Postfix) with ESMTP id E1DB33F70F1;\n Tue,  4 Feb 2020 03:19:14 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=BZjasZZW3i77+0g0NeYvFLgextlSOfhfGasXZDvg37o=;\n b=K3r2pSb6gGJyPVEvgS2+NW9p+fNiwkdTIfcD4YcIrnHGek5Rce+L7Qx6fhc0Ks7CKuRn\n unF+cUq6DtOegtYxlA9NnOWdb5HMLxI3bVPqA+/3zTSI4Fr5S1OMj8J0nqZ0iTSzl0nf\n Rzll+87tDS9uQ2Ax+q4aTfy0oTxTX2908261NJo0Dw5hNz7x6KIWIqr0bweXhIXh1qQ2\n 4lPjigQXL0lik1+VYiC802F1v+AJCqoAmGkRHmo4hfgOEGa0EETlzm/T+8e1vTQoxuJt\n 6uPAj/v49VsLK1BXii0w4zs+4h5YaoXsH7gVW3EBFLYCEWFG6rbC4QVHfWTXva+TPsMP zg==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <akhil.goyal@nxp.com>, Declan Doherty\n <declan.doherty@intel.com>, Thomas Monjalon <thomas@monjalon.net>",
        "CC": "Archana Muniganti <marchana@marvell.com>,\n Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,\n \"Pavan Nikhilesh\" <pbhagavatula@marvell.com>, Ankur Dwivedi\n <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>, Lukasz\n Bartosik <lbartosik@marvell.com>, <dev@dpdk.org>",
        "Date": "Tue, 4 Feb 2020 16:47:23 +0530",
        "Message-ID": "<1580815045-32132-14-git-send-email-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1580815045-32132-1-git-send-email-anoobj@marvell.com>",
        "References": "<1580465035-30455-1-git-send-email-anoobj@marvell.com>\n <1580815045-32132-1-git-send-email-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-02-04_02:2020-02-04,\n 2020-02-04 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v4 13/15] drivers/octeontx2: add sec in Tx\n\tfastpath framework",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Archana Muniganti <marchana@marvell.com>\n\nAdded new flag for SECURITY in compiler optimized Tx fastpath\nframework. With this, compiler autogenerates functions which\nhave security enabled.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c       |  36 ++--\n drivers/event/octeontx2/otx2_evdev.h       |   2 +-\n drivers/event/octeontx2/otx2_worker.c      |   4 +-\n drivers/event/octeontx2/otx2_worker_dual.c |   4 +-\n drivers/net/octeontx2/otx2_ethdev.c        |   3 +\n drivers/net/octeontx2/otx2_tx.c            |  29 +--\n drivers/net/octeontx2/otx2_tx.h            | 271 ++++++++++++++++++++++-------\n 7 files changed, 250 insertions(+), 99 deletions(-)",
    "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex f6c641a..d20213d 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -177,35 +177,37 @@ SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n \t};\n \n \t/* Tx modes */\n-\tconst event_tx_adapter_enqueue ssogws_tx_adptr_enq[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t\t[f5][f4][f3][f2][f1][f0] =  otx2_ssogws_tx_adptr_enq_ ## name,\n+\tconst event_tx_adapter_enqueue\n+\t\tssogws_tx_adptr_enq[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t\t[f6][f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\t\totx2_ssogws_tx_adptr_enq_ ## name,\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n \t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tssogws_tx_adptr_enq_seg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\tssogws_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t\t[f6][f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n \t\t\totx2_ssogws_tx_adptr_enq_seg_ ## name,\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n \t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tssogws_dual_tx_adptr_enq[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\tssogws_dual_tx_adptr_enq[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t\t[f6][f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n \t\t\totx2_ssogws_dual_tx_adptr_enq_ ## name,\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n \t};\n \n \tconst event_tx_adapter_enqueue\n-\t\tssogws_dual_tx_adptr_enq_seg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t\t[f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n+\t\tssogws_dual_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t\t[f6][f5][f4][f3][f2][f1][f0] =\t\t\t\t\\\n \t\t\totx2_ssogws_dual_tx_adptr_enq_seg_ ## name,\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n@@ -290,8 +292,9 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n \t}\n \n \tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {\n-\t\t/* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n+\t\t/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n \t\tevent_dev->txa_enqueue = ssogws_tx_adptr_enq_seg\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n@@ -300,6 +303,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n \t} else {\n \t\tevent_dev->txa_enqueue = ssogws_tx_adptr_enq\n+\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n@@ -440,8 +444,10 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n \t\t}\n \n \t\tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {\n-\t\t/* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n+\t\t/* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */\n \t\t\tevent_dev->txa_enqueue = ssogws_dual_tx_adptr_enq_seg\n+\t\t\t\t[!!(dev->tx_offloads &\n+\t\t\t\t\t\tNIX_TX_OFFLOAD_SECURITY_F)]\n \t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n \t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t\t\t[!!(dev->tx_offloads &\n@@ -454,6 +460,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n \t\t\t\t\t\tNIX_TX_OFFLOAD_L3_L4_CSUM_F)];\n \t\t} else {\n \t\t\tevent_dev->txa_enqueue = ssogws_dual_tx_adptr_enq\n+\t\t\t\t[!!(dev->tx_offloads &\n+\t\t\t\t\t\tNIX_TX_OFFLOAD_SECURITY_F)]\n \t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]\n \t\t\t\t[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t\t\t[!!(dev->tx_offloads &\ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex 5a44fd3..3b47782 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -335,7 +335,7 @@ uint16_t otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port,\t       \\\n SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n #undef R\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t     \\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t     \\\n uint16_t otx2_ssogws_tx_adptr_enq_ ## name(void *port, struct rte_event ev[],\\\n \t\t\t\t\t   uint16_t nb_events);\t\t     \\\n uint16_t otx2_ssogws_tx_adptr_enq_seg_ ## name(void *port,\t\t     \\\ndiff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c\nindex 12445d9..8bec59e 100644\n--- a/drivers/event/octeontx2/otx2_worker.c\n+++ b/drivers/event/octeontx2/otx2_worker.c\n@@ -267,7 +267,7 @@ otx2_ssogws_enq_fwd_burst(void *port, const struct rte_event ev[],\n \treturn 1;\n }\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n uint16_t __hot\t\t\t\t\t\t\t\t\\\n otx2_ssogws_tx_adptr_enq_ ## name(void *port, struct rte_event ev[],\t\\\n \t\t\t\t  uint16_t nb_events)\t\t\t\\\n@@ -281,7 +281,7 @@ otx2_ssogws_tx_adptr_enq_ ## name(void *port, struct rte_event ev[],\t\\\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n uint16_t __hot\t\t\t\t\t\t\t\t\\\n otx2_ssogws_tx_adptr_enq_seg_ ## name(void *port, struct rte_event ev[],\\\n \t\t\t\t      uint16_t nb_events)\t\t\\\ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c\nindex 22a4889..3cba09c 100644\n--- a/drivers/event/octeontx2/otx2_worker_dual.c\n+++ b/drivers/event/octeontx2/otx2_worker_dual.c\n@@ -307,7 +307,7 @@ otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port,\t\t\\\n SSO_RX_ADPTR_ENQ_FASTPATH_FUNC\n #undef R\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n uint16_t __hot\t\t\t\t\t\t\t\t\\\n otx2_ssogws_dual_tx_adptr_enq_ ## name(void *port,\t\t\t\\\n \t\t\t\t       struct rte_event ev[],\t\t\\\n@@ -324,7 +324,7 @@ otx2_ssogws_dual_tx_adptr_enq_ ## name(void *port,\t\t\t\\\n SSO_TX_ADPTR_ENQ_FASTPATH_FUNC\n #undef T\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n uint16_t __hot\t\t\t\t\t\t\t\t\\\n otx2_ssogws_dual_tx_adptr_enq_seg_ ## name(void *port,\t\t\t\\\n \t\t\t\t\t   struct rte_event ev[],\t\\\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex cd7bb6a..2719e71 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -700,6 +700,9 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev)\n \t\t\t  NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |\n \t\t\t  NIX_TX_OFFLOAD_L3_L4_CSUM_F);\n \n+\tif (conf & DEV_TX_OFFLOAD_SECURITY)\n+\t\tflags |= NIX_TX_OFFLOAD_SECURITY_F;\n+\n \tif ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))\n \t\tflags |= NIX_TX_OFFLOAD_TSTAMP_F;\n \ndiff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c\nindex 5011460..4f2036c 100644\n--- a/drivers/net/octeontx2/otx2_tx.c\n+++ b/drivers/net/octeontx2/otx2_tx.c\n@@ -946,7 +946,7 @@ nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,\n }\n #endif\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n static uint16_t __rte_noinline\t__hot\t\t\t\t\t\\\n otx2_nix_xmit_pkts_ ## name(void *tx_queue,\t\t\t\t\\\n \t\t\tstruct rte_mbuf **tx_pkts, uint16_t pkts)\t\\\n@@ -963,7 +963,7 @@ otx2_nix_xmit_pkts_ ## name(void *tx_queue,\t\t\t\t\\\n NIX_TX_FASTPATH_MODES\n #undef T\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n static uint16_t __rte_noinline\t__hot\t\t\t\t\t\\\n otx2_nix_xmit_pkts_mseg_ ## name(void *tx_queue,\t\t\t\\\n \t\t\tstruct rte_mbuf **tx_pkts, uint16_t pkts)\t\\\n@@ -981,7 +981,7 @@ otx2_nix_xmit_pkts_mseg_ ## name(void *tx_queue,\t\t\t\\\n NIX_TX_FASTPATH_MODES\n #undef T\n \n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n static uint16_t __rte_noinline\t__hot\t\t\t\t\t\\\n otx2_nix_xmit_pkts_vec_ ## name(void *tx_queue,\t\t\t\t\\\n \t\t\tstruct rte_mbuf **tx_pkts, uint16_t pkts)\t\\\n@@ -1001,12 +1001,13 @@ NIX_TX_FASTPATH_MODES\n \n static inline void\n pick_tx_func(struct rte_eth_dev *eth_dev,\n-\t     const eth_tx_burst_t tx_burst[2][2][2][2][2][2])\n+\t     const eth_tx_burst_t tx_burst[2][2][2][2][2][2][2])\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \n-\t/* [TSTMP] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n+\t/* [SEC] [TSTMP] [NOFF] [VLAN] [OL3_OL4_CSUM] [IL3_IL4_CSUM] */\n \teth_dev->tx_pkt_burst = tx_burst\n+\t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_SECURITY_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSO_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_TSTAMP_F)]\n \t\t[!!(dev->tx_offload_flags & NIX_TX_OFFLOAD_MBUF_NOFF_F)]\n@@ -1020,25 +1021,25 @@ otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t[f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_ ## name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t[f6][f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_ ## name,\n \n NIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t[f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_mseg_ ## name,\n+\tconst eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t[f6][f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_mseg_ ## name,\n \n NIX_TX_FASTPATH_MODES\n #undef T\n \t};\n \n-\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2] = {\n-#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n-\t[f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_vec_ ## name,\n+\tconst eth_tx_burst_t nix_eth_tx_vec_burst[2][2][2][2][2][2][2] = {\n+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags)\t\t\t\\\n+\t[f6][f5][f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_vec_ ## name,\n \n NIX_TX_FASTPATH_MODES\n #undef T\ndiff --git a/drivers/net/octeontx2/otx2_tx.h b/drivers/net/octeontx2/otx2_tx.h\nindex 04e859b..3c43170 100644\n--- a/drivers/net/octeontx2/otx2_tx.h\n+++ b/drivers/net/octeontx2/otx2_tx.h\n@@ -12,6 +12,7 @@\n #define NIX_TX_OFFLOAD_MBUF_NOFF_F\tBIT(3)\n #define NIX_TX_OFFLOAD_TSTAMP_F\t\tBIT(4)\n #define NIX_TX_OFFLOAD_TSO_F\t\tBIT(5)\n+#define NIX_TX_OFFLOAD_SECURITY_F\tBIT(6)\n \n /* Flags to control xmit_prepare function.\n  * Defining it from backwards to denote its been\n@@ -470,136 +471,274 @@ otx2_nix_xmit_mseg_one(uint64_t *cmd, void *lmt_addr,\n #define NOFF_F       NIX_TX_OFFLOAD_MBUF_NOFF_F\n #define TSP_F        NIX_TX_OFFLOAD_TSTAMP_F\n #define TSO_F        NIX_TX_OFFLOAD_TSO_F\n+#define TX_SEC_F     NIX_TX_OFFLOAD_SECURITY_F\n \n-/* [TSO] [TSTMP] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n+/* [SEC] [TSO] [TSTMP] [NOFF] [VLAN] [OL3OL4CSUM] [L3L4CSUM] */\n #define NIX_TX_FASTPATH_MODES\t\t\t\t\t\t\\\n-T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0,\t4,\t\\\n+T(no_offload,\t\t\t\t0, 0, 0, 0, 0, 0, 0,\t4,\t\\\n \t\tNIX_TX_OFFLOAD_NONE)\t\t\t\t\t\\\n-T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 1,\t4,\t\\\n+T(l3l4csum,\t\t\t\t0, 0, 0, 0, 0, 0, 1,\t4,\t\\\n \t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 1, 0,\t4,\t\\\n+T(ol3ol4csum,\t\t\t\t0, 0, 0, 0, 0, 1, 0,\t4,\t\\\n \t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n-T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 1, 1,\t4,\t\\\n+T(ol3ol4csum_l3l4csum,\t\t\t0, 0, 0, 0, 0, 1, 1,\t4,\t\\\n \t\tOL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\t\\\n-T(vlan,\t\t\t\t\t0, 0, 0, 1, 0, 0,\t6,\t\\\n+T(vlan,\t\t\t\t\t0, 0, 0, 0, 1, 0, 0,\t6,\t\\\n \t\tVLAN_F)\t\t\t\t\t\t\t\\\n-T(vlan_l3l4csum,\t\t\t0, 0, 0, 1, 0, 1,\t6,\t\\\n+T(vlan_l3l4csum,\t\t\t0, 0, 0, 0, 1, 0, 1,\t6,\t\\\n \t\tVLAN_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 0,\t6,\t\\\n+T(vlan_ol3ol4csum,\t\t\t0, 0, 0, 0, 1, 1, 0,\t6,\t\\\n \t\tVLAN_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 1, 1,\t6,\t\\\n+T(vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 0, 1, 1, 1,\t6,\t\\\n \t\tVLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff,\t\t\t\t\t0, 0, 1, 0, 0, 0,\t4,\t\\\n+T(noff,\t\t\t\t\t0, 0, 0, 1, 0, 0, 0,\t4,\t\\\n \t\tNOFF_F)\t\t\t\t\t\t\t\\\n-T(noff_l3l4csum,\t\t\t0, 0, 1, 0, 0, 1,\t4,\t\\\n+T(noff_l3l4csum,\t\t\t0, 0, 0, 1, 0, 0, 1,\t4,\t\\\n \t\tNOFF_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 0,\t4,\t\\\n+T(noff_ol3ol4csum,\t\t\t0, 0, 0, 1, 0, 1, 0,\t4,\t\\\n \t\tNOFF_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1,\t4,\t\\\n+T(noff_ol3ol4csum_l3l4csum,\t\t0, 0, 0, 1, 0, 1, 1,\t4,\t\\\n \t\tNOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\t\\\n-T(noff_vlan,\t\t\t\t0, 0, 1, 1, 0, 0,\t6,\t\\\n+T(noff_vlan,\t\t\t\t0, 0, 0, 1, 1, 0, 0,\t6,\t\\\n \t\tNOFF_F | VLAN_F)\t\t\t\t\t\\\n-T(noff_vlan_l3l4csum,\t\t\t0, 0, 1, 1, 0, 1,\t6,\t\\\n+T(noff_vlan_l3l4csum,\t\t\t0, 0, 0, 1, 1, 0, 1,\t6,\t\\\n \t\tNOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 1, 1, 1, 0,\t6,\t\\\n+T(noff_vlan_ol3ol4csum,\t\t\t0, 0, 0, 1, 1, 1, 0,\t6,\t\\\n \t\tNOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1,\t6,\t\\\n+T(noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 0, 1, 1, 1, 1,\t6,\t\\\n \t\tNOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(ts,\t\t\t\t\t0, 1, 0, 0, 0, 0,\t8,\t\\\n+T(ts,\t\t\t\t\t0, 0, 1, 0, 0, 0, 0,\t8,\t\\\n \t\tTSP_F)\t\t\t\t\t\t\t\\\n-T(ts_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 1,\t8,\t\\\n+T(ts_l3l4csum,\t\t\t\t0, 0, 1, 0, 0, 0, 1,\t8,\t\\\n \t\tTSP_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(ts_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 0,\t8,\t\\\n+T(ts_ol3ol4csum,\t\t\t0, 0, 1, 0, 0, 1, 0,\t8,\t\\\n \t\tTSP_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(ts_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1,\t8,\t\\\n+T(ts_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 0, 1, 1,\t8,\t\\\n \t\tTSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_vlan,\t\t\t\t0, 1, 0, 1, 0, 0,\t8,\t\\\n+T(ts_vlan,\t\t\t\t0, 0, 1, 0, 1, 0, 0,\t8,\t\\\n \t\tTSP_F | VLAN_F)\t\t\t\t\t\t\\\n-T(ts_vlan_l3l4csum,\t\t\t0, 1, 0, 1, 0, 1,\t8,\t\\\n+T(ts_vlan_l3l4csum,\t\t\t0, 0, 1, 0, 1, 0, 1,\t8,\t\\\n \t\tTSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(ts_vlan_ol3ol4csum,\t\t\t0, 1, 0, 1, 1, 0,\t8,\t\\\n+T(ts_vlan_ol3ol4csum,\t\t\t0, 0, 1, 0, 1, 1, 0,\t8,\t\\\n \t\tTSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(ts_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 1, 1,\t8,\t\\\n+T(ts_vlan_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 0, 1, 1, 1,\t8,\t\\\n \t\tTSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(ts_noff,\t\t\t\t0, 1, 1, 0, 0, 0,\t8,\t\\\n+T(ts_noff,\t\t\t\t0, 0, 1, 1, 0, 0, 0,\t8,\t\\\n \t\tTSP_F | NOFF_F)\t\t\t\t\t\t\\\n-T(ts_noff_l3l4csum,\t\t\t0, 1, 1, 0, 0, 1,\t8,\t\\\n+T(ts_noff_l3l4csum,\t\t\t0, 0, 1, 1, 0, 0, 1,\t8,\t\\\n \t\tTSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(ts_noff_ol3ol4csum,\t\t\t0, 1, 1, 0, 1, 0,\t8,\t\\\n+T(ts_noff_ol3ol4csum,\t\t\t0, 0, 1, 1, 0, 1, 0,\t8,\t\\\n \t\tTSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(ts_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 1, 1,\t8,\t\\\n+T(ts_noff_ol3ol4csum_l3l4csum,\t\t0, 0, 1, 1, 0, 1, 1,\t8,\t\\\n \t\tTSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(ts_noff_vlan,\t\t\t\t0, 1, 1, 1, 0, 0,\t8,\t\\\n+T(ts_noff_vlan,\t\t\t\t0, 0, 1, 1, 1, 0, 0,\t8,\t\\\n \t\tTSP_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(ts_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 0, 1,\t8,\t\\\n+T(ts_noff_vlan_l3l4csum,\t\t0, 0, 1, 1, 1, 0, 1,\t8,\t\\\n \t\tTSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(ts_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 0,\t8,\t\\\n+T(ts_noff_vlan_ol3ol4csum,\t\t0, 0, 1, 1, 1, 1, 0,\t8,\t\\\n \t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1,\t8,\t\\\n+T(ts_noff_vlan_ol3ol4csum_l3l4csum,\t0, 0, 1, 1, 1, 1, 1,\t8,\t\\\n \t\tTSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n \t\t\t\t\t\t\t\t\t\\\n-T(tso,\t\t\t\t\t1, 0, 0, 0, 0, 0,\t6,\t\\\n+T(tso,\t\t\t\t\t0, 1, 0, 0, 0, 0, 0,\t6,\t\\\n \t\tTSO_F)\t\t\t\t\t\t\t\\\n-T(tso_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 1,\t6,\t\\\n+T(tso_l3l4csum,\t\t\t\t0, 1, 0, 0, 0, 0, 1,\t6,\t\\\n \t\tTSO_F | L3L4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 0,\t6,\t\\\n+T(tso_ol3ol4csum,\t\t\t0, 1, 0, 0, 0, 1, 0,\t6,\t\\\n \t\tTSO_F | OL3OL4CSUM_F)\t\t\t\t\t\\\n-T(tso_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1,\t6,\t\\\n+T(tso_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 0, 1, 1,\t6,\t\\\n \t\tTSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_vlan,\t\t\t\t1, 0, 0, 1, 0, 0,\t6,\t\\\n+T(tso_vlan,\t\t\t\t0, 1, 0, 0, 1, 0, 0,\t6,\t\\\n \t\tTSO_F | VLAN_F)\t\t\t\t\t\t\\\n-T(tso_vlan_l3l4csum,\t\t\t1, 0, 0, 1, 0, 1,\t6,\t\\\n+T(tso_vlan_l3l4csum,\t\t\t0, 1, 0, 0, 1, 0, 1,\t6,\t\\\n \t\tTSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum,\t\t\t1, 0, 0, 1, 1, 0,\t6,\t\\\n+T(tso_vlan_ol3ol4csum,\t\t\t0, 1, 0, 0, 1, 1, 0,\t6,\t\\\n \t\tTSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 1, 1,\t6,\t\\\n+T(tso_vlan_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 0, 1, 1, 1,\t6,\t\\\n \t\tTSO_F | VLAN_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff,\t\t\t\t1, 0, 1, 0, 0, 0,\t6,\t\\\n+T(tso_noff,\t\t\t\t0, 1, 0, 1, 0, 0, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F)\t\t\t\t\t\t\\\n-T(tso_noff_l3l4csum,\t\t\t1, 0, 1, 0, 0, 1,\t6,\t\\\n+T(tso_noff_l3l4csum,\t\t\t0, 1, 0, 1, 0, 0, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum,\t\t\t1, 0, 1, 0, 1, 0,\t6,\t\\\n+T(tso_noff_ol3ol4csum,\t\t\t0, 1, 0, 1, 0, 1, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 1, 1,\t6,\t\\\n+T(tso_noff_ol3ol4csum_l3l4csum,\t\t0, 1, 0, 1, 0, 1, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | OL3OL4CSUM_F |\tL3L4CSUM_F)\t\t\\\n-T(tso_noff_vlan,\t\t\t1, 0, 1, 1, 0, 0,\t6,\t\\\n+T(tso_noff_vlan,\t\t\t0, 1, 0, 1, 1, 0, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F)\t\t\t\t\\\n-T(tso_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 0, 1,\t6,\t\\\n+T(tso_noff_vlan_l3l4csum,\t\t0, 1, 0, 1, 1, 0, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 0,\t6,\t\\\n+T(tso_noff_vlan_ol3ol4csum,\t\t0, 1, 0, 1, 1, 1, 0,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 1, 1,\t6,\t\\\n+T(tso_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 0, 1, 1, 1, 1,\t6,\t\\\n \t\tTSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(tso_ts,\t\t\t\t1, 1, 0, 0, 0, 0,\t8,\t\\\n+T(tso_ts,\t\t\t\t0, 1, 1, 0, 0, 0, 0,\t8,\t\\\n \t\tTSO_F | TSP_F)\t\t\t\t\t\t\\\n-T(tso_ts_l3l4csum,\t\t\t1, 1, 0, 0, 0, 1,\t8,\t\\\n+T(tso_ts_l3l4csum,\t\t\t0, 1, 1, 0, 0, 0, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | L3L4CSUM_F)\t\t\t\t\\\n-T(tso_ts_ol3ol4csum,\t\t\t1, 1, 0, 0, 1, 0,\t8,\t\\\n+T(tso_ts_ol3ol4csum,\t\t\t0, 1, 1, 0, 0, 1, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | OL3OL4CSUM_F)\t\t\t\t\\\n-T(tso_ts_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 1, 1,\t8,\t\\\n+T(tso_ts_ol3ol4csum_l3l4csum,\t\t0, 1, 1, 0, 0, 1, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n-T(tso_ts_vlan,\t\t\t\t1, 1, 0, 1, 0, 0,\t8,\t\\\n+T(tso_ts_vlan,\t\t\t\t0, 1, 1, 0, 1, 0, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | VLAN_F)\t\t\t\t\t\\\n-T(tso_ts_vlan_l3l4csum,\t\t\t1, 1, 0, 1, 0, 1,\t8,\t\\\n+T(tso_ts_vlan_l3l4csum,\t\t\t0, 1, 1, 0, 1, 0, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_ts_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 0,\t8,\t\\\n+T(tso_ts_vlan_ol3ol4csum,\t\t0, 1, 1, 0, 1, 1, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_ts_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 1, 1,\t8,\t\\\n+T(tso_ts_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 0, 1, 1, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(tso_ts_noff,\t\t\t\t1, 1, 1, 0, 0, 0,\t8,\t\\\n+T(tso_ts_noff,\t\t\t\t0, 1, 1, 1, 0, 0, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F)\t\t\t\t\t\\\n-T(tso_ts_noff_l3l4csum,\t\t\t1, 1, 1, 0, 0, 1,\t8,\t\\\n+T(tso_ts_noff_l3l4csum,\t\t\t0, 1, 1, 1, 0, 0, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n-T(tso_ts_noff_ol3ol4csum,\t\t1, 1, 1, 0, 1, 0,\t8,\t\\\n+T(tso_ts_noff_ol3ol4csum,\t\t0, 1, 1, 1, 0, 1, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n-T(tso_ts_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1,\t8,\t\\\n+T(tso_ts_noff_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 0, 1, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n-T(tso_ts_noff_vlan,\t\t\t1, 1, 1, 1, 0, 0,\t8,\t\\\n+T(tso_ts_noff_vlan,\t\t\t0, 1, 1, 1, 1, 0, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | VLAN_F)\t\t\t\\\n-T(tso_ts_noff_vlan_l3l4csum,\t\t1, 1, 1, 1, 0, 1,\t8,\t\\\n+T(tso_ts_noff_vlan_l3l4csum,\t\t0, 1, 1, 1, 1, 0, 1,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n-T(tso_ts_noff_vlan_ol3ol4csum,\t\t1, 1, 1, 1, 1, 0,\t8,\t\\\n+T(tso_ts_noff_vlan_ol3ol4csum,\t\t0, 1, 1, 1, 1, 1, 0,\t8,\t\\\n \t\tTSO_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n-T(tso_ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 1, 1,\t8,\t\\\n-\t\tTSO_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\n+T(tso_ts_noff_vlan_ol3ol4csum_l3l4csum,\t0, 1, 1, 1, 1, 1, 1,\t8,\t\\\n+\t\tTSO_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F |\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(sec,\t\t\t\t\t1, 0, 0, 0, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F)\t\t\t\t\t\t\\\n+T(sec_l3l4csum,\t\t\t\t1, 0, 0, 0, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | L3L4CSUM_F)\t\t\t\t\t\\\n+T(sec_ol3ol4csum,\t\t\t1, 0, 0, 0, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | OL3OL4CSUM_F)\t\t\t\t\\\n+T(sec_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_vlan,\t\t\t\t1, 0, 0, 0, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | VLAN_F)\t\t\t\t\t\\\n+T(sec_vlan_l3l4csum,\t\t\t1, 0, 0, 0, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | VLAN_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_vlan_ol3ol4csum,\t\t\t1, 0, 0, 0, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | VLAN_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_vlan_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 0, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_noff,\t\t\t\t1, 0, 0, 1, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F)\t\t\t\t\t\\\n+T(sec_noff_l3l4csum,\t\t\t1, 0, 0, 1, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_noff_ol3ol4csum,\t\t\t1, 0, 0, 1, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_noff_ol3ol4csum_l3l4csum,\t\t1, 0, 0, 1, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_noff_vlan,\t\t\t1, 0, 0, 1, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | VLAN_F)\t\t\t\t\\\n+T(sec_noff_vlan_l3l4csum,\t\t1, 0, 0, 1, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(sec_noff_vlan_ol3ol4csum,\t\t1, 0, 0, 1, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 0, 1, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | NOFF_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts,\t\t\t\t1, 0, 1, 0, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F)\t\t\t\t\t\\\n+T(sec_ts_l3l4csum,\t\t\t1, 0, 1, 0, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_ts_ol3ol4csum,\t\t\t1, 0, 1, 0, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_ts_ol3ol4csum_l3l4csum,\t\t1, 0, 1, 0, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_ts_vlan,\t\t\t\t1, 0, 1, 0, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | VLAN_F)\t\t\t\t\\\n+T(sec_ts_vlan_l3l4csum,\t\t\t1, 0, 1, 0, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_ts_vlan_ol3ol4csum,\t\t1, 0, 1, 0, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_ts_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 0, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts_noff,\t\t\t\t1, 0, 1, 1, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F)\t\t\t\t\\\n+T(sec_ts_noff_l3l4csum,\t\t\t1, 0, 1, 1, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_ts_noff_ol3ol4csum,\t\t1, 0, 1, 1, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_ts_noff_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_ts_noff_vlan,\t\t\t1, 0, 1, 1, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(sec_ts_noff_vlan_l3l4csum,\t\t1, 0, 1, 1, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\\\n+T(sec_ts_noff_vlan_ol3ol4csum,\t\t1, 0, 1, 1, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_ts_noff_vlan_ol3ol4csum_l3l4csum,\t1, 0, 1, 1, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSP_F | NOFF_F | VLAN_F | OL3OL4CSUM_F |\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(sec_tso,\t\t\t\t1, 1, 0, 0, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F)\t\t\t\t\t\\\n+T(sec_tso_l3l4csum,\t\t\t1, 1, 0, 0, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | L3L4CSUM_F)\t\t\t\t\\\n+T(sec_tso_ol3ol4csum,\t\t\t1, 1, 0, 0, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | OL3OL4CSUM_F)\t\t\t\\\n+T(sec_tso_ol3ol4csum_l3l4csum,\t\t1, 1, 0, 0, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\t\\\n+T(sec_tso_vlan,\t\t\t\t1, 1, 0, 0, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | VLAN_F)\t\t\t\t\\\n+T(sec_tso_vlan_l3l4csum,\t\t1, 1, 0, 0, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | VLAN_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_tso_vlan_ol3ol4csum,\t\t1, 1, 0, 0, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_tso_vlan_ol3ol4csum_l3l4csum,\t1, 1, 0, 0, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | VLAN_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso_noff,\t\t\t\t1, 1, 0, 1, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F)\t\t\t\t\\\n+T(sec_tso_noff_l3l4csum,\t\t1, 1, 0, 1, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_tso_noff_ol3ol4csum,\t\t1, 1, 0, 1, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_tso_noff_ol3ol4csum_l3l4csum,\t1, 1, 0, 1, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso_noff_vlan,\t\t\t1, 1, 0, 1, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | VLAN_F)\t\t\t\\\n+T(sec_tso_noff_vlan_l3l4csum,\t\t1, 1, 0, 1, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | VLAN_F | L3L4CSUM_F)\t\\\n+T(sec_tso_noff_vlan_ol3ol4csum,\t\t1, 1, 0, 1, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_tso_noff_vlan_ol3ol4csum_l3l4csum,\t\t\t\t\\\n+\t\t\t\t\t1, 1, 0, 1, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | NOFF_F | VLAN_F | OL3OL4CSUM_F |\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(sec_tso_ts,\t\t\t\t1, 1, 1, 0, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F)\t\t\t\t\\\n+T(sec_tso_ts_l3l4csum,\t\t\t1, 1, 1, 0, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | L3L4CSUM_F)\t\t\t\\\n+T(sec_tso_ts_ol3ol4csum,\t\t1, 1, 1, 0, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | OL3OL4CSUM_F)\t\t\\\n+T(sec_tso_ts_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | OL3OL4CSUM_F | L3L4CSUM_F)\t\\\n+T(sec_tso_ts_vlan,\t\t\t1, 1, 1, 0, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | VLAN_F)\t\t\t\\\n+T(sec_tso_ts_vlan_l3l4csum,\t\t1, 1, 1, 0, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | VLAN_F | L3L4CSUM_F)\t\t\\\n+T(sec_tso_ts_vlan_ol3ol4csum,\t\t1, 1, 1, 0, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F)\t\\\n+T(sec_tso_ts_vlan_ol3ol4csum_l3l4csum,\t1, 1, 1, 0, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | VLAN_F | OL3OL4CSUM_F |\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(sec_tso_ts_noff,\t\t\t1, 1, 1, 1, 0, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F)\t\t\t\\\n+T(sec_tso_ts_noff_l3l4csum,\t\t1, 1, 1, 1, 0, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | L3L4CSUM_F)\t\t\\\n+T(sec_tso_ts_noff_ol3ol4csum,\t\t1, 1, 1, 1, 0, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F)\t\\\n+T(sec_tso_ts_noff_ol3ol4csum_l3l4csum,\t1, 1, 1, 1, 0, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | OL3OL4CSUM_F |\t\\\n+\t\tL3L4CSUM_F)\t\t\t\t\t\t\\\n+T(sec_tso_ts_noff_vlan,\t\t\t1, 1, 1, 1, 1, 0, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | VLAN_F)\t\t\\\n+T(sec_tso_ts_noff_vlan_l3l4csum,\t1, 1, 1, 1, 1, 0, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | VLAN_F | L3L4CSUM_F)\\\n+T(sec_tso_ts_noff_vlan_ol3ol4csum,\t1, 1, 1, 1, 1, 1, 0,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | VLAN_F |\t\t\\\n+\t\tOL3OL4CSUM_F)\t\t\t\t\t\t\\\n+T(sec_tso_ts_noff_vlan_ol3ol4csum_l3l4csum,\t\t\t\t\\\n+\t\t\t\t\t1, 1, 1, 1, 1, 1, 1,\t8,\t\\\n+\t\tTX_SEC_F | TSO_F | TSP_F | NOFF_F | VLAN_F |\t\t\\\n+\t\tOL3OL4CSUM_F | L3L4CSUM_F)\n #endif /* __OTX2_TX_H__ */\n",
    "prefixes": [
        "v4",
        "13/15"
    ]
}