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GET /api/patches/65522/?format=api
{ "id": 65522, "url": "http://patches.dpdk.org/api/patches/65522/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1580815045-32132-12-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1580815045-32132-12-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1580815045-32132-12-git-send-email-anoobj@marvell.com", "date": "2020-02-04T11:17:21", "name": "[v4,11/15] net/octeontx2: add inline ipsec Rx path changes", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c05833294cdb82d748c4315ee34dfd48e90bac4d", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1580815045-32132-12-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 8411, "url": "http://patches.dpdk.org/api/series/8411/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8411", "date": "2020-02-04T11:17:10", "name": "add OCTEON TX2 inline IPsec support", "version": 4, "mbox": "http://patches.dpdk.org/series/8411/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/65522/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/65522/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C32E1A0532;\n\tTue, 4 Feb 2020 12:20:09 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E10C21C01E;\n\tTue, 4 Feb 2020 12:19:13 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id C0E8F1BF7B\n for <dev@dpdk.org>; Tue, 4 Feb 2020 12:19:11 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 014BFAMv010792; Tue, 4 Feb 2020 03:19:11 -0800", "from sc-exch01.marvell.com ([199.233.58.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 2xw9qukg38-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 04 Feb 2020 03:19:11 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 4 Feb 2020 03:19:08 -0800", "from SC-EXCH01.marvell.com (10.93.176.81) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 4 Feb 2020 03:19:08 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 4 Feb 2020 03:19:07 -0800", "from ajoseph83.caveonetworks.com (unknown [10.29.45.60])\n by maili.marvell.com (Postfix) with ESMTP id 8D2FD3F70BF;\n Tue, 4 Feb 2020 03:19:03 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0818;\n bh=XRnqlEx7alZtWBupqfgrNiY3iNsy3kzzPlF9ccUnmAQ=;\n b=Kx3r/lGxWQ4PlB2ySTcLh4zrRzDUp/2WuzxDfciC17AsVkcPSQErold+uf+2H/05QpTN\n XNQjy+VlNUNciRkZVC42PlDTaqKdcrN94lKXbbwlUxKkVQw9ZlmgcmYDh0TZFopw70/o\n Iyvl56Itm2iEMfg/vEh1ltCA0nhoxLz42sXjy3QfUUiYA7mWvAEpISPkgLTBMTJ4LQuG\n pvVud+olWOctg8vcyT2A1iAWke8GL8aiYwBQCs0dn0lW+PNi8Mt0KzzyHxcNVcSawzlj\n gFkeHRs7xCAsh6t7sviuLuZcLSKwRafOGGPiKCe/Jb4Gdw++CBh/jW7Yy+XgSxDewfGi sg==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <akhil.goyal@nxp.com>, Declan Doherty\n <declan.doherty@intel.com>, Thomas Monjalon <thomas@monjalon.net>", "CC": "Tejasree Kondoj <ktejasree@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Narayana Prasad <pathreya@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>,\n \"Pavan Nikhilesh\" <pbhagavatula@marvell.com>, Ankur Dwivedi\n <adwivedi@marvell.com>, Anoob Joseph <anoobj@marvell.com>,\n Archana Muniganti <marchana@marvell.com>,\n Vamsi Attunuru <vattunuru@marvell.com>, Lukasz\n Bartosik <lbartosik@marvell.com>, <dev@dpdk.org>", "Date": "Tue, 4 Feb 2020 16:47:21 +0530", "Message-ID": "<1580815045-32132-12-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1580815045-32132-1-git-send-email-anoobj@marvell.com>", "References": "<1580465035-30455-1-git-send-email-anoobj@marvell.com>\n <1580815045-32132-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-02-04_02:2020-02-04,\n 2020-02-04 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 11/15] net/octeontx2: add inline ipsec Rx path\n\tchanges", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Tejasree Kondoj <ktejasree@marvell.com>\n\nAdding post-processing required for inline IPsec inbound packets.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\nSigned-off-by: Archana Muniganti <marchana@marvell.com>\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\nSigned-off-by: Vamsi Attunuru <vattunuru@marvell.com>\n---\n drivers/crypto/octeontx2/Makefile | 3 +-\n drivers/crypto/octeontx2/meson.build | 2 +\n drivers/event/octeontx2/Makefile | 1 +\n drivers/event/octeontx2/meson.build | 2 +\n drivers/net/octeontx2/otx2_rx.h | 73 ++++++++++++++++++++++++++++++++++++\n 5 files changed, 80 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/crypto/octeontx2/Makefile b/drivers/crypto/octeontx2/Makefile\nindex 3ba67ed..1458e2b 100644\n--- a/drivers/crypto/octeontx2/Makefile\n+++ b/drivers/crypto/octeontx2/Makefile\n@@ -11,7 +11,7 @@ LIB = librte_pmd_octeontx2_crypto.a\n CFLAGS += $(WERROR_FLAGS)\n \n LDLIBS += -lrte_eal -lrte_ethdev -lrte_mbuf -lrte_mempool -lrte_ring\n-LDLIBS += -lrte_cryptodev\n+LDLIBS += -lrte_cryptodev -lrte_security\n LDLIBS += -lrte_pci -lrte_bus_pci\n LDLIBS += -lrte_common_cpt -lrte_common_octeontx2\n \n@@ -20,6 +20,7 @@ VPATH += $(RTE_SDK)/drivers/crypto/octeontx2\n CFLAGS += -O3\n CFLAGS += -I$(RTE_SDK)/drivers/common/cpt\n CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2\n+CFLAGS += -I$(RTE_SDK)/drivers/crypto/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2\n CFLAGS += -DALLOW_EXPERIMENTAL_API\ndiff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build\nindex 67deca3..a531799 100644\n--- a/drivers/crypto/octeontx2/meson.build\n+++ b/drivers/crypto/octeontx2/meson.build\n@@ -9,6 +9,7 @@ deps += ['bus_pci']\n deps += ['common_cpt']\n deps += ['common_octeontx2']\n deps += ['ethdev']\n+deps += ['security']\n name = 'octeontx2_crypto'\n \n allow_experimental_apis = true\n@@ -32,5 +33,6 @@ endforeach\n \n includes += include_directories('../../common/cpt')\n includes += include_directories('../../common/octeontx2')\n+includes += include_directories('../../crypto/octeontx2')\n includes += include_directories('../../mempool/octeontx2')\n includes += include_directories('../../net/octeontx2')\ndiff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile\nindex 6dab69c..bcd22ee 100644\n--- a/drivers/event/octeontx2/Makefile\n+++ b/drivers/event/octeontx2/Makefile\n@@ -11,6 +11,7 @@ LIB = librte_pmd_octeontx2_event.a\n \n CFLAGS += $(WERROR_FLAGS)\n CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2\n+CFLAGS += -I$(RTE_SDK)/drivers/crypto/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/event/octeontx2\n CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2\ndiff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build\nindex 807818b..56febb8 100644\n--- a/drivers/event/octeontx2/meson.build\n+++ b/drivers/event/octeontx2/meson.build\n@@ -32,3 +32,5 @@ foreach flag: extra_flags\n endforeach\n \n deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2']\n+\n+includes += include_directories('../../crypto/octeontx2')\ndiff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h\nindex 351ad0f..eac4717 100644\n--- a/drivers/net/octeontx2/otx2_rx.h\n+++ b/drivers/net/octeontx2/otx2_rx.h\n@@ -5,6 +5,12 @@\n #ifndef __OTX2_RX_H__\n #define __OTX2_RX_H__\n \n+#include <rte_ether.h>\n+\n+#include \"otx2_common.h\"\n+#include \"otx2_ethdev_sec.h\"\n+#include \"otx2_ipsec_fp.h\"\n+\n /* Default mark value used when none is provided. */\n #define OTX2_FLOW_ACTION_FLAG_DEFAULT\t0xffff\n \n@@ -31,6 +37,12 @@\n #define NIX_RX_MULTI_SEG_F BIT(15)\n #define NIX_TIMESYNC_RX_OFFSET\t\t8\n \n+/* Inline IPsec offsets */\n+\n+#define INLINE_INB_RPTR_HDR\t\t16\n+/* nix_cqe_hdr_s + nix_rx_parse_s + nix_rx_sg_s + nix_iova_s */\n+#define INLINE_CPT_RESULT_OFFSET\t80\n+\n struct otx2_timesync_info {\n \tuint64_t\trx_tstamp;\n \trte_iova_t\ttx_tstamp_iova;\n@@ -190,6 +202,60 @@ nix_cqe_xtract_mseg(const struct nix_rx_parse_s *rx,\n \t}\n }\n \n+static __rte_always_inline uint16_t\n+nix_rx_sec_cptres_get(const void *cq)\n+{\n+\tvolatile const struct otx2_cpt_res *res;\n+\n+\tres = (volatile const struct otx2_cpt_res *)((const char *)cq +\n+\t\t\tINLINE_CPT_RESULT_OFFSET);\n+\n+\treturn res->u16[0];\n+}\n+\n+static __rte_always_inline void *\n+nix_rx_sec_sa_get(const void * const lookup_mem, int spi, uint16_t port)\n+{\n+\tconst uint64_t *const *sa_tbl = (const uint64_t * const *)\n+\t\t\t((const uint8_t *)lookup_mem + OTX2_NIX_SA_TBL_START);\n+\n+\treturn (void *)sa_tbl[port][spi];\n+}\n+\n+static __rte_always_inline uint64_t\n+nix_rx_sec_mbuf_update(const struct nix_cqe_hdr_s *cq, struct rte_mbuf *m,\n+\t\t const void * const lookup_mem)\n+{\n+\tstruct otx2_ipsec_fp_in_sa *sa;\n+\tstruct rte_ipv4_hdr *ipv4;\n+\tuint16_t m_len;\n+\tuint32_t spi;\n+\tchar *data;\n+\n+\tif (unlikely(nix_rx_sec_cptres_get(cq) != OTX2_SEC_COMP_GOOD))\n+\t\treturn PKT_RX_SEC_OFFLOAD | PKT_RX_SEC_OFFLOAD_FAILED;\n+\n+\t/* 20 bits of tag would have the SPI */\n+\tspi = cq->tag & 0xFFFFF;\n+\n+\tsa = nix_rx_sec_sa_get(lookup_mem, spi, m->port);\n+\tm->udata64 = (uint64_t)sa->userdata;\n+\n+\tdata = rte_pktmbuf_mtod(m, char *);\n+\tmemcpy(data + INLINE_INB_RPTR_HDR, data, RTE_ETHER_HDR_LEN);\n+\n+\tm->data_off += INLINE_INB_RPTR_HDR;\n+\n+\tipv4 = (struct rte_ipv4_hdr *)(data + INLINE_INB_RPTR_HDR +\n+\t\t\t\t RTE_ETHER_HDR_LEN);\n+\n+\tm_len = rte_be_to_cpu_16(ipv4->total_length) + RTE_ETHER_HDR_LEN;\n+\n+\tm->data_len = m_len;\n+\tm->pkt_len = m_len;\n+\treturn PKT_RX_SEC_OFFLOAD;\n+}\n+\n static __rte_always_inline void\n otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \t\t struct rte_mbuf *mbuf, const void *lookup_mem,\n@@ -231,6 +297,13 @@ otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,\n \tif (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)\n \t\tol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);\n \n+\tif (cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {\n+\t\t*(uint64_t *)(&mbuf->rearm_data) = val;\n+\t\tol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, lookup_mem);\n+\t\tmbuf->ol_flags = ol_flags;\n+\t\treturn;\n+\t}\n+\n \tmbuf->ol_flags = ol_flags;\n \t*(uint64_t *)(&mbuf->rearm_data) = val;\n \tmbuf->pkt_len = len;\n", "prefixes": [ "v4", "11/15" ] }