Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/65294/?format=api
{ "id": 65294, "url": "http://patches.dpdk.org/api/patches/65294/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1580292549-27439-7-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1580292549-27439-7-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1580292549-27439-7-git-send-email-matan@mellanox.com", "date": "2020-01-29T10:09:02", "name": "[v2,06/13] vdpa/mlx5: prepare virtio queues", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "82697910ea0b15cacfd0a405126c08ba82bddbe6", "submitter": { "id": 796, "url": "http://patches.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 2642, "url": "http://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1580292549-27439-7-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 8335, "url": "http://patches.dpdk.org/api/series/8335/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8335", "date": "2020-01-29T10:08:56", "name": "Introduce mlx5 vDPA driver", "version": 2, "mbox": "http://patches.dpdk.org/series/8335/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/65294/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/65294/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3CA12A0531;\n\tWed, 29 Jan 2020 11:10:24 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B596E1BFE7;\n\tWed, 29 Jan 2020 11:09:55 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id CFC741BFE0\n for <dev@dpdk.org>; Wed, 29 Jan 2020 11:09:54 +0100 (CET)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n asafp@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 29 Jan 2020 12:09:53 +0200", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00TA9BHM032108;\n Wed, 29 Jan 2020 12:09:53 +0200" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "dev@dpdk.org, Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "Maxime Coquelin <maxime.coquelin@redhat.com>", "Date": "Wed, 29 Jan 2020 10:09:02 +0000", "Message-Id": "<1580292549-27439-7-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1580292549-27439-1-git-send-email-matan@mellanox.com>", "References": "<1579539790-3882-1-git-send-email-matan@mellanox.com>\n <1580292549-27439-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2 06/13] vdpa/mlx5: prepare virtio queues", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The HW virtq object represents an emulated context for a VIRTIO_NET\nvirtqueue which was created and managed by a VIRTIO_NET driver as\ndefined in VIRTIO Specification.\n\nAdd support to prepare and release all the basic HW resources needed\nthe user virtqs emulation according to the rte_vhost configurations.\n\nThis patch prepares the basic configurations needed by DevX commands to\ncreate a virtq.\n\nAdd new file mlx5_vdpa_virtq.c to manage virtq operations.\n\nSigned-off-by: Matan Azrad <matan@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/vdpa/mlx5/Makefile | 1 +\n drivers/vdpa/mlx5/meson.build | 1 +\n drivers/vdpa/mlx5/mlx5_vdpa.c | 1 +\n drivers/vdpa/mlx5/mlx5_vdpa.h | 36 ++++++\n drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 212 ++++++++++++++++++++++++++++++++++++\n 5 files changed, 251 insertions(+)\n create mode 100644 drivers/vdpa/mlx5/mlx5_vdpa_virtq.c", "diff": "diff --git a/drivers/vdpa/mlx5/Makefile b/drivers/vdpa/mlx5/Makefile\nindex 7f13756..353e262 100644\n--- a/drivers/vdpa/mlx5/Makefile\n+++ b/drivers/vdpa/mlx5/Makefile\n@@ -10,6 +10,7 @@ LIB = librte_pmd_mlx5_vdpa.a\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD) += mlx5_vdpa.c\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD) += mlx5_vdpa_mem.c\n SRCS-$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD) += mlx5_vdpa_event.c\n+SRCS-$(CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD) += mlx5_vdpa_virtq.c\n \n # Basic CFLAGS.\n CFLAGS += -O3\ndiff --git a/drivers/vdpa/mlx5/meson.build b/drivers/vdpa/mlx5/meson.build\nindex c609f7c..e017f95 100644\n--- a/drivers/vdpa/mlx5/meson.build\n+++ b/drivers/vdpa/mlx5/meson.build\n@@ -14,6 +14,7 @@ sources = files(\n \t'mlx5_vdpa.c',\n \t'mlx5_vdpa_mem.c',\n \t'mlx5_vdpa_event.c',\n+\t'mlx5_vdpa_virtq.c',\n )\n cflags_options = [\n \t'-std=c11',\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex c67f93d..4d30b35 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -229,6 +229,7 @@\n \t\tgoto error;\n \t}\n \tSLIST_INIT(&priv->mr_list);\n+\tSLIST_INIT(&priv->virtq_list);\n \tpthread_mutex_lock(&priv_list_lock);\n \tTAILQ_INSERT_TAIL(&priv_list, priv, next);\n \tpthread_mutex_unlock(&priv_list_lock);\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h\nindex 30030b7..a7e2185 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.h\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h\n@@ -53,6 +53,19 @@ struct mlx5_vdpa_query_mr {\n \tint is_indirect;\n };\n \n+struct mlx5_vdpa_virtq {\n+\tSLIST_ENTRY(mlx5_vdpa_virtq) next;\n+\tuint16_t index;\n+\tuint16_t vq_size;\n+\tstruct mlx5_devx_obj *virtq;\n+\tstruct mlx5_vdpa_event_qp eqp;\n+\tstruct {\n+\t\tstruct mlx5dv_devx_umem *obj;\n+\t\tvoid *buf;\n+\t\tuint32_t size;\n+\t} umems[3];\n+};\n+\n struct mlx5_vdpa_priv {\n \tTAILQ_ENTRY(mlx5_vdpa_priv) next;\n \tint id; /* vDPA device id. */\n@@ -69,6 +82,10 @@ struct mlx5_vdpa_priv {\n \tstruct mlx5dv_devx_event_channel *eventc;\n \tstruct mlx5dv_devx_uar *uar;\n \tstruct rte_intr_handle intr_handle;\n+\tstruct mlx5_devx_obj *td;\n+\tstruct mlx5_devx_obj *tis;\n+\tuint16_t nr_virtqs;\n+\tSLIST_HEAD(virtq_list, mlx5_vdpa_virtq) virtq_list;\n \tSLIST_HEAD(mr_list, mlx5_vdpa_query_mr) mr_list;\n };\n \n@@ -146,4 +163,23 @@ int mlx5_vdpa_event_qp_create(struct mlx5_vdpa_priv *priv, uint16_t desc_n,\n */\n void mlx5_vdpa_cqe_event_unset(struct mlx5_vdpa_priv *priv);\n \n+/**\n+ * Release a virtq and all its related resources.\n+ *\n+ * @param[in] priv\n+ * The vdpa driver private structure.\n+ */\n+void mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv);\n+\n+/**\n+ * Create all the HW virtqs resources and all their related resources.\n+ *\n+ * @param[in] priv\n+ * The vdpa driver private structure.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv);\n+\n #endif /* RTE_PMD_MLX5_VDPA_H_ */\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\nnew file mode 100644\nindex 0000000..781bccf\n--- /dev/null\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\n@@ -0,0 +1,212 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2019 Mellanox Technologies, Ltd\n+ */\n+#include <string.h>\n+\n+#include <rte_malloc.h>\n+#include <rte_errno.h>\n+\n+#include <mlx5_common.h>\n+\n+#include \"mlx5_vdpa_utils.h\"\n+#include \"mlx5_vdpa.h\"\n+\n+\n+static int\n+mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)\n+{\n+\tint i;\n+\n+\tif (virtq->virtq) {\n+\t\tclaim_zero(mlx5_devx_cmd_destroy(virtq->virtq));\n+\t\tvirtq->virtq = NULL;\n+\t}\n+\tfor (i = 0; i < 3; ++i) {\n+\t\tif (virtq->umems[i].obj)\n+\t\t\tclaim_zero(mlx5_glue->devx_umem_dereg\n+\t\t\t\t\t\t\t (virtq->umems[i].obj));\n+\t\tif (virtq->umems[i].buf)\n+\t\t\trte_free(virtq->umems[i].buf);\n+\t}\n+\tmemset(&virtq->umems, 0, sizeof(virtq->umems));\n+\tif (virtq->eqp.fw_qp)\n+\t\tmlx5_vdpa_event_qp_destroy(&virtq->eqp);\n+\treturn 0;\n+}\n+\n+void\n+mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)\n+{\n+\tstruct mlx5_vdpa_virtq *entry;\n+\tstruct mlx5_vdpa_virtq *next;\n+\n+\tentry = SLIST_FIRST(&priv->virtq_list);\n+\twhile (entry) {\n+\t\tnext = SLIST_NEXT(entry, next);\n+\t\tmlx5_vdpa_virtq_unset(entry);\n+\t\tSLIST_REMOVE(&priv->virtq_list, entry, mlx5_vdpa_virtq, next);\n+\t\trte_free(entry);\n+\t\tentry = next;\n+\t}\n+\tSLIST_INIT(&priv->virtq_list);\n+\tif (priv->tis) {\n+\t\tclaim_zero(mlx5_devx_cmd_destroy(priv->tis));\n+\t\tpriv->tis = NULL;\n+\t}\n+\tif (priv->td) {\n+\t\tclaim_zero(mlx5_devx_cmd_destroy(priv->td));\n+\t\tpriv->td = NULL;\n+\t}\n+}\n+\n+static uint64_t\n+mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)\n+{\n+\tstruct rte_vhost_mem_region *reg;\n+\tuint32_t i;\n+\tuint64_t gpa = 0;\n+\n+\tfor (i = 0; i < mem->nregions; i++) {\n+\t\treg = &mem->regions[i];\n+\t\tif (hva >= reg->host_user_addr &&\n+\t\t hva < reg->host_user_addr + reg->size) {\n+\t\t\tgpa = hva - reg->host_user_addr + reg->guest_phys_addr;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\treturn gpa;\n+}\n+\n+static int\n+mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv,\n+\t\t struct mlx5_vdpa_virtq *virtq, int index)\n+{\n+\tstruct rte_vhost_vring vq;\n+\tstruct mlx5_devx_virtq_attr attr = {0};\n+\tuint64_t gpa;\n+\tint ret;\n+\tint i;\n+\tuint16_t last_avail_idx;\n+\tuint16_t last_used_idx;\n+\n+\tret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);\n+\tif (ret)\n+\t\treturn -1;\n+\tvirtq->index = index;\n+\tvirtq->vq_size = vq.size;\n+\t/*\n+\t * No need event QPs creation when the guest in poll mode or when the\n+\t * capability allows it.\n+\t */\n+\tattr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<\n+\t\t\t\t\t MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?\n+\t\t\t\t\t\t MLX5_VIRTQ_EVENT_MODE_QP :\n+\t\t\t\t\t\t MLX5_VIRTQ_EVENT_MODE_NO_MSIX;\n+\tif (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {\n+\t\tret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,\n+\t\t\t\t\t\t&virtq->eqp);\n+\t\tif (ret) {\n+\t\t\tDRV_LOG(ERR, \"Failed to create event QPs for virtq %d.\",\n+\t\t\t\tindex);\n+\t\t\treturn -1;\n+\t\t}\n+\t\tattr.qp_id = virtq->eqp.fw_qp->id;\n+\t} else {\n+\t\tDRV_LOG(INFO, \"Virtq %d is, for sure, working by poll mode, no\"\n+\t\t\t\" need event QPs and event mechanism.\", index);\n+\t}\n+\t/* Setup 3 UMEMs for each virtq. */\n+\tfor (i = 0; i < 3; ++i) {\n+\t\tvirtq->umems[i].size = priv->caps.umems[i].a * vq.size +\n+\t\t\t\t\t\t\t priv->caps.umems[i].b;\n+\t\tvirtq->umems[i].buf = rte_zmalloc(__func__,\n+\t\t\t\t\t\t virtq->umems[i].size, 4096);\n+\t\tif (!virtq->umems[i].buf) {\n+\t\t\tDRV_LOG(ERR, \"Cannot allocate umem %d memory for virtq\"\n+\t\t\t\t\" %u.\", i, index);\n+\t\t\tgoto error;\n+\t\t}\n+\t\tvirtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,\n+\t\t\t\t\t\t\tvirtq->umems[i].buf,\n+\t\t\t\t\t\t\tvirtq->umems[i].size,\n+\t\t\t\t\t\t\tIBV_ACCESS_LOCAL_WRITE);\n+\t\tif (!virtq->umems[i].obj) {\n+\t\t\tDRV_LOG(ERR, \"Failed to register umem %d for virtq %u.\",\n+\t\t\t\ti, index);\n+\t\t\tgoto error;\n+\t\t}\n+\t\tattr.umems[i].id = virtq->umems[i].obj->umem_id;\n+\t\tattr.umems[i].offset = 0;\n+\t\tattr.umems[i].size = virtq->umems[i].size;\n+\t}\n+\tgpa = mlx5_vdpa_hva_to_gpa(priv->vmem, (uint64_t)(uintptr_t)vq.desc);\n+\tif (!gpa) {\n+\t\tDRV_LOG(ERR, \"Fail to get GPA for descriptor ring.\");\n+\t\tgoto error;\n+\t}\n+\tattr.desc_addr = gpa;\n+\tgpa = mlx5_vdpa_hva_to_gpa(priv->vmem, (uint64_t)(uintptr_t)vq.used);\n+\tif (!gpa) {\n+\t\tDRV_LOG(ERR, \"Fail to get GPA for used ring.\");\n+\t\tgoto error;\n+\t}\n+\tattr.used_addr = gpa;\n+\tgpa = mlx5_vdpa_hva_to_gpa(priv->vmem, (uint64_t)(uintptr_t)vq.avail);\n+\tif (!gpa) {\n+\t\tDRV_LOG(ERR, \"Fail to get GPA for available ring.\");\n+\t\tgoto error;\n+\t}\n+\tattr.available_addr = gpa;\n+\trte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,\n+\t\t\t\t &last_used_idx);\n+\tDRV_LOG(INFO, \"vid %d: Init last_avail_idx=%d, last_used_idx=%d for \"\n+\t\t\"virtq %d.\", priv->vid, last_avail_idx, last_used_idx, index);\n+\tattr.hw_available_index = last_avail_idx;\n+\tattr.hw_used_index = last_used_idx;\n+\tattr.q_size = vq.size;\n+\tattr.mkey = priv->gpa_mkey_index;\n+\tattr.tis_id = priv->tis->id;\n+\tattr.queue_index = index;\n+\tvirtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);\n+\tif (!virtq->virtq)\n+\t\tgoto error;\n+\treturn 0;\n+error:\n+\tmlx5_vdpa_virtq_unset(virtq);\n+\treturn -1;\n+}\n+\n+int\n+mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)\n+{\n+\tstruct mlx5_devx_tis_attr tis_attr = {0};\n+\tstruct mlx5_vdpa_virtq *virtq;\n+\tuint32_t i;\n+\tuint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);\n+\n+\tpriv->td = mlx5_devx_cmd_create_td(priv->ctx);\n+\tif (!priv->td) {\n+\t\tDRV_LOG(ERR, \"Failed to create transport domain.\");\n+\t\treturn -rte_errno;\n+\t}\n+\ttis_attr.transport_domain = priv->td->id;\n+\tpriv->tis = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);\n+\tif (!priv->tis) {\n+\t\tDRV_LOG(ERR, \"Failed to create TIS.\");\n+\t\tgoto error;\n+\t}\n+\tfor (i = 0; i < nr_vring; i++) {\n+\t\tvirtq = rte_zmalloc(__func__, sizeof(*virtq), 0);\n+\t\tif (!virtq || mlx5_vdpa_virtq_setup(priv, virtq, i)) {\n+\t\t\tif (virtq)\n+\t\t\t\trte_free(virtq);\n+\t\t\tgoto error;\n+\t\t}\n+\t\tSLIST_INSERT_HEAD(&priv->virtq_list, virtq, next);\n+\t}\n+\tpriv->nr_virtqs = nr_vring;\n+\treturn 0;\n+error:\n+\tmlx5_vdpa_virtqs_release(priv);\n+\treturn -1;\n+}\n", "prefixes": [ "v2", "06/13" ] }