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GET /api/patches/64525/?format=api
{ "id": 64525, "url": "http://patches.dpdk.org/api/patches/64525/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20200113050303.3511-1-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200113050303.3511-1-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200113050303.3511-1-ndabilpuram@marvell.com", "date": "2020-01-13T05:03:02", "name": "common/octeotx2: add support for C0 silicon version", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9c06839bd24889856e37a3a3421cdc6f1e84d463", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20200113050303.3511-1-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 8069, "url": "http://patches.dpdk.org/api/series/8069/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8069", "date": "2020-01-13T05:03:02", "name": "common/octeotx2: add support for C0 silicon version", "version": 1, "mbox": "http://patches.dpdk.org/series/8069/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/64525/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/64525/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 582FAA04F0;\n\tMon, 13 Jan 2020 06:03:15 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E8EB11D535;\n\tMon, 13 Jan 2020 06:03:14 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 1D4361D534\n for <dev@dpdk.org>; Mon, 13 Jan 2020 06:03:14 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 00D50NSH030700 for <dev@dpdk.org>; Sun, 12 Jan 2020 21:03:13 -0800", "from sc-exch04.marvell.com ([199.233.58.184])\n by mx0b-0016f401.pphosted.com with ESMTP id 2xfert48f9-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 12 Jan 2020 21:03:13 -0800", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 12 Jan\n 2020 21:03:11 -0800", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sun, 12 Jan 2020 21:03:11 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id A1D413F703F;\n Sun, 12 Jan 2020 21:03:09 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-type; s=pfpt0818;\n bh=tsdmPGVCosqwdW5s9OVfKfcN1M+FHVnAIKA2aGH25mQ=;\n b=vP9FIHDp5k4jrijeYN8LaGh874gBBZgwUg4eMFCKsctvEwtuJAFsxQv5jEJZWGh4+nlE\n JP3FHGZtDKjauLL+vp8MfPN4RVT5tOKwxfpYOjcLrhjMsXEOVF3EhCi8TK6bo6MQ5Z6p\n MN5ZPXEfc1ljQo61AiAibzigPmaSm0DXAmV1khWZSvKOkFkFa6xdeMCVo2bNPIiHvkOs\n VHp0vCHoK/SjATorIYWzzrCq4i8+Vsn9gcaYKEIZ8ilCcwwt82uyalXDSRfOGmO2resK\n bix9cc/fwEbpDM8eI3Zs/ijLWRrGBpV+6HcyTHd8oX+60Dn/SvlELo3e/0w2hGKsgcwF sw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>, Vamsi Attunuru <vattunuru@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Mon, 13 Jan 2020 10:33:02 +0530", "Message-ID": "<20200113050303.3511-1-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572\n definitions=2020-01-13_01:2020-01-13,\n 2020-01-12 signatures=0", "Subject": "[dpdk-dev] [PATCH] common/octeotx2: add support for C0 silicon\n\tversion", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Avoid using PCI subsystem device id for SoC revision\nidentification and just use PCI revision id to support C0 silicon.\nThis patch also reduces SQB threshold to 70% to have\nsufficient buffer before we overflow SQ.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/octeontx2/otx2_common.h | 3 ---\n drivers/common/octeontx2/otx2_dev.h | 6 +-----\n drivers/net/octeontx2/otx2_ethdev.h | 2 +-\n 3 files changed, 2 insertions(+), 9 deletions(-)", "diff": "diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h\nindex f62c45d..c64d373 100644\n--- a/drivers/common/octeontx2/otx2_common.h\n+++ b/drivers/common/octeontx2/otx2_common.h\n@@ -124,9 +124,6 @@ extern int otx2_logtype_dpi;\n #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF\t\t0xA0f6\n #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF\t\t0xA0f7\n \n-/* Subsystem Device ID */\n-#define PCI_SUBSYS_DEVID_96XX_95XX\t\t0xB200\n-\n /*\n * REVID for RVU PCIe devices.\n * Bits 0..1: minor pass\ndiff --git a/drivers/common/octeontx2/otx2_dev.h b/drivers/common/octeontx2/otx2_dev.h\nindex 7d9839c..0b0a949 100644\n--- a/drivers/common/octeontx2/otx2_dev.h\n+++ b/drivers/common/octeontx2/otx2_dev.h\n@@ -103,11 +103,7 @@ otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)\n \t\treturn rc;\n \t}\n \n-\tif (pci_dev->id.subsystem_device_id == PCI_SUBSYS_DEVID_96XX_95XX)\n-\t\tdev->hwcap = rev_id;\n-\telse\n-\t\tdev->hwcap = 0;\n-\n+\tdev->hwcap = rev_id;\n \treturn otx2_dev_priv_init(pci_dev, otx2_dev);\n }\n \ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 987e760..7f1d0f0 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -79,7 +79,7 @@\n #define NIX_RX_NB_SEG_MAX\t\t6\n #define NIX_CQ_ENTRY_SZ\t\t\t128\n #define NIX_CQ_ALIGN\t\t\t512\n-#define NIX_SQB_LOWER_THRESH\t\t90\n+#define NIX_SQB_LOWER_THRESH\t\t70\n #define LMT_SLOT_MASK\t\t\t0x7f\n #define NIX_RX_DEFAULT_RING_SZ\t\t4096\n \n", "prefixes": [] }