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GET /api/patches/64294/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 64294,
    "url": "http://patches.dpdk.org/api/patches/64294/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1578500161-20156-2-git-send-email-viacheslavo@mellanox.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1578500161-20156-2-git-send-email-viacheslavo@mellanox.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1578500161-20156-2-git-send-email-viacheslavo@mellanox.com",
    "date": "2020-01-08T16:15:58",
    "name": "[1/4] net/mlx5: move Tx complete request routine",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "67ea2fdbfb00e75683d67adeb5743f28d5029a57",
    "submitter": {
        "id": 1102,
        "url": "http://patches.dpdk.org/api/people/1102/?format=api",
        "name": "Slava Ovsiienko",
        "email": "viacheslavo@mellanox.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1578500161-20156-2-git-send-email-viacheslavo@mellanox.com/mbox/",
    "series": [
        {
            "id": 8020,
            "url": "http://patches.dpdk.org/api/series/8020/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8020",
            "date": "2020-01-08T16:15:57",
            "name": "net/mlx5: remove Tx descriptor reserved field usage",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/8020/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/64294/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/64294/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BF90CA04F3;\n\tWed,  8 Jan 2020 17:16:22 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 741801DAB9;\n\tWed,  8 Jan 2020 17:16:20 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id A77AA1DAB8\n for <dev@dpdk.org>; Wed,  8 Jan 2020 17:16:18 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 8 Jan 2020 18:16:16 +0200",
            "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 008GGGdh000686;\n Wed, 8 Jan 2020 18:16:16 +0200",
            "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 008GGFdE020231;\n Wed, 8 Jan 2020 16:16:15 GMT",
            "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 008GGFkI020230;\n Wed, 8 Jan 2020 16:16:15 GMT"
        ],
        "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f",
        "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>",
        "To": "dev@dpdk.org",
        "Cc": "matan@mellanox.com, rasland@mellanox.com, orika@mellanox.com",
        "Date": "Wed,  8 Jan 2020 16:15:58 +0000",
        "Message-Id": "<1578500161-20156-2-git-send-email-viacheslavo@mellanox.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1578500161-20156-1-git-send-email-viacheslavo@mellanox.com>",
        "References": "<1578500161-20156-1-git-send-email-viacheslavo@mellanox.com>",
        "Subject": "[dpdk-dev] [PATCH 1/4] net/mlx5: move Tx complete request routine",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The complete request flag is set once per Tx burst call,\nthe code of appropriate routine moved to the end of sending\nloop. This is preparation step to remove WQE reserved field\nusage to store index of elts to free.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxtx.c | 26 ++++----------------------\n 1 file changed, 4 insertions(+), 22 deletions(-)",
    "diff": "diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex 25a2952..ee6d5fc 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -2145,9 +2145,6 @@ enum mlx5_txcmp_code {\n  *   Pointer to TX queue structure.\n  * @param loc\n  *   Pointer to burst routine local context.\n- * @param multi,\n- *   Routine is called from multi-segment sending loop,\n- *   do not correct the elts_head according to the pkts_copy.\n  * @param olx\n  *   Configured Tx offloads mask. It is fully defined at\n  *   compile time and may be used for optimization.\n@@ -2155,13 +2152,12 @@ enum mlx5_txcmp_code {\n static __rte_always_inline void\n mlx5_tx_request_completion(struct mlx5_txq_data *restrict txq,\n \t\t\t   struct mlx5_txq_local *restrict loc,\n-\t\t\t   bool multi,\n \t\t\t   unsigned int olx)\n {\n \tuint16_t head = txq->elts_head;\n \tunsigned int part;\n \n-\tpart = (MLX5_TXOFF_CONFIG(INLINE) || multi) ?\n+\tpart = MLX5_TXOFF_CONFIG(INLINE) ?\n \t       0 : loc->pkts_sent - loc->pkts_copy;\n \thead += part;\n \tif ((uint16_t)(head - txq->elts_comp) >= MLX5_TX_COMP_THRESH ||\n@@ -3120,8 +3116,6 @@ enum mlx5_txcmp_code {\n \twqe->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | ds);\n \ttxq->wqe_ci += (ds + 3) / 4;\n \tloc->wqe_free -= (ds + 3) / 4;\n-\t/* Request CQE generation if limits are reached. */\n-\tmlx5_tx_request_completion(txq, loc, true, olx);\n \treturn MLX5_TXCMP_CODE_MULTI;\n }\n \n@@ -3230,8 +3224,6 @@ enum mlx5_txcmp_code {\n \t} while (true);\n \ttxq->wqe_ci += (ds + 3) / 4;\n \tloc->wqe_free -= (ds + 3) / 4;\n-\t/* Request CQE generation if limits are reached. */\n-\tmlx5_tx_request_completion(txq, loc, true, olx);\n \treturn MLX5_TXCMP_CODE_MULTI;\n }\n \n@@ -3388,8 +3380,6 @@ enum mlx5_txcmp_code {\n \twqe->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | ds);\n \ttxq->wqe_ci += (ds + 3) / 4;\n \tloc->wqe_free -= (ds + 3) / 4;\n-\t/* Request CQE generation if limits are reached. */\n-\tmlx5_tx_request_completion(txq, loc, true, olx);\n \treturn MLX5_TXCMP_CODE_MULTI;\n }\n \n@@ -3599,8 +3589,6 @@ enum mlx5_txcmp_code {\n \t\t--loc->elts_free;\n \t\t++loc->pkts_sent;\n \t\t--pkts_n;\n-\t\t/* Request CQE generation if limits are reached. */\n-\t\tmlx5_tx_request_completion(txq, loc, false, olx);\n \t\tif (unlikely(!pkts_n || !loc->elts_free || !loc->wqe_free))\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n \t\tloc->mbuf = *pkts++;\n@@ -3750,7 +3738,7 @@ enum mlx5_txcmp_code {\n \t\t   struct mlx5_txq_local *restrict loc,\n \t\t   unsigned int ds,\n \t\t   unsigned int slen,\n-\t\t   unsigned int olx)\n+\t\t   unsigned int olx __rte_unused)\n {\n \tassert(!MLX5_TXOFF_CONFIG(INLINE));\n #ifdef MLX5_PMD_SOFT_COUNTERS\n@@ -3765,8 +3753,6 @@ enum mlx5_txcmp_code {\n \tloc->wqe_last->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | ds);\n \ttxq->wqe_ci += (ds + 3) / 4;\n \tloc->wqe_free -= (ds + 3) / 4;\n-\t/* Request CQE generation if limits are reached. */\n-\tmlx5_tx_request_completion(txq, loc, false, olx);\n }\n \n /*\n@@ -3809,8 +3795,6 @@ enum mlx5_txcmp_code {\n \tloc->wqe_last->cseg.sq_ds = rte_cpu_to_be_32(txq->qp_num_8s | len);\n \ttxq->wqe_ci += (len + 3) / 4;\n \tloc->wqe_free -= (len + 3) / 4;\n-\t/* Request CQE generation if limits are reached. */\n-\tmlx5_tx_request_completion(txq, loc, false, olx);\n }\n \n /**\n@@ -4011,8 +3995,6 @@ enum mlx5_txcmp_code {\n \t\ttxq->wqe_ci += (2 + part + 3) / 4;\n \t\tloc->wqe_free -= (2 + part + 3) / 4;\n \t\tpkts_n -= part;\n-\t\t/* Request CQE generation if limits are reached. */\n-\t\tmlx5_tx_request_completion(txq, loc, false, olx);\n \t\tif (unlikely(!pkts_n || !loc->elts_free || !loc->wqe_free))\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n \t\tloc->mbuf = *pkts++;\n@@ -4496,8 +4478,6 @@ enum mlx5_txcmp_code {\n \t\t}\n \t\t++loc->pkts_sent;\n \t\t--pkts_n;\n-\t\t/* Request CQE generation if limits are reached. */\n-\t\tmlx5_tx_request_completion(txq, loc, false, olx);\n \t\tif (unlikely(!pkts_n || !loc->elts_free || !loc->wqe_free))\n \t\t\treturn MLX5_TXCMP_CODE_EXIT;\n \t\tloc->mbuf = *pkts++;\n@@ -4776,6 +4756,8 @@ enum mlx5_txcmp_code {\n \t/* Take a shortcut if nothing is sent. */\n \tif (unlikely(loc.pkts_sent == loc.pkts_loop))\n \t\tgoto burst_exit;\n+\t/* Request CQE generation if limits are reached. */\n+\tmlx5_tx_request_completion(txq, &loc, olx);\n \t/*\n \t * Ring QP doorbell immediately after WQE building completion\n \t * to improve latencies. The pure software related data treatment\n",
    "prefixes": [
        "1/4"
    ]
}