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GET /api/patches/63682/?format=api
{ "id": 63682, "url": "http://patches.dpdk.org/api/patches/63682/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191209214656.27347-6-cardigliano@ntop.org/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191209214656.27347-6-cardigliano@ntop.org>", "list_archive_url": "https://inbox.dpdk.org/dev/20191209214656.27347-6-cardigliano@ntop.org", "date": "2019-12-09T21:46:44", "name": "[v3,05/17] net/ionic: add port management commands", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0950111a602cfe25ef0f2b5485665346a1ea226d", "submitter": { "id": 1465, "url": "http://patches.dpdk.org/api/people/1465/?format=api", "name": "Alfredo Cardigliano", "email": "cardigliano@ntop.org" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191209214656.27347-6-cardigliano@ntop.org/mbox/", "series": [ { "id": 7760, "url": "http://patches.dpdk.org/api/series/7760/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7760", "date": "2019-12-09T21:46:39", "name": "Introduces net/ionic PMD", "version": 3, "mbox": "http://patches.dpdk.org/series/7760/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/63682/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/63682/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 28503A04B3;\n\tMon, 9 Dec 2019 22:49:31 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 542191BF84;\n\tMon, 9 Dec 2019 22:48:45 +0100 (CET)", "from mail.ntop.org (mail-digitalocean.ntop.org [167.99.215.164])\n by dpdk.org (Postfix) with ESMTP id 357FD2BAB\n for <dev@dpdk.org>; Mon, 9 Dec 2019 22:48:31 +0100 (CET)", "from devele.ntop.org (net-93-145-196-230.cust.vodafonedsl.it\n [93.145.196.230])\n by mail.ntop.org (Postfix) with ESMTPSA id E776441B68;\n Mon, 9 Dec 2019 22:48:30 +0100 (CET)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ntop.org; s=mail;\n t=1575928111; bh=JHoOqQpnMq478u1XhzaAW2+RSPZ8c8yuWg+UmC5VxjU=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=HIEICuZaFrAollAdYYRV+8r9vsB2LQJ3QAZ14f5A2djBYeZ6r4crYpE6i47mxDGmr\n /ETFlT16Cy5msdlO/94oOhsVoSohCqcVgcI7zfWE/Em3hFAeWsWk56eAy1v20z7uqN\n +vXYMfZJT/fSgOD7BNzJ8anL3qgrI3palL8G6AAk=", "From": "Alfredo Cardigliano <cardigliano@ntop.org>", "To": "Alfredo Cardigliano <cardigliano@ntop.org>", "Cc": "dev@dpdk.org", "Date": "Mon, 9 Dec 2019 22:46:44 +0100", "Message-Id": "<20191209214656.27347-6-cardigliano@ntop.org>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20191209214656.27347-1-cardigliano@ntop.org>", "References": "<20191209214656.27347-1-cardigliano@ntop.org>", "Subject": "[dpdk-dev] [PATCH v3 05/17] net/ionic: add port management commands", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add port management commands that apply to the physical\nports associated with the PCI device, which might be\nshared among several logical interfaces.\n\nSigned-off-by: Alfredo Cardigliano <cardigliano@ntop.org>\nReviewed-by: Shannon Nelson <snelson@pensando.io>\n---\n drivers/net/ionic/ionic.h | 6 ++\n drivers/net/ionic/ionic_dev.c | 127 ++++++++++++++++++++++++++++++\n drivers/net/ionic/ionic_dev.h | 18 +++++\n drivers/net/ionic/ionic_ethdev.c | 16 ++++\n drivers/net/ionic/ionic_main.c | 131 +++++++++++++++++++++++++++++++\n 5 files changed, 298 insertions(+)", "diff": "diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h\nindex 5c869e698..a29f0bb89 100644\n--- a/drivers/net/ionic/ionic.h\n+++ b/drivers/net/ionic/ionic.h\n@@ -7,6 +7,8 @@\n \n #include <stdint.h>\n \n+#include <rte_bus_pci.h>\n+\n #include \"ionic_dev.h\"\n #include \"ionic_if.h\"\n #include \"ionic_osdep.h\"\n@@ -60,4 +62,8 @@ int ionic_identify(struct ionic_adapter *adapter);\n int ionic_init(struct ionic_adapter *adapter);\n int ionic_reset(struct ionic_adapter *adapter);\n \n+int ionic_port_identify(struct ionic_adapter *adapter);\n+int ionic_port_init(struct ionic_adapter *adapter);\n+int ionic_port_reset(struct ionic_adapter *adapter);\n+\n #endif /* _IONIC_H_ */\ndiff --git a/drivers/net/ionic/ionic_dev.c b/drivers/net/ionic/ionic_dev.c\nindex 406236da9..0da5a43a3 100644\n--- a/drivers/net/ionic/ionic_dev.c\n+++ b/drivers/net/ionic/ionic_dev.c\n@@ -132,3 +132,130 @@ ionic_dev_cmd_reset(struct ionic_dev *idev)\n \n \tionic_dev_cmd_go(idev, &cmd);\n }\n+\n+/* Port commands */\n+\n+void\n+ionic_dev_cmd_port_identify(struct ionic_dev *idev)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_init.opcode = IONIC_CMD_PORT_IDENTIFY,\n+\t\t.port_init.index = 0,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_init(struct ionic_dev *idev)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_init.opcode = IONIC_CMD_PORT_INIT,\n+\t\t.port_init.index = 0,\n+\t\t.port_init.info_pa = idev->port_info_pa,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_reset(struct ionic_dev *idev)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_reset.opcode = IONIC_CMD_PORT_RESET,\n+\t\t.port_reset.index = 0,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_STATE,\n+\t\t.port_setattr.state = state,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_SPEED,\n+\t\t.port_setattr.speed = speed,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_MTU,\n+\t\t.port_setattr.mtu = mtu,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_AUTONEG,\n+\t\t.port_setattr.an_enable = an_enable,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_FEC,\n+\t\t.port_setattr.fec_type = fec_type,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_PAUSE,\n+\t\t.port_setattr.pause_type = pause_type,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\n+\n+void\n+ionic_dev_cmd_port_loopback(struct ionic_dev *idev, uint8_t loopback_mode)\n+{\n+\tunion ionic_dev_cmd cmd = {\n+\t\t.port_setattr.opcode = IONIC_CMD_PORT_SETATTR,\n+\t\t.port_setattr.index = 0,\n+\t\t.port_setattr.attr = IONIC_PORT_ATTR_LOOPBACK,\n+\t\t.port_setattr.loopback_mode = loopback_mode,\n+\t};\n+\n+\tionic_dev_cmd_go(idev, &cmd);\n+}\ndiff --git a/drivers/net/ionic/ionic_dev.h b/drivers/net/ionic/ionic_dev.h\nindex 82a3cdb70..75c50d4cb 100644\n--- a/drivers/net/ionic/ionic_dev.h\n+++ b/drivers/net/ionic/ionic_dev.h\n@@ -10,6 +10,7 @@\n #include \"ionic_regs.h\"\n \n #define IONIC_DEVCMD_TIMEOUT\t30 /* devcmd_timeout */\n+#define\tIONIC_ALIGN 4096\n \n struct ionic_adapter;\n \n@@ -111,6 +112,11 @@ struct ionic_dev {\n \tstruct ionic_intr __iomem *intr_ctrl;\n \n \tstruct ionic_intr_status __iomem *intr_status;\n+\n+\tstruct ionic_port_info *port_info;\n+\tconst struct rte_memzone *port_info_z;\n+\trte_iova_t port_info_pa;\n+\tuint32_t port_info_sz;\n };\n \n int ionic_dev_setup(struct ionic_adapter *adapter);\n@@ -124,4 +130,16 @@ void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver);\n void ionic_dev_cmd_init(struct ionic_dev *idev);\n void ionic_dev_cmd_reset(struct ionic_dev *idev);\n \n+void ionic_dev_cmd_port_identify(struct ionic_dev *idev);\n+void ionic_dev_cmd_port_init(struct ionic_dev *idev);\n+void ionic_dev_cmd_port_reset(struct ionic_dev *idev);\n+void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state);\n+void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed);\n+void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu);\n+void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable);\n+void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type);\n+void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type);\n+void ionic_dev_cmd_port_loopback(struct ionic_dev *idev,\n+\tuint8_t loopback_mode);\n+\n #endif /* _IONIC_DEV_H_ */\ndiff --git a/drivers/net/ionic/ionic_ethdev.c b/drivers/net/ionic/ionic_ethdev.c\nindex 23c6ef17c..a182beef8 100644\n--- a/drivers/net/ionic/ionic_ethdev.c\n+++ b/drivers/net/ionic/ionic_ethdev.c\n@@ -107,6 +107,22 @@ eth_ionic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \t\tgoto err_free_adapter;\n \t}\n \n+\t/* Configure the ports */\n+\terr = ionic_port_identify(adapter);\n+\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Cannot identify port: %d, aborting\",\n+\t\t\terr);\n+\t\tgoto err_free_adapter;\n+\t}\n+\n+\terr = ionic_port_init(adapter);\n+\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Cannot init port: %d, aborting\", err);\n+\t\tgoto err_free_adapter;\n+\t}\n+\n \trte_spinlock_lock(&ionic_pci_adapters_lock);\n \tLIST_INSERT_HEAD(&ionic_pci_adapters, adapter, pci_adapters);\n \trte_spinlock_unlock(&ionic_pci_adapters_lock);\ndiff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c\nindex 572316c84..da558cdce 100644\n--- a/drivers/net/ionic/ionic_main.c\n+++ b/drivers/net/ionic/ionic_main.c\n@@ -2,6 +2,8 @@\n * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.\n */\n \n+#include <rte_memzone.h>\n+\n #include \"ionic.h\"\n \n static int\n@@ -131,3 +133,132 @@ ionic_reset(struct ionic_adapter *adapter)\n \terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n \treturn err;\n }\n+\n+int\n+ionic_port_identify(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tstruct ionic_identity *ident = &adapter->ident;\n+\tunsigned int port_words = sizeof(ident->port.words) /\n+\t\tsizeof(ident->port.words[0]);\n+\tunsigned int cmd_words = sizeof(idev->dev_cmd->data) /\n+\t\tsizeof(idev->dev_cmd->data[0]);\n+\tunsigned int i;\n+\tunsigned int nwords;\n+\tint err;\n+\n+\tionic_dev_cmd_port_identify(idev);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\tif (!err) {\n+\t\tnwords = RTE_MIN(port_words, cmd_words);\n+\t\tfor (i = 0; i < nwords; i++)\n+\t\t\tident->port.words[i] =\n+\t\t\t\tioread32(&idev->dev_cmd->data[i]);\n+\t}\n+\n+\tIONIC_PRINT(INFO, \"speed %d \", ident->port.config.speed);\n+\tIONIC_PRINT(INFO, \"mtu %d \", ident->port.config.mtu);\n+\tIONIC_PRINT(INFO, \"state %d \", ident->port.config.state);\n+\tIONIC_PRINT(INFO, \"an_enable %d \", ident->port.config.an_enable);\n+\tIONIC_PRINT(INFO, \"fec_type %d \", ident->port.config.fec_type);\n+\tIONIC_PRINT(INFO, \"pause_type %d \", ident->port.config.pause_type);\n+\tIONIC_PRINT(INFO, \"loopback_mode %d\",\n+\t\tident->port.config.loopback_mode);\n+\n+\treturn err;\n+}\n+\n+static const struct rte_memzone *\n+ionic_memzone_reserve(const char *name, uint32_t len, int socket_id)\n+{\n+\tconst struct rte_memzone *mz;\n+\n+\tmz = rte_memzone_lookup(name);\n+\tif (mz)\n+\t\treturn mz;\n+\n+\tmz = rte_memzone_reserve_aligned(name, len, socket_id,\n+\t\tRTE_MEMZONE_IOVA_CONTIG, IONIC_ALIGN);\n+\treturn mz;\n+}\n+\n+int\n+ionic_port_init(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tstruct ionic_identity *ident = &adapter->ident;\n+\tchar z_name[RTE_MEMZONE_NAMESIZE];\n+\tunsigned int config_words = sizeof(ident->port.config.words) /\n+\t\tsizeof(ident->port.config.words[0]);\n+\tunsigned int cmd_words = sizeof(idev->dev_cmd->data) /\n+\t\tsizeof(idev->dev_cmd->data[0]);\n+\tunsigned int nwords;\n+\tunsigned int i;\n+\tint err;\n+\n+\tif (idev->port_info)\n+\t\treturn 0;\n+\n+\tidev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE);\n+\n+\tsnprintf(z_name, sizeof(z_name), \"%s_port_%s_info\",\n+\t\tIONIC_DRV_NAME,\n+\t\tadapter->pci_dev->device.name);\n+\n+\tidev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz,\n+\t\tSOCKET_ID_ANY);\n+\n+\tif (!idev->port_info_z) {\n+\t\tIONIC_PRINT(ERR, \"Cannot reserve port info DMA memory\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tidev->port_info = idev->port_info_z->addr;\n+\tidev->port_info_pa = idev->port_info_z->iova;\n+\n+\tnwords = RTE_MIN(config_words, cmd_words);\n+\n+\tfor (i = 0; i < nwords; i++)\n+\t\tiowrite32(ident->port.config.words[i], &idev->dev_cmd->data[i]);\n+\n+\tionic_dev_cmd_port_init(idev);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Failed to init port\");\n+\t\treturn err;\n+\t}\n+\n+\tionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_UP);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\n+\tif (err) {\n+\t\tIONIC_PRINT(WARNING, \"Failed to bring port UP\");\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+ionic_port_reset(struct ionic_adapter *adapter)\n+{\n+\tstruct ionic_dev *idev = &adapter->idev;\n+\tint err;\n+\n+\tif (!idev->port_info)\n+\t\treturn 0;\n+\n+\tionic_dev_cmd_port_reset(idev);\n+\terr = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);\n+\n+\tif (err) {\n+\t\tIONIC_PRINT(ERR, \"Failed to reset port\");\n+\t\treturn err;\n+\t}\n+\n+\tidev->port_info = NULL;\n+\tidev->port_info_pa = 0;\n+\n+\treturn 0;\n+}\n", "prefixes": [ "v3", "05/17" ] }