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GET /api/patches/634/?format=api
{ "id": 634, "url": "http://patches.dpdk.org/api/patches/634/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1411974986-28137-16-git-send-email-changchun.ouyang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1411974986-28137-16-git-send-email-changchun.ouyang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1411974986-28137-16-git-send-email-changchun.ouyang@intel.com", "date": "2014-09-29T07:16:23", "name": "[dpdk-dev,v2,15/18] ixgbe: New function for resetting VF register", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5d152a479e5ab87424a4408f1c2d01dd7f63fa97", "submitter": { "id": 31, "url": "http://patches.dpdk.org/api/people/31/?format=api", "name": "Ouyang Changchun", "email": "changchun.ouyang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1411974986-28137-16-git-send-email-changchun.ouyang@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/634/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/634/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 77FA37E6E;\n\tMon, 29 Sep 2014 09:10:52 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 8543D7E20\n\tfor <dev@dpdk.org>; Mon, 29 Sep 2014 09:10:48 +0200 (CEST)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP; 29 Sep 2014 00:11:05 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 29 Sep 2014 00:17:21 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s8T7HJX9014356;\n\tMon, 29 Sep 2014 15:17:19 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s8T7HHEb028440; Mon, 29 Sep 2014 15:17:19 +0800", "(from couyang@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s8T7HHaB028436; \n\tMon, 29 Sep 2014 15:17:17 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.04,618,1406617200\"; d=\"scan'208\";a=\"610111981\"", "From": "Ouyang Changchun <changchun.ouyang@intel.com>", "To": "dev@dpdk.org", "Date": "Mon, 29 Sep 2014 15:16:23 +0800", "Message-Id": "<1411974986-28137-16-git-send-email-changchun.ouyang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1411974986-28137-1-git-send-email-changchun.ouyang@intel.com>", "References": "<1411974986-28137-1-git-send-email-changchun.ouyang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 15/18] ixgbe: New function for resetting VF\n\tregister", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch implements a function to reset VF register to initial\nvalues in IXGBE base code.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\n---\n lib/librte_pmd_ixgbe/ixgbe/ixgbe_vf.c | 46 +++++++++++++++++++++++++++++++++++\n 1 file changed, 46 insertions(+)", "diff": "diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_vf.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_vf.c\nindex a2d6e61..e6b6c51 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_vf.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_vf.c\n@@ -89,6 +89,49 @@ s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)\n \treturn IXGBE_SUCCESS;\n }\n \n+/* ixgbe_virt_clr_reg - Set register to default (power on) state.\n+ * @hw: pointer to hardware structure\n+ */\n+static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)\n+{\n+\tint i;\n+\tu32 vfsrrctl;\n+\tu32 vfdca_rxctrl;\n+\tu32 vfdca_txctrl;\n+\n+\t/* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */\n+\tvfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;\n+\tvfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;\n+\n+\t/* DCA_RXCTRL default value */\n+\tvfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |\n+\t\t IXGBE_DCA_RXCTRL_DATA_WRO_EN |\n+\t\t IXGBE_DCA_RXCTRL_HEAD_WRO_EN;\n+\n+\t/* DCA_TXCTRL default value */\n+\tvfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |\n+\t\t IXGBE_DCA_TXCTRL_DESC_WRO_EN |\n+\t\t IXGBE_DCA_TXCTRL_DATA_RRO_EN;\n+\n+\tIXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);\n+\n+\tfor (i = 0; i < 7; i++) {\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);\n+\t}\n+\n+\tIXGBE_WRITE_FLUSH(hw);\n+}\n+\n /**\n * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx\n * @hw: pointer to hardware structure\n@@ -161,6 +204,9 @@ s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)\n \tif (!timeout)\n \t\treturn IXGBE_ERR_RESET_FAILED;\n \n+\t/* Reset VF registers to initial values */\n+\tixgbe_virt_clr_reg(hw);\n+\n \t/* mailbox timeout can now become active */\n \tmbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;\n \n", "prefixes": [ "dpdk-dev", "v2", "15/18" ] }