get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/63003/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 63003,
    "url": "http://patches.dpdk.org/api/patches/63003/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-7-git-send-email-rosen.xu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1573722187-148846-7-git-send-email-rosen.xu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1573722187-148846-7-git-send-email-rosen.xu@intel.com",
    "date": "2019-11-14T09:02:54",
    "name": "[v18,06/19] raw/ifpga/base: align the send buffer for SPI",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "4462f7e11a6aad9e2ada67795082cb3d3bf25cd6",
    "submitter": {
        "id": 946,
        "url": "http://patches.dpdk.org/api/people/946/?format=api",
        "name": "Xu, Rosen",
        "email": "rosen.xu@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1573722187-148846-7-git-send-email-rosen.xu@intel.com/mbox/",
    "series": [
        {
            "id": 7455,
            "url": "http://patches.dpdk.org/api/series/7455/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7455",
            "date": "2019-11-14T09:02:48",
            "name": "add PCIe AER disable and IRQ support for ipn3ke",
            "version": 18,
            "mbox": "http://patches.dpdk.org/series/7455/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/63003/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/63003/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 84870A04C2;\n\tThu, 14 Nov 2019 10:05:27 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 21CFE1BE9B;\n\tThu, 14 Nov 2019 10:04:40 +0100 (CET)",
            "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by dpdk.org (Postfix) with ESMTP id 0B6D51BE8B\n for <dev@dpdk.org>; Thu, 14 Nov 2019 10:04:36 +0100 (CET)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 14 Nov 2019 01:04:36 -0800",
            "from dpdk-rosen-02.sh.intel.com ([10.67.110.156])\n by fmsmga006.fm.intel.com with ESMTP; 14 Nov 2019 01:04:35 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.68,302,1569308400\"; d=\"scan'208\";a=\"406259516\"",
        "From": "Rosen Xu <rosen.xu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com,\n xiaolong.ye@intel.com, ferruh.yigit@intel.com",
        "Date": "Thu, 14 Nov 2019 17:02:54 +0800",
        "Message-Id": "<1573722187-148846-7-git-send-email-rosen.xu@intel.com>",
        "X-Mailer": "git-send-email 1.8.3.1",
        "In-Reply-To": "<1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "References": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>\n <1573722187-148846-1-git-send-email-rosen.xu@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v18 06/19] raw/ifpga/base: align the send buffer\n\tfor SPI",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Tianfei zhang <tianfei.zhang@intel.com>\n\nThe length of send buffer of SPI bus should be 4bytes align.\n\nSigned-off-by: Tianfei Zhang <tianfei.zhang@intel.com>\nSigned-off-by: Andy Pei <andy.pei@intel.com>\n---\n drivers/raw/ifpga/base/opae_spi_transaction.c | 40 ++++++++++++++++++++++++---\n 1 file changed, 36 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/raw/ifpga/base/opae_spi_transaction.c b/drivers/raw/ifpga/base/opae_spi_transaction.c\nindex 17ec3c1..06ca625 100644\n--- a/drivers/raw/ifpga/base/opae_spi_transaction.c\n+++ b/drivers/raw/ifpga/base/opae_spi_transaction.c\n@@ -109,6 +109,34 @@ static int resp_find_sop_eop(unsigned char *resp, unsigned int len,\n \treturn ret;\n }\n \n+static void phy_tx_pad(unsigned char *phy_buf, unsigned int phy_buf_len,\n+\t\tunsigned int *aligned_len)\n+{\n+\tunsigned char *p = &phy_buf[phy_buf_len - 1], *dst_p;\n+\n+\t*aligned_len = IFPGA_ALIGN(phy_buf_len, 4);\n+\n+\tif (*aligned_len == phy_buf_len)\n+\t\treturn;\n+\n+\tdst_p = &phy_buf[*aligned_len - 1];\n+\n+\t/* move EOP and bytes after EOP to the end of aligned size */\n+\twhile (p > phy_buf) {\n+\t\t*dst_p = *p;\n+\n+\t\tif (*p == SPI_PACKET_EOP)\n+\t\t\tbreak;\n+\n+\t\tp--;\n+\t\tdst_p--;\n+\t}\n+\n+\t/* fill the hole with PHY_IDLE */\n+\twhile (p < dst_p)\n+\t\t*p++ = SPI_BYTE_IDLE;\n+}\n+\n static int byte_to_core_convert(struct spi_transaction_dev *dev,\n \t\tunsigned int send_len, unsigned char *send_data,\n \t\tunsigned int resp_len, unsigned char *resp_data,\n@@ -149,15 +177,19 @@ static int byte_to_core_convert(struct spi_transaction_dev *dev,\n \t\t}\n \t}\n \n-\tprint_buffer(\"before spi:\", send_packet, p-send_packet);\n+\ttx_len = p - send_packet;\n+\n+\tprint_buffer(\"before spi:\", send_packet, tx_len);\n \n-\treorder_phy_data(32, send_packet, p - send_packet);\n+\tphy_tx_pad(send_packet, tx_len, &tx_len);\n+\tprint_buffer(\"after pad:\", send_packet, tx_len);\n \n-\tprint_buffer(\"after order to spi:\", send_packet, p-send_packet);\n+\treorder_phy_data(32, send_packet, tx_len);\n+\n+\tprint_buffer(\"after order to spi:\", send_packet, tx_len);\n \n \t/* call spi */\n \ttx_buffer = send_packet;\n-\ttx_len = p - send_packet;\n \trx_buffer = resp_packet;\n \trx_len = resp_max_len;\n \tspi_flags = SPI_NOT_FOUND;\n",
    "prefixes": [
        "v18",
        "06/19"
    ]
}