Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/61450/?format=api
{ "id": 61450, "url": "http://patches.dpdk.org/api/patches/61450/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191018111602.26742-4-yahui.cao@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191018111602.26742-4-yahui.cao@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191018111602.26742-4-yahui.cao@intel.com", "date": "2019-10-18T11:15:56", "name": "[v7,3/9] net/ice: add FDIR create and destroy", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8cb1c2382df8cbb07030101481b7ca8553cff32b", "submitter": { "id": 1176, "url": "http://patches.dpdk.org/api/people/1176/?format=api", "name": "Cao, Yahui", "email": "yahui.cao@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191018111602.26742-4-yahui.cao@intel.com/mbox/", "series": [ { "id": 6926, "url": "http://patches.dpdk.org/api/series/6926/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6926", "date": "2019-10-18T11:15:53", "name": "net/ice: add ice Flow Director driver", "version": 7, "mbox": "http://patches.dpdk.org/series/6926/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/61450/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/61450/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id BA1271E87A;\n\tFri, 18 Oct 2019 05:33:52 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby dpdk.org (Postfix) with ESMTP id 4C87C1E537\n\tfor <dev@dpdk.org>; Fri, 18 Oct 2019 05:33:46 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t17 Oct 2019 20:33:45 -0700", "from dpdk-yahui-skylake.sh.intel.com ([10.67.119.16])\n\tby FMSMGA003.fm.intel.com with ESMTP; 17 Oct 2019 20:33:44 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.67,310,1566889200\"; d=\"scan'208\";a=\"202577925\"", "From": "Yahui Cao <yahui.cao@intel.com>", "To": "Qiming Yang <qiming.yang@intel.com>,\n\tWenzhuo Lu <wenzhuo.lu@intel.com>", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n\tXiaolong Ye <xiaolong.ye@intel.com>,\n\tBeilei Xing <beilei.xing@intel.com>, Yahui Cao <yahui.cao@intel.com>", "Date": "Fri, 18 Oct 2019 19:15:56 +0800", "Message-Id": "<20191018111602.26742-4-yahui.cao@intel.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20191018111602.26742-1-yahui.cao@intel.com>", "References": "<20191017160454.14518-1-yahui.cao@intel.com>\n\t<20191018111602.26742-1-yahui.cao@intel.com>", "Subject": "[dpdk-dev] [PATCH v7 3/9] net/ice: add FDIR create and destroy", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add ice_create_fdir_filter to create a rule. If a flow is matched by\nflow director filter, filter rule will be set to HW. For now common\npattern and queue/passthru/drop/mark actions are supported.\n\nSigned-off-by: Yahui Cao <yahui.cao@intel.com>\nAcked-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n doc/guides/rel_notes/release_19_11.rst | 1 +\n drivers/net/ice/ice_ethdev.h | 6 +\n drivers/net/ice/ice_fdir_filter.c | 579 ++++++++++++++++++++++++-\n 3 files changed, 583 insertions(+), 3 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst\nindex 9c3de8374..f2fcb0985 100644\n--- a/doc/guides/rel_notes/release_19_11.rst\n+++ b/doc/guides/rel_notes/release_19_11.rst\n@@ -99,6 +99,7 @@ New Features\n * Added support for device-specific DDP package loading.\n * Added support for handling Receive Flex Descriptor.\n * Added support for protocol extraction on per Rx queue.\n+ * Added support for Flow Director filter based on generic filter framework.\n * Added support for the ``RTE_ETH_DEV_CLOSE_REMOVE`` flag.\n * Generic filter enhancement\n - Supported pipeline mode.\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 2060ad5cf..914e065ba 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -247,6 +247,11 @@ TAILQ_HEAD(ice_flow_list, rte_flow);\n struct ice_flow_parser_node;\n TAILQ_HEAD(ice_parser_list, ice_flow_parser_node);\n \n+struct ice_fdir_filter_conf {\n+\tstruct ice_fdir_fltr input;\n+\tuint64_t input_set;\n+};\n+\n /**\n * A structure used to define fields of a FDIR related info.\n */\n@@ -256,6 +261,7 @@ struct ice_fdir_info {\n \tstruct ice_rx_queue *rxq;\n \tvoid *prg_pkt; /* memory for fdir program packet */\n \tuint64_t dma_addr; /* physic address of packet memory*/\n+\tstruct ice_fdir_filter_conf conf;\n };\n \n struct ice_pf {\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex 60eb27eac..9d4875cf3 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -7,6 +7,55 @@\n #include \"ice_rxtx.h\"\n #include \"ice_generic_flow.h\"\n \n+#define ICE_FDIR_IPV6_TC_OFFSET\t\t20\n+#define ICE_IPV6_TC_MASK\t\t(0xFF << ICE_FDIR_IPV6_TC_OFFSET)\n+\n+#define ICE_FDIR_INSET_ETH_IPV4 (\\\n+\tICE_INSET_DMAC | \\\n+\tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_TOS | \\\n+\tICE_INSET_IPV4_TTL | ICE_INSET_IPV4_PROTO)\n+\n+#define ICE_FDIR_INSET_ETH_IPV4_UDP (\\\n+\tICE_FDIR_INSET_ETH_IPV4 | \\\n+\tICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)\n+\n+#define ICE_FDIR_INSET_ETH_IPV4_TCP (\\\n+\tICE_FDIR_INSET_ETH_IPV4 | \\\n+\tICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)\n+\n+#define ICE_FDIR_INSET_ETH_IPV4_SCTP (\\\n+\tICE_FDIR_INSET_ETH_IPV4 | \\\n+\tICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)\n+\n+#define ICE_FDIR_INSET_ETH_IPV6 (\\\n+\tICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_TC | \\\n+\tICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_NEXT_HDR)\n+\n+#define ICE_FDIR_INSET_ETH_IPV6_UDP (\\\n+\tICE_FDIR_INSET_ETH_IPV6 | \\\n+\tICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)\n+\n+#define ICE_FDIR_INSET_ETH_IPV6_TCP (\\\n+\tICE_FDIR_INSET_ETH_IPV6 | \\\n+\tICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)\n+\n+#define ICE_FDIR_INSET_ETH_IPV6_SCTP (\\\n+\tICE_FDIR_INSET_ETH_IPV6 | \\\n+\tICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)\n+\n+static struct ice_pattern_match_item ice_fdir_pattern[] = {\n+\t{pattern_eth_ipv4, ICE_FDIR_INSET_ETH_IPV4, ICE_INSET_NONE},\n+\t{pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE},\n+\t{pattern_eth_ipv4_tcp, ICE_FDIR_INSET_ETH_IPV4_TCP, ICE_INSET_NONE},\n+\t{pattern_eth_ipv4_sctp, ICE_FDIR_INSET_ETH_IPV4_SCTP, ICE_INSET_NONE},\n+\t{pattern_eth_ipv6, ICE_FDIR_INSET_ETH_IPV6, ICE_INSET_NONE},\n+\t{pattern_eth_ipv6_udp, ICE_FDIR_INSET_ETH_IPV6_UDP, ICE_INSET_NONE},\n+\t{pattern_eth_ipv6_tcp, ICE_FDIR_INSET_ETH_IPV6_TCP, ICE_INSET_NONE},\n+\t{pattern_eth_ipv6_sctp, ICE_FDIR_INSET_ETH_IPV6_SCTP, ICE_INSET_NONE},\n+};\n+\n+static struct ice_flow_parser ice_fdir_parser;\n+\n static const struct rte_memzone *\n ice_memzone_reserve(const char *name, uint32_t len, int socket_id)\n {\n@@ -363,7 +412,7 @@ ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)\n \t}\n }\n \n-static int __rte_unused\n+static int\n ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,\n \t\t\tuint64_t input_set, bool is_tunnel)\n {\n@@ -457,7 +506,7 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,\n \t}\n }\n \n-static void __rte_unused\n+static void\n ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,\n \t\t bool is_tunnel, bool add)\n {\n@@ -476,8 +525,13 @@ static int\n ice_fdir_init(struct ice_adapter *ad)\n {\n \tstruct ice_pf *pf = &ad->pf;\n+\tint ret;\n+\n+\tret = ice_fdir_setup(pf);\n+\tif (ret)\n+\t\treturn ret;\n \n-\treturn ice_fdir_setup(pf);\n+\treturn ice_register_parser(&ice_fdir_parser, ad);\n }\n \n static void\n@@ -485,15 +539,534 @@ ice_fdir_uninit(struct ice_adapter *ad)\n {\n \tstruct ice_pf *pf = &ad->pf;\n \n+\tice_unregister_parser(&ice_fdir_parser, ad);\n+\n \tice_fdir_teardown(pf);\n }\n \n+static int\n+ice_fdir_add_del_filter(struct ice_pf *pf,\n+\t\t\tstruct ice_fdir_filter_conf *filter,\n+\t\t\tbool add)\n+{\n+\tstruct ice_fltr_desc desc;\n+\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\tunsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;\n+\tint ret;\n+\n+\tfilter->input.dest_vsi = pf->main_vsi->idx;\n+\n+\tmemset(&desc, 0, sizeof(desc));\n+\tice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);\n+\n+\tmemset(pkt, 0, ICE_FDIR_PKT_LEN);\n+\tret = ice_fdir_get_prgm_pkt(&filter->input, pkt, false);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Generate dummy packet failed\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn ice_fdir_programming(pf, &desc);\n+}\n+\n+static int\n+ice_fdir_create_filter(struct ice_adapter *ad,\n+\t\t struct rte_flow *flow,\n+\t\t void *meta,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct ice_pf *pf = &ad->pf;\n+\tstruct ice_fdir_filter_conf *filter = meta;\n+\tstruct ice_fdir_filter_conf *rule;\n+\tint ret;\n+\n+\trule = rte_zmalloc(\"fdir_entry\", sizeof(*rule), 0);\n+\tif (!rule) {\n+\t\trte_flow_error_set(error, ENOMEM,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_HANDLE, NULL,\n+\t\t\t\t \"Failed to allocate memory\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tret = ice_fdir_input_set_conf(pf, filter->input.flow_type,\n+\t\t\tfilter->input_set, false);\n+\tif (ret) {\n+\t\trte_flow_error_set(error, -ret,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_HANDLE, NULL,\n+\t\t\t\t \"Profile configure failed.\");\n+\t\tgoto free_entry;\n+\t}\n+\n+\tret = ice_fdir_add_del_filter(pf, filter, true);\n+\tif (ret) {\n+\t\trte_flow_error_set(error, -ret,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_HANDLE, NULL,\n+\t\t\t\t \"Add filter rule failed.\");\n+\t\tgoto free_entry;\n+\t}\n+\n+\trte_memcpy(rule, filter, sizeof(*rule));\n+\tflow->rule = rule;\n+\tice_fdir_cnt_update(pf, filter->input.flow_type, false, true);\n+\treturn 0;\n+\n+free_entry:\n+\trte_free(rule);\n+\treturn -rte_errno;\n+}\n+\n+static int\n+ice_fdir_destroy_filter(struct ice_adapter *ad,\n+\t\t\tstruct rte_flow *flow,\n+\t\t\tstruct rte_flow_error *error)\n+{\n+\tstruct ice_pf *pf = &ad->pf;\n+\tstruct ice_fdir_filter_conf *filter;\n+\tint ret;\n+\n+\tfilter = (struct ice_fdir_filter_conf *)flow->rule;\n+\n+\tret = ice_fdir_add_del_filter(pf, filter, false);\n+\tif (ret) {\n+\t\trte_flow_error_set(error, -ret,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_HANDLE, NULL,\n+\t\t\t\t \"Del filter rule failed.\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tice_fdir_cnt_update(pf, filter->input.flow_type, false, false);\n+\tflow->rule = NULL;\n+\n+\trte_free(filter);\n+\n+\treturn 0;\n+}\n+\n static struct ice_flow_engine ice_fdir_engine = {\n \t.init = ice_fdir_init,\n \t.uninit = ice_fdir_uninit,\n+\t.create = ice_fdir_create_filter,\n+\t.destroy = ice_fdir_destroy_filter,\n \t.type = ICE_FLOW_ENGINE_FDIR,\n };\n \n+static int\n+ice_fdir_parse_action(struct ice_adapter *ad,\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error,\n+\t\t struct ice_fdir_filter_conf *filter)\n+{\n+\tstruct ice_pf *pf = &ad->pf;\n+\tconst struct rte_flow_action_queue *act_q;\n+\tconst struct rte_flow_action_mark *mark_spec = NULL;\n+\tuint32_t dest_num = 0;\n+\tuint32_t mark_num = 0;\n+\n+\tfor (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {\n+\t\tswitch (actions->type) {\n+\t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n+\t\t\tdest_num++;\n+\n+\t\t\tact_q = actions->conf;\n+\t\t\tfilter->input.q_index = act_q->index;\n+\t\t\tif (filter->input.q_index >=\n+\t\t\t\t\tpf->dev_data->nb_rx_queues) {\n+\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\n+\t\t\t\t\t\t actions,\n+\t\t\t\t\t\t \"Invalid queue for FDIR.\");\n+\t\t\t\treturn -rte_errno;\n+\t\t\t}\n+\t\t\tfilter->input.dest_ctl =\n+\t\t\t\tICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_DROP:\n+\t\t\tdest_num++;\n+\n+\t\t\tfilter->input.dest_ctl =\n+\t\t\t\tICE_FLTR_PRGM_DESC_DEST_DROP_PKT;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_PASSTHRU:\n+\t\t\tdest_num++;\n+\n+\t\t\tfilter->input.dest_ctl =\n+\t\t\t\tICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;\n+\t\t\tfilter->input.q_index = 0;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ACTION_TYPE_MARK:\n+\t\t\tmark_num++;\n+\n+\t\t\tmark_spec = actions->conf;\n+\t\t\tfilter->input.fltr_id = mark_spec->id;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, actions,\n+\t\t\t\t \"Invalid action.\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\n+\tif (dest_num == 0 || dest_num >= 2) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, actions,\n+\t\t\t \"Unsupported action combination\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (mark_num >= 2) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t RTE_FLOW_ERROR_TYPE_ACTION, actions,\n+\t\t\t \"Too many mark actions\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t struct rte_flow_error *error,\n+\t\t struct ice_fdir_filter_conf *filter)\n+{\n+\tconst struct rte_flow_item *item = pattern;\n+\tenum rte_flow_item_type item_type;\n+\tenum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;\n+\tconst struct rte_flow_item_eth *eth_spec, *eth_mask;\n+\tconst struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;\n+\tconst struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;\n+\tconst struct rte_flow_item_tcp *tcp_spec, *tcp_mask;\n+\tconst struct rte_flow_item_udp *udp_spec, *udp_mask;\n+\tconst struct rte_flow_item_sctp *sctp_spec, *sctp_mask;\n+\tuint64_t input_set = ICE_INSET_NONE;\n+\tuint8_t flow_type = ICE_FLTR_PTYPE_NONF_NONE;\n+\tuint8_t ipv6_addr_mask[16] = {\n+\t\t0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,\n+\t\t0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF\n+\t};\n+\tuint32_t vtc_flow_cpu;\n+\n+\n+\tfor (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {\n+\t\tif (item->last) {\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\titem,\n+\t\t\t\t\t\"Not support range\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\titem_type = item->type;\n+\n+\t\tswitch (item_type) {\n+\t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n+\t\t\teth_spec = item->spec;\n+\t\t\teth_mask = item->mask;\n+\n+\t\t\tif (eth_spec && eth_mask) {\n+\t\t\t\tif (!rte_is_zero_ether_addr(ð_spec->src) ||\n+\t\t\t\t !rte_is_zero_ether_addr(ð_mask->src)) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\titem,\n+\t\t\t\t\t\t\"Src mac not support\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tif (!rte_is_broadcast_ether_addr(ð_mask->dst)) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\titem,\n+\t\t\t\t\t\t\"Invalid mac addr mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tinput_set |= ICE_INSET_DMAC;\n+\t\t\t\trte_memcpy(&filter->input.ext_data.dst_mac,\n+\t\t\t\t\t ð_spec->dst,\n+\t\t\t\t\t RTE_ETHER_ADDR_LEN);\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV4:\n+\t\t\tl3 = RTE_FLOW_ITEM_TYPE_IPV4;\n+\t\t\tipv4_spec = item->spec;\n+\t\t\tipv4_mask = item->mask;\n+\n+\t\t\tif (ipv4_spec && ipv4_mask) {\n+\t\t\t\t/* Check IPv4 mask and update input set */\n+\t\t\t\tif (ipv4_mask->hdr.version_ihl ||\n+\t\t\t\t ipv4_mask->hdr.total_length ||\n+\t\t\t\t ipv4_mask->hdr.packet_id ||\n+\t\t\t\t ipv4_mask->hdr.fragment_offset ||\n+\t\t\t\t ipv4_mask->hdr.hdr_checksum) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid IPv4 mask.\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\t\t\t\tif (ipv4_mask->hdr.src_addr == UINT32_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV4_SRC;\n+\t\t\t\tif (ipv4_mask->hdr.dst_addr == UINT32_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV4_DST;\n+\t\t\t\tif (ipv4_mask->hdr.type_of_service == UINT8_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV4_TOS;\n+\t\t\t\tif (ipv4_mask->hdr.time_to_live == UINT8_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV4_TTL;\n+\t\t\t\tif (ipv4_mask->hdr.next_proto_id == UINT8_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV4_PROTO;\n+\n+\t\t\t\tfilter->input.ip.v4.dst_ip =\n+\t\t\t\t\tipv4_spec->hdr.src_addr;\n+\t\t\t\tfilter->input.ip.v4.src_ip =\n+\t\t\t\t\tipv4_spec->hdr.dst_addr;\n+\t\t\t\tfilter->input.ip.v4.tos =\n+\t\t\t\t\tipv4_spec->hdr.type_of_service;\n+\t\t\t\tfilter->input.ip.v4.ttl =\n+\t\t\t\t\tipv4_spec->hdr.time_to_live;\n+\t\t\t\tfilter->input.ip.v4.proto =\n+\t\t\t\t\tipv4_spec->hdr.next_proto_id;\n+\t\t\t}\n+\n+\t\t\tflow_type = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_IPV6:\n+\t\t\tl3 = RTE_FLOW_ITEM_TYPE_IPV6;\n+\t\t\tipv6_spec = item->spec;\n+\t\t\tipv6_mask = item->mask;\n+\n+\t\t\tif (ipv6_spec && ipv6_mask) {\n+\t\t\t\t/* Check IPv6 mask and update input set */\n+\t\t\t\tif (ipv6_mask->hdr.payload_len) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid IPv6 mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tif (!memcmp(ipv6_mask->hdr.src_addr,\n+\t\t\t\t\t ipv6_addr_mask,\n+\t\t\t\t\t RTE_DIM(ipv6_mask->hdr.src_addr)))\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV6_SRC;\n+\t\t\t\tif (!memcmp(ipv6_mask->hdr.dst_addr,\n+\t\t\t\t\t ipv6_addr_mask,\n+\t\t\t\t\t RTE_DIM(ipv6_mask->hdr.dst_addr)))\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV6_DST;\n+\n+\t\t\t\tif ((ipv6_mask->hdr.vtc_flow &\n+\t\t\t\t rte_cpu_to_be_32(ICE_IPV6_TC_MASK))\n+\t\t\t\t == rte_cpu_to_be_32(ICE_IPV6_TC_MASK))\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV6_TC;\n+\t\t\t\tif (ipv6_mask->hdr.proto == UINT8_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV6_NEXT_HDR;\n+\t\t\t\tif (ipv6_mask->hdr.hop_limits == UINT8_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_IPV6_HOP_LIMIT;\n+\n+\t\t\t\trte_memcpy(filter->input.ip.v6.dst_ip,\n+\t\t\t\t\t ipv6_spec->hdr.src_addr, 16);\n+\t\t\t\trte_memcpy(filter->input.ip.v6.src_ip,\n+\t\t\t\t\t ipv6_spec->hdr.dst_addr, 16);\n+\n+\t\t\t\tvtc_flow_cpu =\n+\t\t\t\t rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);\n+\t\t\t\tfilter->input.ip.v6.tc =\n+\t\t\t\t\t(uint8_t)(vtc_flow_cpu >>\n+\t\t\t\t\t\t ICE_FDIR_IPV6_TC_OFFSET);\n+\t\t\t\tfilter->input.ip.v6.proto =\n+\t\t\t\t\tipv6_spec->hdr.proto;\n+\t\t\t\tfilter->input.ip.v6.hlim =\n+\t\t\t\t\tipv6_spec->hdr.hop_limits;\n+\t\t\t}\n+\n+\t\t\tflow_type = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_TCP:\n+\t\t\ttcp_spec = item->spec;\n+\t\t\ttcp_mask = item->mask;\n+\n+\t\t\tif (tcp_spec && tcp_mask) {\n+\t\t\t\t/* Check TCP mask and update input set */\n+\t\t\t\tif (tcp_mask->hdr.sent_seq ||\n+\t\t\t\t tcp_mask->hdr.recv_ack ||\n+\t\t\t\t tcp_mask->hdr.data_off ||\n+\t\t\t\t tcp_mask->hdr.tcp_flags ||\n+\t\t\t\t tcp_mask->hdr.rx_win ||\n+\t\t\t\t tcp_mask->hdr.cksum ||\n+\t\t\t\t tcp_mask->hdr.tcp_urp) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid TCP mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tif (tcp_mask->hdr.src_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_TCP_SRC_PORT;\n+\t\t\t\tif (tcp_mask->hdr.dst_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_TCP_DST_PORT;\n+\n+\t\t\t\t/* Get filter info */\n+\t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n+\t\t\t\t\tfilter->input.ip.v4.dst_port =\n+\t\t\t\t\t\ttcp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v4.src_port =\n+\t\t\t\t\t\ttcp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV4_TCP;\n+\t\t\t\t} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {\n+\t\t\t\t\tfilter->input.ip.v6.dst_port =\n+\t\t\t\t\t\ttcp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v6.src_port =\n+\t\t\t\t\t\ttcp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV6_TCP;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_UDP:\n+\t\t\tudp_spec = item->spec;\n+\t\t\tudp_mask = item->mask;\n+\n+\t\t\tif (udp_spec && udp_mask) {\n+\t\t\t\t/* Check UDP mask and update input set*/\n+\t\t\t\tif (udp_mask->hdr.dgram_len ||\n+\t\t\t\t udp_mask->hdr.dgram_cksum) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid UDP mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tif (udp_mask->hdr.src_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_UDP_SRC_PORT;\n+\t\t\t\tif (udp_mask->hdr.dst_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_UDP_DST_PORT;\n+\n+\t\t\t\t/* Get filter info */\n+\t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n+\t\t\t\t\tfilter->input.ip.v4.dst_port =\n+\t\t\t\t\t\tudp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v4.src_port =\n+\t\t\t\t\t\tudp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV4_UDP;\n+\t\t\t\t} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {\n+\t\t\t\t\tfilter->input.ip.v6.src_port =\n+\t\t\t\t\t\tudp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v6.dst_port =\n+\t\t\t\t\t\tudp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV6_UDP;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_SCTP:\n+\t\t\tsctp_spec = item->spec;\n+\t\t\tsctp_mask = item->mask;\n+\n+\t\t\tif (sctp_spec && sctp_mask) {\n+\t\t\t\t/* Check SCTP mask and update input set */\n+\t\t\t\tif (sctp_mask->hdr.cksum) {\n+\t\t\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t\t\t item,\n+\t\t\t\t\t\t \"Invalid UDP mask\");\n+\t\t\t\t\treturn -rte_errno;\n+\t\t\t\t}\n+\n+\t\t\t\tif (sctp_mask->hdr.src_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_SCTP_SRC_PORT;\n+\t\t\t\tif (sctp_mask->hdr.dst_port == UINT16_MAX)\n+\t\t\t\t\tinput_set |= ICE_INSET_SCTP_DST_PORT;\n+\n+\t\t\t\t/* Get filter info */\n+\t\t\t\tif (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {\n+\t\t\t\t\tfilter->input.ip.v4.dst_port =\n+\t\t\t\t\t\tsctp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v4.src_port =\n+\t\t\t\t\t\tsctp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV4_SCTP;\n+\t\t\t\t} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {\n+\t\t\t\t\tfilter->input.ip.v6.dst_port =\n+\t\t\t\t\t\tsctp_spec->hdr.src_port;\n+\t\t\t\t\tfilter->input.ip.v6.src_port =\n+\t\t\t\t\t\tsctp_spec->hdr.dst_port;\n+\t\t\t\t\tflow_type =\n+\t\t\t\t\t\tICE_FLTR_PTYPE_NONF_IPV6_SCTP;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_VOID:\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM,\n+\t\t\t\t item,\n+\t\t\t\t \"Invalid pattern item.\");\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t}\n+\n+\tfilter->input.flow_type = flow_type;\n+\tfilter->input_set = input_set;\n+\n+\treturn 0;\n+}\n+\n+static int\n+ice_fdir_parse(struct ice_adapter *ad,\n+\t struct ice_pattern_match_item *array,\n+\t uint32_t array_len,\n+\t const struct rte_flow_item pattern[],\n+\t const struct rte_flow_action actions[],\n+\t void **meta,\n+\t struct rte_flow_error *error)\n+{\n+\tstruct ice_pf *pf = &ad->pf;\n+\tstruct ice_fdir_filter_conf *filter = &pf->fdir.conf;\n+\tstruct ice_pattern_match_item *item = NULL;\n+\tuint64_t input_set;\n+\tint ret;\n+\n+\tmemset(filter, 0, sizeof(*filter));\n+\titem = ice_search_pattern_match_item(pattern, array, array_len, error);\n+\tif (!item)\n+\t\treturn -rte_errno;\n+\n+\tret = ice_fdir_parse_pattern(ad, pattern, error, filter);\n+\tif (ret)\n+\t\treturn ret;\n+\tinput_set = filter->input_set;\n+\tif (!input_set || input_set & ~item->input_set_mask) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_SPEC,\n+\t\t\t\t pattern,\n+\t\t\t\t \"Invalid input set\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tret = ice_fdir_parse_action(ad, actions, error, filter);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\t*meta = filter;\n+\n+\treturn 0;\n+}\n+\n+static struct ice_flow_parser ice_fdir_parser = {\n+\t.engine = &ice_fdir_engine,\n+\t.array = ice_fdir_pattern,\n+\t.array_len = RTE_DIM(ice_fdir_pattern),\n+\t.parse_pattern_action = ice_fdir_parse,\n+\t.stage = ICE_FLOW_STAGE_DISTRIBUTOR,\n+};\n+\n RTE_INIT(ice_fdir_engine_register)\n {\n \tice_register_flow_engine(&ice_fdir_engine);\n", "prefixes": [ "v7", "3/9" ] }