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Update a patch.

GET /api/patches/61449/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 61449,
    "url": "http://patches.dpdk.org/api/patches/61449/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20191018111602.26742-3-yahui.cao@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20191018111602.26742-3-yahui.cao@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20191018111602.26742-3-yahui.cao@intel.com",
    "date": "2019-10-18T11:15:55",
    "name": "[v7,2/9] net/ice: configure HW FDIR rule",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "71671b84a8c46f4510bc4d57bbb184ee619d3f63",
    "submitter": {
        "id": 1176,
        "url": "http://patches.dpdk.org/api/people/1176/?format=api",
        "name": "Cao, Yahui",
        "email": "yahui.cao@intel.com"
    },
    "delegate": {
        "id": 31221,
        "url": "http://patches.dpdk.org/api/users/31221/?format=api",
        "username": "yexl",
        "first_name": "xiaolong",
        "last_name": "ye",
        "email": "xiaolong.ye@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20191018111602.26742-3-yahui.cao@intel.com/mbox/",
    "series": [
        {
            "id": 6926,
            "url": "http://patches.dpdk.org/api/series/6926/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6926",
            "date": "2019-10-18T11:15:53",
            "name": "net/ice: add ice Flow Director driver",
            "version": 7,
            "mbox": "http://patches.dpdk.org/series/6926/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/61449/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/61449/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 618821E56D;\n\tFri, 18 Oct 2019 05:33:49 +0200 (CEST)",
            "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby dpdk.org (Postfix) with ESMTP id 62D3F1E533\n\tfor <dev@dpdk.org>; Fri, 18 Oct 2019 05:33:44 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t17 Oct 2019 20:33:44 -0700",
            "from dpdk-yahui-skylake.sh.intel.com ([10.67.119.16])\n\tby FMSMGA003.fm.intel.com with ESMTP; 17 Oct 2019 20:33:42 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.67,310,1566889200\"; d=\"scan'208\";a=\"202577919\"",
        "From": "Yahui Cao <yahui.cao@intel.com>",
        "To": "Qiming Yang <qiming.yang@intel.com>,\n\tWenzhuo Lu <wenzhuo.lu@intel.com>",
        "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n\tXiaolong Ye <xiaolong.ye@intel.com>,\n\tBeilei Xing <beilei.xing@intel.com>, Yahui Cao <yahui.cao@intel.com>",
        "Date": "Fri, 18 Oct 2019 19:15:55 +0800",
        "Message-Id": "<20191018111602.26742-3-yahui.cao@intel.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20191018111602.26742-1-yahui.cao@intel.com>",
        "References": "<20191017160454.14518-1-yahui.cao@intel.com>\n\t<20191018111602.26742-1-yahui.cao@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v7 2/9] net/ice: configure HW FDIR rule",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nThis patch adds a HW FDIR rule to the FDIR HW table\nwithout adding a FDIR filter.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nAcked-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/ice_ethdev.h      |   2 +\n drivers/net/ice/ice_fdir_filter.c | 277 +++++++++++++++++++++++++++++-\n 2 files changed, 278 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 222fc081f..2060ad5cf 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -281,6 +281,8 @@ struct ice_pf {\n \tuint16_t fdir_nb_qps; /* The number of queue pairs of Flow Director */\n \tuint16_t fdir_qp_offset;\n \tstruct ice_fdir_info fdir; /* flow director info */\n+\tuint16_t hw_prof_cnt[ICE_FLTR_PTYPE_MAX][ICE_FD_HW_SEG_MAX];\n+\tuint16_t fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX][ICE_FD_HW_SEG_MAX];\n \tstruct ice_hw_port_stats stats_offset;\n \tstruct ice_hw_port_stats stats;\n \t/* internal packet statistics, it should be excluded from the total */\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex 0fb3054f5..60eb27eac 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -164,6 +164,56 @@ ice_fdir_prof_free(struct ice_hw *hw)\n \trte_free(hw->fdir_prof);\n }\n \n+/* Remove a profile for some filter type */\n+static void\n+ice_fdir_prof_rm(struct ice_pf *pf, enum ice_fltr_ptype ptype, bool is_tunnel)\n+{\n+\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\tstruct ice_fd_hw_prof *hw_prof;\n+\tuint64_t prof_id;\n+\tuint16_t vsi_num;\n+\tint i;\n+\n+\tif (!hw->fdir_prof || !hw->fdir_prof[ptype])\n+\t\treturn;\n+\n+\thw_prof = hw->fdir_prof[ptype];\n+\n+\tprof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;\n+\tfor (i = 0; i < pf->hw_prof_cnt[ptype][is_tunnel]; i++) {\n+\t\tif (hw_prof->entry_h[i][is_tunnel]) {\n+\t\t\tvsi_num = ice_get_hw_vsi_num(hw,\n+\t\t\t\t\t\t     hw_prof->vsi_h[i]);\n+\t\t\tice_rem_prof_id_flow(hw, ICE_BLK_FD,\n+\t\t\t\t\t     vsi_num, ptype);\n+\t\t\tice_flow_rem_entry(hw,\n+\t\t\t\t\t   hw_prof->entry_h[i][is_tunnel]);\n+\t\t\thw_prof->entry_h[i][is_tunnel] = 0;\n+\t\t}\n+\t}\n+\tice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);\n+\trte_free(hw_prof->fdir_seg[is_tunnel]);\n+\thw_prof->fdir_seg[is_tunnel] = NULL;\n+\n+\tfor (i = 0; i < hw_prof->cnt; i++)\n+\t\thw_prof->vsi_h[i] = 0;\n+\tpf->hw_prof_cnt[ptype][is_tunnel] = 0;\n+}\n+\n+/* Remove all created profiles */\n+static void\n+ice_fdir_prof_rm_all(struct ice_pf *pf)\n+{\n+\tenum ice_fltr_ptype ptype;\n+\n+\tfor (ptype = ICE_FLTR_PTYPE_NONF_NONE;\n+\t     ptype < ICE_FLTR_PTYPE_MAX;\n+\t     ptype++) {\n+\t\tice_fdir_prof_rm(pf, ptype, false);\n+\t\tice_fdir_prof_rm(pf, ptype, true);\n+\t}\n+}\n+\n /*\n  * ice_fdir_teardown - release the Flow Director resources\n  * @pf: board private structure\n@@ -192,9 +242,234 @@ ice_fdir_teardown(struct ice_pf *pf)\n \tpf->fdir.txq = NULL;\n \tice_rx_queue_release(pf->fdir.rxq);\n \tpf->fdir.rxq = NULL;\n+\tice_fdir_prof_rm_all(pf);\n+\tice_fdir_prof_free(hw);\n \tice_release_vsi(vsi);\n \tpf->fdir.fdir_vsi = NULL;\n-\tice_fdir_prof_free(hw);\n+}\n+\n+static int\n+ice_fdir_hw_tbl_conf(struct ice_pf *pf, struct ice_vsi *vsi,\n+\t\t     struct ice_vsi *ctrl_vsi,\n+\t\t     struct ice_flow_seg_info *seg,\n+\t\t     enum ice_fltr_ptype ptype,\n+\t\t     bool is_tunnel)\n+{\n+\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\tenum ice_flow_dir dir = ICE_FLOW_RX;\n+\tstruct ice_flow_seg_info *ori_seg;\n+\tstruct ice_fd_hw_prof *hw_prof;\n+\tstruct ice_flow_prof *prof;\n+\tuint64_t entry_1 = 0;\n+\tuint64_t entry_2 = 0;\n+\tuint16_t vsi_num;\n+\tint ret;\n+\tuint64_t prof_id;\n+\n+\thw_prof = hw->fdir_prof[ptype];\n+\tori_seg = hw_prof->fdir_seg[is_tunnel];\n+\tif (ori_seg) {\n+\t\tif (!is_tunnel) {\n+\t\t\tif (!memcmp(ori_seg, seg, sizeof(*seg)))\n+\t\t\t\treturn -EAGAIN;\n+\t\t} else {\n+\t\t\tif (!memcmp(ori_seg, &seg[1], sizeof(*seg)))\n+\t\t\t\treturn -EAGAIN;\n+\t\t}\n+\n+\t\tif (pf->fdir_fltr_cnt[ptype][is_tunnel])\n+\t\t\treturn -EINVAL;\n+\n+\t\tice_fdir_prof_rm(pf, ptype, is_tunnel);\n+\t}\n+\n+\tprof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;\n+\tret = ice_flow_add_prof(hw, ICE_BLK_FD, dir, prof_id, seg,\n+\t\t\t\t(is_tunnel) ? 2 : 1, NULL, 0, &prof);\n+\tif (ret)\n+\t\treturn ret;\n+\tret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,\n+\t\t\t\t vsi->idx, ICE_FLOW_PRIO_NORMAL,\n+\t\t\t\t seg, NULL, 0, &entry_1);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to add main VSI flow entry for %d.\",\n+\t\t\t    ptype);\n+\t\tgoto err_add_prof;\n+\t}\n+\tret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,\n+\t\t\t\t ctrl_vsi->idx, ICE_FLOW_PRIO_NORMAL,\n+\t\t\t\t seg, NULL, 0, &entry_2);\n+\tif (ret) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to add control VSI flow entry for %d.\",\n+\t\t\t    ptype);\n+\t\tgoto err_add_entry;\n+\t}\n+\n+\tpf->hw_prof_cnt[ptype][is_tunnel] = 0;\n+\thw_prof->cnt = 0;\n+\thw_prof->fdir_seg[is_tunnel] = seg;\n+\thw_prof->vsi_h[hw_prof->cnt] = vsi->idx;\n+\thw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_1;\n+\tpf->hw_prof_cnt[ptype][is_tunnel]++;\n+\thw_prof->vsi_h[hw_prof->cnt] = ctrl_vsi->idx;\n+\thw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_2;\n+\tpf->hw_prof_cnt[ptype][is_tunnel]++;\n+\n+\treturn ret;\n+\n+err_add_entry:\n+\tvsi_num = ice_get_hw_vsi_num(hw, vsi->idx);\n+\tice_rem_prof_id_flow(hw, ICE_BLK_FD, vsi_num, prof_id);\n+\tice_flow_rem_entry(hw, entry_1);\n+err_add_prof:\n+\tice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);\n+\n+\treturn ret;\n+}\n+\n+static void\n+ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)\n+{\n+\tuint32_t i, j;\n+\n+\tstruct ice_inset_map {\n+\t\tuint64_t inset;\n+\t\tenum ice_flow_field fld;\n+\t};\n+\tstatic const struct ice_inset_map ice_inset_map[] = {\n+\t\t{ICE_INSET_DMAC, ICE_FLOW_FIELD_IDX_ETH_DA},\n+\t\t{ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},\n+\t\t{ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},\n+\t\t{ICE_INSET_IPV4_TOS, ICE_FLOW_FIELD_IDX_IPV4_DSCP},\n+\t\t{ICE_INSET_IPV4_TTL, ICE_FLOW_FIELD_IDX_IPV4_TTL},\n+\t\t{ICE_INSET_IPV4_PROTO, ICE_FLOW_FIELD_IDX_IPV4_PROT},\n+\t\t{ICE_INSET_IPV6_SRC, ICE_FLOW_FIELD_IDX_IPV6_SA},\n+\t\t{ICE_INSET_IPV6_DST, ICE_FLOW_FIELD_IDX_IPV6_DA},\n+\t\t{ICE_INSET_IPV6_TC, ICE_FLOW_FIELD_IDX_IPV6_DSCP},\n+\t\t{ICE_INSET_IPV6_NEXT_HDR, ICE_FLOW_FIELD_IDX_IPV6_PROT},\n+\t\t{ICE_INSET_IPV6_HOP_LIMIT, ICE_FLOW_FIELD_IDX_IPV6_TTL},\n+\t\t{ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},\n+\t\t{ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},\n+\t\t{ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},\n+\t\t{ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},\n+\t\t{ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},\n+\t\t{ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},\n+\t};\n+\n+\tfor (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {\n+\t\tif ((inset & ice_inset_map[i].inset) ==\n+\t\t    ice_inset_map[i].inset)\n+\t\t\tfield[j++] = ice_inset_map[i].fld;\n+\t}\n+}\n+\n+static int __rte_unused\n+ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,\n+\t\t\tuint64_t input_set, bool is_tunnel)\n+{\n+\tstruct ice_flow_seg_info *seg;\n+\tstruct ice_flow_seg_info *seg_tun = NULL;\n+\tenum ice_flow_field field[ICE_FLOW_FIELD_IDX_MAX];\n+\tint i, ret;\n+\n+\tif (!input_set)\n+\t\treturn -EINVAL;\n+\n+\tseg = (struct ice_flow_seg_info *)\n+\t\tice_malloc(hw, sizeof(*seg));\n+\tif (!seg) {\n+\t\tPMD_DRV_LOG(ERR, \"No memory can be allocated\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tfor (i = 0; i < ICE_FLOW_FIELD_IDX_MAX; i++)\n+\t\tfield[i] = ICE_FLOW_FIELD_IDX_MAX;\n+\tice_fdir_input_set_parse(input_set, field);\n+\n+\tswitch (flow) {\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_UDP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV4);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_TCP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV4);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_SCTP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV4);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV4_OTHER:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV6_UDP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV6);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV6_TCP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV6);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV6_SCTP:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |\n+\t\t\t\t  ICE_FLOW_SEG_HDR_IPV6);\n+\t\tbreak;\n+\tcase ICE_FLTR_PTYPE_NONF_IPV6_OTHER:\n+\t\tICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"not supported filter type.\");\n+\t\tbreak;\n+\t}\n+\n+\tfor (i = 0; field[i] != ICE_FLOW_FIELD_IDX_MAX; i++) {\n+\t\tice_flow_set_fld(seg, field[i],\n+\t\t\t\t ICE_FLOW_FLD_OFF_INVAL,\n+\t\t\t\t ICE_FLOW_FLD_OFF_INVAL,\n+\t\t\t\t ICE_FLOW_FLD_OFF_INVAL, false);\n+\t}\n+\n+\tif (!is_tunnel) {\n+\t\tret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,\n+\t\t\t\t\t   seg, flow, false);\n+\t} else {\n+\t\tseg_tun = (struct ice_flow_seg_info *)\n+\t\t\tice_malloc(hw, sizeof(*seg) * ICE_FD_HW_SEG_MAX);\n+\t\tif (!seg_tun) {\n+\t\t\tPMD_DRV_LOG(ERR, \"No memory can be allocated\");\n+\t\t\trte_free(seg);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t\trte_memcpy(&seg_tun[1], seg, sizeof(*seg));\n+\t\tret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,\n+\t\t\t\t\t   seg_tun, flow, true);\n+\t}\n+\n+\tif (!ret) {\n+\t\treturn ret;\n+\t} else if (ret < 0) {\n+\t\trte_free(seg);\n+\t\tif (is_tunnel)\n+\t\t\trte_free(seg_tun);\n+\t\treturn (ret == -EAGAIN) ? 0 : ret;\n+\t} else {\n+\t\treturn ret;\n+\t}\n+}\n+\n+static void __rte_unused\n+ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,\n+\t\t    bool is_tunnel, bool add)\n+{\n+\tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n+\tint cnt;\n+\n+\tcnt = (add) ? 1 : -1;\n+\thw->fdir_active_fltr += cnt;\n+\tif (ptype == ICE_FLTR_PTYPE_NONF_NONE || ptype >= ICE_FLTR_PTYPE_MAX)\n+\t\tPMD_DRV_LOG(ERR, \"Unknown filter type %d\", ptype);\n+\telse\n+\t\tpf->fdir_fltr_cnt[ptype][is_tunnel] += cnt;\n }\n \n static int\n",
    "prefixes": [
        "v7",
        "2/9"
    ]
}