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GET /api/patches/59836/?format=api
http://patches.dpdk.org/api/patches/59836/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190926085232.47667-16-jasvinder.singh@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190926085232.47667-16-jasvinder.singh@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190926085232.47667-16-jasvinder.singh@intel.com", "date": "2019-09-26T08:52:32", "name": "[v3,15/15] sched: remove redundant code", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e91179ebd0db2b0a0385ad391c0a70073aaff5c1", "submitter": { "id": 285, "url": "http://patches.dpdk.org/api/people/285/?format=api", "name": "Jasvinder Singh", "email": "jasvinder.singh@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190926085232.47667-16-jasvinder.singh@intel.com/mbox/", "series": [ { "id": 6540, "url": "http://patches.dpdk.org/api/series/6540/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6540", "date": "2019-09-26T08:52:17", "name": "sched: subport level configuration of pipe nodes", "version": 3, "mbox": "http://patches.dpdk.org/series/6540/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/59836/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/59836/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id A866C1BFB2;\n\tThu, 26 Sep 2019 10:53:39 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 2DB0A1BF59\n\tfor <dev@dpdk.org>; Thu, 26 Sep 2019 10:53:01 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n\tby fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Sep 2019 01:53:00 -0700", "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.223.4])\n\tby fmsmga007.fm.intel.com with ESMTP; 26 Sep 2019 01:52:59 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,551,1559545200\"; d=\"scan'208\";a=\"189945637\"", "From": "Jasvinder Singh <jasvinder.singh@intel.com>", "To": "dev@dpdk.org", "Cc": "cristian.dumitrescu@intel.com,\n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>", "Date": "Thu, 26 Sep 2019 09:52:32 +0100", "Message-Id": "<20190926085232.47667-16-jasvinder.singh@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190926085232.47667-1-jasvinder.singh@intel.com>", "References": "<20190909100530.86020-1-jasvinder.singh@intel.com>\n\t<20190926085232.47667-1-jasvinder.singh@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 15/15] sched: remove redundant code", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Remove redundant data structure fields from port level data\nstructures and update release notes.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n doc/guides/rel_notes/release_19_11.rst | 6 +++-\n lib/librte_sched/rte_sched.c | 42 +-------------------------\n lib/librte_sched/rte_sched.h | 22 --------------\n 3 files changed, 6 insertions(+), 64 deletions(-)", "diff": "diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst\nindex 27cfbd9e3..dd122f00a 100644\n--- a/doc/guides/rel_notes/release_19_11.rst\n+++ b/doc/guides/rel_notes/release_19_11.rst\n@@ -94,6 +94,10 @@ API Changes\n Also, make sure to start the actual text at the margin.\n =========================================================\n \n+* sched: The pipe nodes configuration parameters such as number of pipes,\n+ pipe queue sizes, pipe profiles, etc., are moved from port level structure\n+ to subport level. This allows different subports of the same port to\n+ have different configuration for the pipe nodes.\n \n ABI Changes\n -----------\n@@ -181,7 +185,7 @@ The libraries prepended with a plus sign were incremented in this version.\n librte_rcu.so.1\n librte_reorder.so.1\n librte_ring.so.2\n- librte_sched.so.3\n+ + librte_sched.so.4\n librte_security.so.2\n librte_stack.so.1\n librte_table.so.3\ndiff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c\nindex 1faa580d0..710ecf65a 100644\n--- a/lib/librte_sched/rte_sched.c\n+++ b/lib/librte_sched/rte_sched.c\n@@ -216,13 +216,6 @@ struct rte_sched_port {\n \tuint32_t mtu;\n \tuint32_t frame_overhead;\n \tint socket;\n-\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\tuint32_t n_pipe_profiles;\n-\tuint32_t n_max_pipe_profiles;\n-\tuint32_t pipe_tc_be_rate_max;\n-#ifdef RTE_SCHED_RED\n-\tstruct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n-#endif\n \n \t/* Timing */\n \tuint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */\n@@ -230,48 +223,15 @@ struct rte_sched_port {\n \tuint64_t time; /* Current NIC TX time measured in bytes */\n \tstruct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */\n \n-\t/* Scheduling loop detection */\n-\tuint32_t pipe_loop;\n-\tuint32_t pipe_exhaustion;\n-\n-\t/* Bitmap */\n-\tstruct rte_bitmap *bmp;\n-\tuint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;\n-\n \t/* Grinders */\n-\tstruct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];\n-\tuint32_t busy_grinders;\n \tstruct rte_mbuf **pkts_out;\n \tuint32_t n_pkts_out;\n \tuint32_t subport_id;\n \n-\t/* Queue base calculation */\n-\tuint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];\n-\tuint32_t qsize_sum;\n-\n \t/* Large data structures */\n-\tstruct rte_sched_subport *subports[0];\n-\tstruct rte_sched_subport *subport;\n-\tstruct rte_sched_pipe *pipe;\n-\tstruct rte_sched_queue *queue;\n-\tstruct rte_sched_queue_extra *queue_extra;\n-\tstruct rte_sched_pipe_profile *pipe_profiles;\n-\tuint8_t *bmp_array;\n-\tstruct rte_mbuf **queue_array;\n-\tuint8_t memory[0] __rte_cache_aligned;\n+\tstruct rte_sched_subport *subports[0] __rte_cache_aligned;\n } __rte_cache_aligned;\n \n-enum rte_sched_port_array {\n-\te_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,\n-\te_RTE_SCHED_PORT_ARRAY_PIPE,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,\n-\te_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,\n-\te_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,\n-\te_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,\n-\te_RTE_SCHED_PORT_ARRAY_TOTAL,\n-};\n-\n enum rte_sched_subport_array {\n \te_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,\n \te_RTE_SCHED_SUBPORT_ARRAY_QUEUE,\ndiff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h\nindex 40f02f124..c82c23c14 100644\n--- a/lib/librte_sched/rte_sched.h\n+++ b/lib/librte_sched/rte_sched.h\n@@ -260,28 +260,6 @@ struct rte_sched_port_params {\n \t * the subports of the same port.\n \t */\n \tuint32_t n_pipes_per_subport;\n-\n-\t/** Packet queue size for each traffic class.\n-\t * All the pipes within the same subport share the similar\n-\t * configuration for the queues.\n-\t */\n-\tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\n-\t/** Pipe profile table.\n-\t * Every pipe is configured using one of the profiles from this table.\n-\t */\n-\tstruct rte_sched_pipe_params *pipe_profiles;\n-\n-\t/** Profiles in the pipe profile table */\n-\tuint32_t n_pipe_profiles;\n-\n-\t/** Max profiles allowed in the pipe profile table */\n-\tuint32_t n_max_pipe_profiles;\n-\n-#ifdef RTE_SCHED_RED\n-\t/** RED parameters */\n-\tstruct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n-#endif\n };\n \n /*\n", "prefixes": [ "v3", "15/15" ] }{ "id": 59836, "url": "