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GET /api/patches/59692/?format=api
{ "id": 59692, "url": "http://patches.dpdk.org/api/patches/59692/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190925045408.131578-1-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190925045408.131578-1-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190925045408.131578-1-ndabilpuram@marvell.com", "date": "2019-09-25T04:54:07", "name": "net/octeontx2: add GRE TSO offload support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "abe498ddf9de2a1aa498e8db6018f5461746e7c9", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190925045408.131578-1-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 6514, "url": "http://patches.dpdk.org/api/series/6514/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6514", "date": "2019-09-25T04:54:07", "name": "net/octeontx2: add GRE TSO offload support", "version": 1, "mbox": "http://patches.dpdk.org/series/6514/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/59692/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/59692/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 29A6A1DBD;\n\tWed, 25 Sep 2019 06:56:00 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 141E21DBC\n\tfor <dev@dpdk.org>; Wed, 25 Sep 2019 06:55:57 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx8P4tsQS017269 for <dev@dpdk.org>; Tue, 24 Sep 2019 21:55:57 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2v81mw800y-5\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Tue, 24 Sep 2019 21:55:57 -0700", "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tTue, 24 Sep 2019 21:54:13 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Tue, 24 Sep 2019 21:54:13 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n\tby maili.marvell.com (Postfix) with ESMTP id 46B5E3F7041;\n\tTue, 24 Sep 2019 21:54:11 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : mime-version : content-type; s=pfpt0818;\n\tbh=UTOy65JmzixPI3YY0oBqIdM4xkCSuuVWVXz0e8g7Kx0=;\n\tb=d9G+5EG2VItXemjwpEo6bkTbyEHdzm1Ih0ekXUCjQNL/LfJhv6bivvh/2YdCZeqnP/gc\n\t5zj0omcpylEnvVNUJNjdvpE7bgpLgYf3OBdOJHWy8qrzc1pUm3PXi1uaN1fTkIJoJ8bk\n\tx5RUVlnMNS+vYfoZYbeAZ384IgIlT+hTlfgVaCfaCutshr6KtEArBS3qCjB8Tb6RYUlE\n\tyYuObGJVaKTmxGnDk+npZVIgrs0NGeqTyI55FHiaWQdBdtOpLpoOOz6DETlMT/YxJg3x\n\tuNF2clPhF207jtxvvh4LUBQ7PnY6Y6UwwrNB6zLKQk/+umaoxFkikJ1wM0Iow83hvrWh\n\txg== ", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Wed, 25 Sep 2019 10:24:07 +0530", "Message-ID": "<20190925045408.131578-1-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,1.0.8\n\tdefinitions=2019-09-25_03:2019-09-23,2019-09-25 signatures=0", "Subject": "[dpdk-dev] [PATCH] net/octeontx2: add GRE TSO offload support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Extends existing TSO support to GRE tunnel on the\nsame SoC revisions.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\nNote: This patchset depends on \"net/octeontx2: add TSO offload support\"\ni.e \"http://patches.dpdk.org/patch/59691/\"\n\n drivers/net/octeontx2/otx2_ethdev.c | 111 +++++++++++++++++++++++++++++++++++-\n drivers/net/octeontx2/otx2_ethdev.h | 1 +\n drivers/net/octeontx2/otx2_tx.h | 2 +-\n 3 files changed, 111 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex c447f83..428351d 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -33,7 +33,8 @@ nix_get_tx_offload_capa(struct otx2_eth_dev *dev)\n \tif (otx2_dev_is_96xx_A0(dev) || otx2_dev_is_95xx_Ax(dev))\n \t\tcapa &= ~(DEV_TX_OFFLOAD_TCP_TSO |\n \t\t\t DEV_TX_OFFLOAD_VXLAN_TNL_TSO |\n-\t\t\t DEV_TX_OFFLOAD_GENEVE_TNL_TSO);\n+\t\t\t DEV_TX_OFFLOAD_GENEVE_TNL_TSO |\n+\t\t\t DEV_TX_OFFLOAD_GRE_TNL_TSO);\n \treturn capa;\n }\n \n@@ -655,7 +656,8 @@ nix_tx_offload_flags(struct rte_eth_dev *eth_dev)\n \n \t/* Enable Inner and Outer checksum for Tunnel TSO */\n \tif (conf & (DEV_TX_OFFLOAD_VXLAN_TNL_TSO |\n-\t\t DEV_TX_OFFLOAD_GENEVE_TNL_TSO))\n+\t\t DEV_TX_OFFLOAD_GENEVE_TNL_TSO |\n+\t\t DEV_TX_OFFLOAD_GRE_TNL_TSO))\n \t\tflags |= (NIX_TX_OFFLOAD_TSO_F |\n \t\t\t NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |\n \t\t\t NIX_TX_OFFLOAD_L3_L4_CSUM_F);\n@@ -1322,6 +1324,61 @@ nix_lso_udp_tun_tcp(struct nix_lso_format_cfg *req,\n \tfield++;\n }\n \n+static void\n+nix_lso_tun_tcp(struct nix_lso_format_cfg *req,\n+\t\tbool outer_v4, bool inner_v4)\n+{\n+\tvolatile struct nix_lso_format *field;\n+\n+\tfield = (volatile struct nix_lso_format *)&req->fields[0];\n+\treq->field_mask = NIX_LSO_FIELD_MASK;\n+\t/* Outer IPv4/IPv6 len */\n+\tfield->layer = NIX_TXLAYER_OL3;\n+\tfield->offset = outer_v4 ? 2 : 4;\n+\tfield->sizem1 = 1; /* 2B */\n+\tfield->alg = NIX_LSOALG_ADD_PAYLEN;\n+\tfield++;\n+\tif (outer_v4) {\n+\t\t/* IPID */\n+\t\tfield->layer = NIX_TXLAYER_OL3;\n+\t\tfield->offset = 4;\n+\t\tfield->sizem1 = 1;\n+\t\t/* Incremented linearly per segment */\n+\t\tfield->alg = NIX_LSOALG_ADD_SEGNUM;\n+\t\tfield++;\n+\t}\n+\n+\t/* Inner IPv4/IPv6 */\n+\tfield->layer = NIX_TXLAYER_IL3;\n+\tfield->offset = inner_v4 ? 2 : 4;\n+\tfield->sizem1 = 1; /* 2B */\n+\tfield->alg = NIX_LSOALG_ADD_PAYLEN;\n+\tfield++;\n+\tif (inner_v4) {\n+\t\t/* IPID field */\n+\t\tfield->layer = NIX_TXLAYER_IL3;\n+\t\tfield->offset = 4;\n+\t\tfield->sizem1 = 1;\n+\t\t/* Incremented linearly per segment */\n+\t\tfield->alg = NIX_LSOALG_ADD_SEGNUM;\n+\t\tfield++;\n+\t}\n+\n+\t/* TCP sequence number update */\n+\tfield->layer = NIX_TXLAYER_IL4;\n+\tfield->offset = 4;\n+\tfield->sizem1 = 3; /* 4 bytes */\n+\tfield->alg = NIX_LSOALG_ADD_OFFSET;\n+\tfield++;\n+\n+\t/* TCP flags field */\n+\tfield->layer = NIX_TXLAYER_IL4;\n+\tfield->offset = 12;\n+\tfield->sizem1 = 1;\n+\tfield->alg = NIX_LSOALG_TCP_FLAGS;\n+\tfield++;\n+}\n+\n static int\n nix_setup_lso_formats(struct otx2_eth_dev *dev)\n {\n@@ -1414,6 +1471,56 @@ nix_setup_lso_formats(struct otx2_eth_dev *dev)\n \t\treturn -EFAULT;\n \totx2_nix_dbg(\"udp tun v6v6 fmt=%u\\n\", base + 5);\n \n+\t/*\n+\t * IPv4/TUN HDR/IPv4/TCP LSO\n+\t */\n+\treq = otx2_mbox_alloc_msg_nix_lso_format_cfg(mbox);\n+\tnix_lso_tun_tcp(req, true, true);\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (rsp->lso_format_idx != base + 6)\n+\t\treturn -EFAULT;\n+\totx2_nix_dbg(\"tun v4v4 fmt=%u\\n\", base + 6);\n+\n+\t/*\n+\t * IPv4/TUN HDR/IPv6/TCP LSO\n+\t */\n+\treq = otx2_mbox_alloc_msg_nix_lso_format_cfg(mbox);\n+\tnix_lso_tun_tcp(req, true, false);\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (rsp->lso_format_idx != base + 7)\n+\t\treturn -EFAULT;\n+\totx2_nix_dbg(\"tun v4v6 fmt=%u\\n\", base + 7);\n+\n+\t/*\n+\t * IPv6/TUN HDR/IPv4/TCP LSO\n+\t */\n+\treq = otx2_mbox_alloc_msg_nix_lso_format_cfg(mbox);\n+\tnix_lso_tun_tcp(req, false, true);\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tif (rsp->lso_format_idx != base + 8)\n+\t\treturn -EFAULT;\n+\totx2_nix_dbg(\"tun v6v4 fmt=%u\\n\", base + 8);\n+\n+\t/*\n+\t * IPv6/TUN HDR/IPv6/TCP LSO\n+\t */\n+\treq = otx2_mbox_alloc_msg_nix_lso_format_cfg(mbox);\n+\tnix_lso_tun_tcp(req, false, false);\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc)\n+\t\treturn rc;\n+\tif (rsp->lso_format_idx != base + 9)\n+\t\treturn -EFAULT;\n+\totx2_nix_dbg(\"tun v6v6 fmt=%u\\n\", base + 9);\n \treturn 0;\n }\n \ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 38f341e..0150baa 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -130,6 +130,7 @@\n \tDEV_TX_OFFLOAD_TCP_TSO\t\t| \\\n \tDEV_TX_OFFLOAD_VXLAN_TNL_TSO | \\\n \tDEV_TX_OFFLOAD_GENEVE_TNL_TSO | \\\n+\tDEV_TX_OFFLOAD_GRE_TNL_TSO\t| \\\n \tDEV_TX_OFFLOAD_MULTI_SEGS\t| \\\n \tDEV_TX_OFFLOAD_IPV4_CKSUM)\n \ndiff --git a/drivers/net/octeontx2/otx2_tx.h b/drivers/net/octeontx2/otx2_tx.h\nindex e919198..04e859b 100644\n--- a/drivers/net/octeontx2/otx2_tx.h\n+++ b/drivers/net/octeontx2/otx2_tx.h\n@@ -342,7 +342,7 @@ otx2_nix_xmit_prepare(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags)\n \t\t\tw1.il4type = NIX_SENDL4TYPE_TCP_CKSUM;\n \t\t\tw1.ol4type = is_udp_tun ? NIX_SENDL4TYPE_UDP_CKSUM : 0;\n \t\t\t/* Update format for UDP tunneled packet */\n-\t\t\tsend_hdr_ext->w0.lso_format += (is_udp_tun << 1);\n+\t\t\tsend_hdr_ext->w0.lso_format += is_udp_tun ? 2 : 6;\n \n \t\t\tsend_hdr_ext->w0.lso_format +=\n \t\t\t\t!!(ol_flags & PKT_TX_OUTER_IPV6) << 1;\n", "prefixes": [] }