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GET /api/patches/58933/?format=api
{ "id": 58933, "url": "http://patches.dpdk.org/api/patches/58933/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190907031629.34666-9-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190907031629.34666-9-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190907031629.34666-9-qi.z.zhang@intel.com", "date": "2019-09-07T03:16:15", "name": "[v3,08/22] net/ice/base: remove RSS code as iavf host", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0c62d8f61137a4ee59228f370344218b7a2c316e", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 31221, "url": "http://patches.dpdk.org/api/users/31221/?format=api", "username": "yexl", "first_name": "xiaolong", "last_name": "ye", "email": "xiaolong.ye@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190907031629.34666-9-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 6321, "url": "http://patches.dpdk.org/api/series/6321/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6321", "date": "2019-09-07T03:16:07", "name": "net/ice/base: share code update secend batch.", "version": 3, "mbox": "http://patches.dpdk.org/series/6321/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/58933/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/58933/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EDED61F4CC;\n\tSat, 7 Sep 2019 05:14:19 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 3A74C1F47A\n\tfor <dev@dpdk.org>; Sat, 7 Sep 2019 05:14:02 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t06 Sep 2019 20:14:01 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby FMSMGA003.fm.intel.com with ESMTP; 06 Sep 2019 20:14:00 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,474,1559545200\"; d=\"scan'208\";a=\"191006842\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Sat, 7 Sep 2019 11:16:15 +0800", "Message-Id": "<20190907031629.34666-9-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190907031629.34666-1-qi.z.zhang@intel.com>", "References": "<20190902035551.16852-1-qi.z.zhang@intel.com>\n\t<20190907031629.34666-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 08/22] net/ice/base: remove RSS code as iavf\n\thost", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The DPDK PF doesn't support SRIOV so remove the related iavf host\ncode.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_flow.c | 128 ----------------------------------------\n 1 file changed, 128 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex 7dae53270..5d1b12d43 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,\n \treturn status;\n }\n \n-/* Mapping of AVF hash bit fields to an L3-L4 hash combination.\n- * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash,\n- * convert its values to their appropriate flow L3, L4 values.\n- */\n-#define ICE_FLOW_AVF_RSS_IPV4_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4))\n-#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP))\n-#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP))\n-#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \\\n-\t(ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \\\n-\t ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP))\n-\n-#define ICE_FLOW_AVF_RSS_IPV6_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6))\n-#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP))\n-#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \\\n-\t(BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \\\n-\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP))\n-#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \\\n-\t(ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \\\n-\t ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP))\n-\n-#define ICE_FLOW_MAX_CFG\t10\n-\n-/**\n- * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver\n- * @hw: pointer to the hardware structure\n- * @vsi_handle: software VSI handle\n- * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure\n- *\n- * This function will take the hash bitmap provided by the AVF driver via a\n- * message, convert it to ICE-compatible values, and configure RSS flow\n- * profiles.\n- */\n-enum ice_status\n-ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)\n-{\n-\tenum ice_status status = ICE_SUCCESS;\n-\tu64 hash_flds;\n-\n-\tif (avf_hash == ICE_AVF_FLOW_FIELD_INVALID ||\n-\t !ice_is_vsi_valid(hw, vsi_handle))\n-\t\treturn ICE_ERR_PARAM;\n-\n-\t/* Make sure no unsupported bits are specified */\n-\tif (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS |\n-\t\t\t ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS))\n-\t\treturn ICE_ERR_CFG;\n-\n-\thash_flds = avf_hash;\n-\n-\t/* Always create an L3 RSS configuration for any L4 RSS configuration */\n-\tif (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS)\n-\t\thash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS;\n-\n-\tif (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)\n-\t\thash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS;\n-\n-\t/* Create the corresponding RSS configuration for each valid hash bit */\n-\twhile (hash_flds) {\n-\t\tu64 rss_hash = ICE_HASH_INVALID;\n-\n-\t\tif (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) {\n-\t\t\tif (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV4;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV4 |\n-\t\t\t\t\tICE_FLOW_HASH_TCP_PORT;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV4 |\n-\t\t\t\t\tICE_FLOW_HASH_UDP_PORT;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV4 |\n-\t\t\t\t\tICE_FLOW_HASH_SCTP_PORT;\n-\t\t\t\thash_flds &=\n-\t\t\t\t\t~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP);\n-\t\t\t}\n-\t\t} else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) {\n-\t\t\tif (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV6;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV6 |\n-\t\t\t\t\tICE_FLOW_HASH_TCP_PORT;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV6 |\n-\t\t\t\t\tICE_FLOW_HASH_UDP_PORT;\n-\t\t\t\thash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS;\n-\t\t\t} else if (hash_flds &\n-\t\t\t\t BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) {\n-\t\t\t\trss_hash = ICE_FLOW_HASH_IPV6 |\n-\t\t\t\t\tICE_FLOW_HASH_SCTP_PORT;\n-\t\t\t\thash_flds &=\n-\t\t\t\t\t~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP);\n-\t\t\t}\n-\t\t}\n-\n-\t\tif (rss_hash == ICE_HASH_INVALID)\n-\t\t\treturn ICE_ERR_OUT_OF_RANGE;\n-\n-\t\tstatus = ice_add_rss_cfg(hw, vsi_handle, rss_hash,\n-\t\t\t\t\t ICE_FLOW_SEG_HDR_NONE);\n-\t\tif (status)\n-\t\t\tbreak;\n-\t}\n-\n-\treturn status;\n-}\n-\n /**\n * ice_replay_rss_cfg - replay RSS configurations associated with VSI\n * @hw: pointer to the hardware structure\n", "prefixes": [ "v3", "08/22" ] }