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{
    "id": 57867,
    "url": "http://patches.dpdk.org/api/patches/57867/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190823144602.58213-3-jasvinder.singh@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190823144602.58213-3-jasvinder.singh@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190823144602.58213-3-jasvinder.singh@intel.com",
    "date": "2019-08-23T14:45:49",
    "name": "[02/15] sched: modify internal structs for subport config",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "45717882e55b03ecee93832280351ea8717fe647",
    "submitter": {
        "id": 285,
        "url": "http://patches.dpdk.org/api/people/285/?format=api",
        "name": "Jasvinder Singh",
        "email": "jasvinder.singh@intel.com"
    },
    "delegate": {
        "id": 10018,
        "url": "http://patches.dpdk.org/api/users/10018/?format=api",
        "username": "cristian_dumitrescu",
        "first_name": "Cristian",
        "last_name": "Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190823144602.58213-3-jasvinder.singh@intel.com/mbox/",
    "series": [
        {
            "id": 6115,
            "url": "http://patches.dpdk.org/api/series/6115/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=6115",
            "date": "2019-08-23T14:45:47",
            "name": "sched: subport level configuration of pipe nodes",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/6115/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/57867/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/57867/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id CF7861BFBA;\n\tFri, 23 Aug 2019 16:46:09 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 0F4551BF08\n\tfor <dev@dpdk.org>; Fri, 23 Aug 2019 16:46:04 +0200 (CEST)",
            "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t23 Aug 2019 07:46:04 -0700",
            "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.223.4])\n\tby orsmga001.jf.intel.com with ESMTP; 23 Aug 2019 07:46:03 -0700"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.64,421,1559545200\"; d=\"scan'208\";a=\"263211225\"",
        "From": "Jasvinder Singh <jasvinder.singh@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "cristian.dumitrescu@intel.com,\n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>",
        "Date": "Fri, 23 Aug 2019 15:45:49 +0100",
        "Message-Id": "<20190823144602.58213-3-jasvinder.singh@intel.com>",
        "X-Mailer": "git-send-email 2.21.0",
        "In-Reply-To": "<20190823144602.58213-1-jasvinder.singh@intel.com>",
        "References": "<20190823144602.58213-1-jasvinder.singh@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH 02/15] sched: modify internal structs for subport\n\tconfig",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Update internal structures related to port and subport to allow\ndifferent subports of the same port to have different configuration\nin terms of number of pipes, pipe queue sizes, etc.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n lib/librte_sched/rte_sched.c | 106 ++++++++++++++++++++++++++---------\n 1 file changed, 79 insertions(+), 27 deletions(-)",
    "diff": "diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c\nindex d8ab21d64..6a9990e5e 100644\n--- a/lib/librte_sched/rte_sched.c\n+++ b/lib/librte_sched/rte_sched.c\n@@ -47,33 +47,6 @@\n  */\n #define RTE_SCHED_TIME_SHIFT\t\t      8\n \n-struct rte_sched_subport {\n-\t/* Token bucket (TB) */\n-\tuint64_t tb_time; /* time of last update */\n-\tuint32_t tb_period;\n-\tuint32_t tb_credits_per_period;\n-\tuint32_t tb_size;\n-\tuint32_t tb_credits;\n-\n-\t/* Traffic classes (TCs) */\n-\tuint64_t tc_time; /* time of next update */\n-\tuint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\tuint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n-\tuint32_t tc_period;\n-\n-\t/* TC oversubscription */\n-\tuint32_t tc_ov_wm;\n-\tuint32_t tc_ov_wm_min;\n-\tuint32_t tc_ov_wm_max;\n-\tuint8_t tc_ov_period_id;\n-\tuint8_t tc_ov;\n-\tuint32_t tc_ov_n;\n-\tdouble tc_ov_rate;\n-\n-\t/* Statistics */\n-\tstruct rte_sched_subport_stats stats;\n-};\n-\n struct rte_sched_pipe_profile {\n \t/* Token bucket (TB) */\n \tuint32_t tb_period;\n@@ -166,10 +139,77 @@ struct rte_sched_grinder {\n \tuint8_t wrr_cost[RTE_SCHED_BE_QUEUES_PER_PIPE];\n };\n \n+struct rte_sched_subport {\n+\t/* Token bucket (TB) */\n+\tuint64_t tb_time; /* time of last update */\n+\tuint32_t tb_period;\n+\tuint32_t tb_credits_per_period;\n+\tuint32_t tb_size;\n+\tuint32_t tb_credits;\n+\n+\t/* Traffic classes (TCs) */\n+\tuint64_t tc_time; /* time of next update */\n+\tuint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n+\tuint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n+\tuint32_t tc_period;\n+\n+\t/* TC oversubscription */\n+\tuint32_t tc_ov_wm;\n+\tuint32_t tc_ov_wm_min;\n+\tuint32_t tc_ov_wm_max;\n+\tuint8_t tc_ov_period_id;\n+\tuint8_t tc_ov;\n+\tuint32_t tc_ov_n;\n+\tdouble tc_ov_rate;\n+\n+\t/* Statistics */\n+\tstruct rte_sched_subport_stats stats;\n+\n+\t/* Subport pipes */\n+\tuint32_t n_pipes_per_subport;\n+\tuint32_t n_pipe_profiles;\n+\n+\t/* Pipe best-effort TC rate */\n+\tuint32_t pipe_tc_be_rate_max;\n+\n+\t/* Pipe queues size */\n+\tuint16_t qsize[RTE_SCHED_QUEUES_PER_PIPE];\n+\n+#ifdef RTE_SCHED_RED\n+\tstruct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n+#endif\n+\n+\t/* Scheduling loop detection */\n+\tuint32_t pipe_loop;\n+\tuint32_t pipe_exhaustion;\n+\n+\t/* Bitmap */\n+\tstruct rte_bitmap *bmp;\n+\tuint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;\n+\n+\t/* Grinders */\n+\tstruct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];\n+\tuint32_t busy_grinders;\n+\n+\t/* Queue base calculation */\n+\tuint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];\n+\tuint32_t qsize_sum;\n+\n+\tstruct rte_sched_pipe *pipe;\n+\tstruct rte_sched_queue *queue;\n+\tstruct rte_sched_queue_extra *queue_extra;\n+\tstruct rte_sched_pipe_profile *pipe_profiles;\n+\tuint8_t *bmp_array;\n+\tstruct rte_mbuf **queue_array;\n+\tuint8_t memory[0] __rte_cache_aligned;\n+} __rte_cache_aligned;\n+\n struct rte_sched_port {\n \t/* User parameters */\n \tuint32_t n_subports_per_port;\n \tuint32_t n_pipes_per_subport;\n+\tuint32_t n_max_pipes_per_subport;\n+\tuint32_t n_max_pipes_per_subport_log2;\n \tuint32_t n_pipes_per_subport_log2;\n \tuint16_t pipe_queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n \tuint8_t pipe_tc[RTE_SCHED_QUEUES_PER_PIPE];\n@@ -177,6 +217,7 @@ struct rte_sched_port {\n \tuint32_t rate;\n \tuint32_t mtu;\n \tuint32_t frame_overhead;\n+\tint socket;\n \tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n \tuint32_t n_pipe_profiles;\n \tuint32_t n_max_pipe_profiles;\n@@ -210,6 +251,7 @@ struct rte_sched_port {\n \tuint32_t qsize_sum;\n \n \t/* Large data structures */\n+\tstruct rte_sched_subport *subports[0];\n \tstruct rte_sched_subport *subport;\n \tstruct rte_sched_pipe *pipe;\n \tstruct rte_sched_queue *queue;\n@@ -231,6 +273,16 @@ enum rte_sched_port_array {\n \te_RTE_SCHED_PORT_ARRAY_TOTAL,\n };\n \n+enum rte_sched_subport_array {\n+\te_RTE_SCHED_SUBPORT_ARRAY_PIPE = 0,\n+\te_RTE_SCHED_SUBPORT_ARRAY_QUEUE,\n+\te_RTE_SCHED_SUBPORT_ARRAY_QUEUE_EXTRA,\n+\te_RTE_SCHED_SUBPORT_ARRAY_PIPE_PROFILES,\n+\te_RTE_SCHED_SUBPORT_ARRAY_BMP_ARRAY,\n+\te_RTE_SCHED_SUBPORT_ARRAY_QUEUE_ARRAY,\n+\te_RTE_SCHED_SUBPORT_ARRAY_TOTAL,\n+};\n+\n #ifdef RTE_SCHED_COLLECT_STATS\n \n static inline uint32_t\n",
    "prefixes": [
        "02/15"
    ]
}