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GET /api/patches/56788/?format=api
{ "id": 56788, "url": "http://patches.dpdk.org/api/patches/56788/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190719141825.101844-4-jasvinder.singh@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190719141825.101844-4-jasvinder.singh@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190719141825.101844-4-jasvinder.singh@intel.com", "date": "2019-07-19T14:18:17", "name": "[v6,03/11] sched: add max pipe profiles config in run time", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b75fb0e2acf08260d997af2b3f4ef03eae6a13f9", "submitter": { "id": 285, "url": "http://patches.dpdk.org/api/people/285/?format=api", "name": "Jasvinder Singh", "email": "jasvinder.singh@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190719141825.101844-4-jasvinder.singh@intel.com/mbox/", "series": [ { "id": 5625, "url": "http://patches.dpdk.org/api/series/5625/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5625", "date": "2019-07-19T14:18:14", "name": "sched: feature enhancements", "version": 6, "mbox": "http://patches.dpdk.org/series/5625/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/56788/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/56788/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 3AB051B955;\n\tFri, 19 Jul 2019 16:18:30 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 5E5BE374E\n\tfor <dev@dpdk.org>; Fri, 19 Jul 2019 16:18:21 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t19 Jul 2019 07:18:19 -0700", "from silpixa00381635.ir.intel.com (HELO\n\tsilpixa00381635.ger.corp.intel.com) ([10.237.223.4])\n\tby orsmga008.jf.intel.com with ESMTP; 19 Jul 2019 07:18:19 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,282,1559545200\"; d=\"scan'208\";a=\"162417177\"", "From": "Jasvinder Singh <jasvinder.singh@intel.com>", "To": "dev@dpdk.org", "Cc": "cristian.dumitrescu@intel.com, Abraham Tovar <abrahamx.tovar@intel.com>, \n\tLukasz Krakowiak <lukaszx.krakowiak@intel.com>", "Date": "Fri, 19 Jul 2019 15:18:17 +0100", "Message-Id": "<20190719141825.101844-4-jasvinder.singh@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190719141825.101844-1-jasvinder.singh@intel.com>", "References": "<20190717144245.138876-2-jasvinder.singh@intel.com>\n\t<20190719141825.101844-1-jasvinder.singh@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v6 03/11] sched: add max pipe profiles config in\n\trun time", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Allow setting the maximum number of pipe profiles in run time.\n\nSigned-off-by: Jasvinder Singh <jasvinder.singh@intel.com>\nSigned-off-by: Abraham Tovar <abrahamx.tovar@intel.com>\nSigned-off-by: Lukasz Krakowiak <lukaszx.krakowiak@intel.com>\n---\n lib/librte_sched/rte_sched.c | 8 +++++---\n lib/librte_sched/rte_sched.h | 2 ++\n 2 files changed, 7 insertions(+), 3 deletions(-)", "diff": "diff --git a/lib/librte_sched/rte_sched.c b/lib/librte_sched/rte_sched.c\nindex 17d7f833c..e8614ba4c 100644\n--- a/lib/librte_sched/rte_sched.c\n+++ b/lib/librte_sched/rte_sched.c\n@@ -179,6 +179,7 @@ struct rte_sched_port {\n \tuint32_t frame_overhead;\n \tuint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];\n \tuint32_t n_pipe_profiles;\n+\tuint32_t n_max_pipe_profiles;\n \tuint32_t pipe_tc3_rate_max;\n #ifdef RTE_SCHED_RED\n \tstruct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS];\n@@ -380,7 +381,7 @@ rte_sched_port_check_params(struct rte_sched_port_params *params)\n \t/* pipe_profiles and n_pipe_profiles */\n \tif (params->pipe_profiles == NULL ||\n \t params->n_pipe_profiles == 0 ||\n-\t params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)\n+\t params->n_pipe_profiles > params->n_max_pipe_profiles)\n \t\treturn -9;\n \n \tfor (i = 0; i < params->n_pipe_profiles; i++) {\n@@ -409,7 +410,7 @@ rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sch\n \tuint32_t size_queue_extra\n \t\t= n_queues_per_port * sizeof(struct rte_sched_queue_extra);\n \tuint32_t size_pipe_profiles\n-\t\t= RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);\n+\t\t= params->n_max_pipe_profiles * sizeof(struct rte_sched_pipe_profile);\n \tuint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);\n \tuint32_t size_per_pipe_queue_array, size_queue_array;\n \n@@ -686,6 +687,7 @@ rte_sched_port_config(struct rte_sched_port_params *params)\n \tport->frame_overhead = params->frame_overhead;\n \tmemcpy(port->qsize, params->qsize, sizeof(params->qsize));\n \tport->n_pipe_profiles = params->n_pipe_profiles;\n+\tport->n_max_pipe_profiles = params->n_max_pipe_profiles;\n \n #ifdef RTE_SCHED_RED\n \tfor (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {\n@@ -1037,7 +1039,7 @@ rte_sched_port_pipe_profile_add(struct rte_sched_port *port,\n \t\treturn -1;\n \n \t/* Pipe profiles not exceeds the max limit */\n-\tif (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)\n+\tif (port->n_pipe_profiles >= port->n_max_pipe_profiles)\n \t\treturn -2;\n \n \t/* Pipe params */\ndiff --git a/lib/librte_sched/rte_sched.h b/lib/librte_sched/rte_sched.h\nindex 2b65420d1..d7d4f1767 100644\n--- a/lib/librte_sched/rte_sched.h\n+++ b/lib/librte_sched/rte_sched.h\n@@ -220,6 +220,8 @@ struct rte_sched_port_params {\n \t/**< Pipe profile table.\n \t * Every pipe is configured using one of the profiles from this table. */\n \tuint32_t n_pipe_profiles; /**< Profiles in the pipe profile table */\n+\tuint32_t n_max_pipe_profiles;\n+\t/**< Max profiles allowed in the pipe profile table */\n #ifdef RTE_SCHED_RED\n \tstruct rte_red_params red_params[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][RTE_COLORS]; /**< RED parameters */\n #endif\n", "prefixes": [ "v6", "03/11" ] }