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GET /api/patches/56058/?format=api
{ "id": 56058, "url": "http://patches.dpdk.org/api/patches/56058/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190704021940.3023-5-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190704021940.3023-5-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190704021940.3023-5-pbhagavatula@marvell.com", "date": "2019-07-04T02:19:38", "name": "[v4,4/5] event/octeontx2: add PTP support for SSO", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "77c635760d041e16221560d89470ae4502b2481b", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190704021940.3023-5-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 5323, "url": "http://patches.dpdk.org/api/series/5323/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5323", "date": "2019-07-04T02:19:34", "name": "event/octeontx2: add Rx/Tx adapter support", "version": 4, "mbox": "http://patches.dpdk.org/series/5323/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/56058/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/56058/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6C30D1B197;\n\tThu, 4 Jul 2019 04:20:00 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B5FA95B3A\n\tfor <dev@dpdk.org>; Thu, 4 Jul 2019 04:19:58 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx642FiFQ016481 for <dev@dpdk.org>; Wed, 3 Jul 2019 19:19:58 -0700", "from sc-exch02.marvell.com ([199.233.58.182])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2tgtf73bbr-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Wed, 03 Jul 2019 19:19:58 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com\n\t(10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tWed, 3 Jul 2019 19:19:56 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Wed, 3 Jul 2019 19:19:56 -0700", "from BG-LT7430.marvell.com (unknown [10.28.17.42])\n\tby maili.marvell.com (Postfix) with ESMTP id 3B3453F703F;\n\tWed, 3 Jul 2019 19:19:53 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=rUFPglhdbcGGh5bgER3YQ++pxy5JWQDra9D0yJigX68=;\n\tb=B9bOLtpZZppt1Dyvr7BrELuQB94KFmghgZ/8nBhEzp1GReBdS9dYpdbWpc+uYvJJZpZe\n\tkEjEYv9gr4XmFRS9PWrCEb7XmSTvPnWr7OxThd2ixtUkjORxN92jt1a2jMRcJd/4Z8EU\n\tWN1xda/nPnIKMUTKiat0mU0Alg9acLz+UuY/iL1z2joZ/6R9S1KeO8pdvJaQxvcOrUsd\n\tZOdE02+4kpvB4aTrCxj0YNHXUxytmYUviqnzLJoj7oZ19slLz+cuP+v3+g2s8KXYwaOf\n\t7UKWjAQQ+0RZrwTw1cJQAnToZy+oD3czrNvO307zSceSupkcVn73Xx3KDeNOi8BtbOjV\n\tZw== ", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>", "CC": "<dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>", "Date": "Thu, 4 Jul 2019 07:49:38 +0530", "Message-ID": "<20190704021940.3023-5-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20190704021940.3023-1-pbhagavatula@marvell.com>", "References": "<20190704021940.3023-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-07-04_01:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v4 4/5] event/octeontx2: add PTP support for SSO", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Harman Kalra <hkalra@marvell.com>\n\nAdd PTP support for SSO based on rx_offloads of the queue connected to\nit.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/octeontx2/otx2_evdev.c | 2 ++\n drivers/event/octeontx2/otx2_evdev.h | 6 ++++++\n drivers/event/octeontx2/otx2_evdev_adptr.c | 1 +\n drivers/event/octeontx2/otx2_worker.h | 6 ++++++\n drivers/event/octeontx2/otx2_worker_dual.c | 18 ++++++++++++------\n drivers/event/octeontx2/otx2_worker_dual.h | 5 ++++-\n 6 files changed, 31 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c\nindex f45fc008d..ca75e4215 100644\n--- a/drivers/event/octeontx2/otx2_evdev.c\n+++ b/drivers/event/octeontx2/otx2_evdev.c\n@@ -1095,6 +1095,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,\n \t\t\t sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP);\n \t\tws->fc_mem = dev->fc_mem;\n \t\tws->xaq_lmt = dev->xaq_lmt;\n+\t\tws->tstamp = dev->tstamp;\n \t\totx2_write64(val, OTX2_SSOW_GET_BASE_ADDR(\n \t\t\t ws->ws_state[0].getwrk_op) + SSOW_LF_GWS_NW_TIM);\n \t\totx2_write64(val, OTX2_SSOW_GET_BASE_ADDR(\n@@ -1107,6 +1108,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,\n \t\t\t sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP);\n \t\tws->fc_mem = dev->fc_mem;\n \t\tws->xaq_lmt = dev->xaq_lmt;\n+\t\tws->tstamp = dev->tstamp;\n \t\totx2_write64(val, base + SSOW_LF_GWS_NW_TIM);\n \t}\n \ndiff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h\nindex a81a8be6f..2df9ec468 100644\n--- a/drivers/event/octeontx2/otx2_evdev.h\n+++ b/drivers/event/octeontx2/otx2_evdev.h\n@@ -149,6 +149,8 @@ struct otx2_sso_evdev {\n \t/* MSIX offsets */\n \tuint16_t sso_msixoff[OTX2_SSO_MAX_VHGRP];\n \tuint16_t ssow_msixoff[OTX2_SSO_MAX_VHWS];\n+\t/* PTP timestamp */\n+\tstruct otx2_timesync_info *tstamp;\n } __rte_cache_aligned;\n \n #define OTX2_SSOGWS_OPS \\\n@@ -173,6 +175,8 @@ struct otx2_ssogws {\n \tuint64_t xaq_lmt __rte_cache_aligned;\n \tuint64_t *fc_mem;\n \tuintptr_t grps_base[OTX2_SSO_MAX_VHGRP];\n+\t/* PTP timestamp */\n+\tstruct otx2_timesync_info *tstamp;\n } __rte_cache_aligned;\n \n struct otx2_ssogws_state {\n@@ -190,6 +194,8 @@ struct otx2_ssogws_dual {\n \tuint64_t xaq_lmt __rte_cache_aligned;\n \tuint64_t *fc_mem;\n \tuintptr_t grps_base[OTX2_SSO_MAX_VHGRP];\n+\t/* PTP timestamp */\n+\tstruct otx2_timesync_info *tstamp;\n } __rte_cache_aligned;\n \n static inline struct otx2_sso_evdev *\ndiff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c\nindex e605fd1d4..e5aaa67b6 100644\n--- a/drivers/event/octeontx2/otx2_evdev_adptr.c\n+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c\n@@ -297,6 +297,7 @@ otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,\n \t}\n \n \tdev->rx_offloads |= otx2_eth_dev->rx_offload_flags;\n+\tdev->tstamp = &otx2_eth_dev->tstamp;\n \tsso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);\n \n \treturn 0;\ndiff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h\nindex accf7f956..1e1e947ef 100644\n--- a/drivers/event/octeontx2/otx2_worker.h\n+++ b/drivers/event/octeontx2/otx2_worker.h\n@@ -68,6 +68,9 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,\n \t event.event_type == RTE_EVENT_TYPE_ETHDEV) {\n \t\totx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,\n \t\t\t\t (uint32_t) event.get_work0, flags, lookup_mem);\n+\t\t/* Extracting tstamp, if PTP enabled*/\n+\t\totx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,\n+\t\t\t\t\tflags);\n \t\tget_work1 = mbuf;\n \t}\n \n@@ -127,6 +130,9 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev,\n \t event.event_type == RTE_EVENT_TYPE_ETHDEV) {\n \t\totx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,\n \t\t\t\t (uint32_t) event.get_work0, flags, NULL);\n+\t\t/* Extracting tstamp, if PTP enabled*/\n+\t\totx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,\n+\t\t\t\t\tflags);\n \t\tget_work1 = mbuf;\n \t}\n \ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c\nindex b5cf9ac12..cbe03c1bb 100644\n--- a/drivers/event/octeontx2/otx2_worker_dual.c\n+++ b/drivers/event/octeontx2/otx2_worker_dual.c\n@@ -158,7 +158,8 @@ otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev,\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n \t\t\t\t &ws->ws_state[!ws->vws], ev,\t\\\n-\t\t\t\t flags, ws->lookup_mem);\t\t\\\n+\t\t\t\t flags, ws->lookup_mem,\t\t\\\n+\t\t\t\t ws->tstamp);\t\t\t\\\n \tws->vws = !ws->vws;\t\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \treturn gw;\t\t\t\t\t\t\t\\\n@@ -191,13 +192,15 @@ otx2_ssogws_dual_deq_timeout_ ##name(void *port, struct rte_event *ev,\t\\\n \t\t\t\t\t\t\t\t\t\\\n \tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n \t\t\t\t &ws->ws_state[!ws->vws], ev,\t\\\n-\t\t\t\t flags, ws->lookup_mem);\t\t\\\n+\t\t\t\t flags, ws->lookup_mem,\t\t\\\n+\t\t\t\t ws->tstamp);\t\t\t\\\n \tws->vws = !ws->vws;\t\t\t\t\t\t\\\n \tfor (iter = 1; iter < timeout_ticks && (gw == 0); iter++) {\t\\\n \t\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\\\n \t\t\t\t\t &ws->ws_state[!ws->vws],\t\\\n \t\t\t\t\t ev, flags,\t\t\\\n-\t\t\t\t\t ws->lookup_mem);\t\t\\\n+\t\t\t\t\t ws->lookup_mem,\t\t\\\n+\t\t\t\t\t ws->tstamp);\t\t\\\n \t\tws->vws = !ws->vws;\t\t\t\t\t\\\n \t}\t\t\t\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n@@ -234,7 +237,8 @@ otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev,\t\\\n \tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n \t\t\t\t &ws->ws_state[!ws->vws], ev,\t\\\n \t\t\t\t flags | NIX_RX_MULTI_SEG_F,\t\\\n-\t\t\t\t ws->lookup_mem);\t\t\t\\\n+\t\t\t\t ws->lookup_mem,\t\t\t\\\n+\t\t\t\t ws->tstamp);\t\t\t\\\n \tws->vws = !ws->vws;\t\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\n \treturn gw;\t\t\t\t\t\t\t\\\n@@ -271,14 +275,16 @@ otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port,\t\t\t\\\n \tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\t\\\n \t\t\t\t &ws->ws_state[!ws->vws], ev,\t\\\n \t\t\t\t flags | NIX_RX_MULTI_SEG_F,\t\\\n-\t\t\t\t ws->lookup_mem);\t\t\t\\\n+\t\t\t\t ws->lookup_mem,\t\t\t\\\n+\t\t\t\t ws->tstamp);\t\t\t\\\n \tws->vws = !ws->vws;\t\t\t\t\t\t\\\n \tfor (iter = 1; iter < timeout_ticks && (gw == 0); iter++) {\t\\\n \t\tgw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws],\t\\\n \t\t\t\t\t &ws->ws_state[!ws->vws],\t\\\n \t\t\t\t\t ev, flags |\t\t\\\n \t\t\t\t\t NIX_RX_MULTI_SEG_F,\t\\\n-\t\t\t\t\t ws->lookup_mem);\t\t\\\n+\t\t\t\t\t ws->lookup_mem,\t\t\\\n+\t\t\t\t\t ws->tstamp);\t\t\\\n \t\tws->vws = !ws->vws;\t\t\t\t\t\\\n \t}\t\t\t\t\t\t\t\t\\\n \t\t\t\t\t\t\t\t\t\\\ndiff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h\nindex 32fe61b44..4a72f424d 100644\n--- a/drivers/event/octeontx2/otx2_worker_dual.h\n+++ b/drivers/event/octeontx2/otx2_worker_dual.h\n@@ -16,7 +16,8 @@ static __rte_always_inline uint16_t\n otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \t\t\t struct otx2_ssogws_state *ws_pair,\n \t\t\t struct rte_event *ev, const uint32_t flags,\n-\t\t\t const void * const lookup_mem)\n+\t\t\t const void * const lookup_mem,\n+\t\t\t struct otx2_timesync_info * const tstamp)\n {\n \tconst uint64_t set_gw = BIT_ULL(16) | 1;\n \tunion otx2_sso_event event;\n@@ -69,6 +70,8 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,\n \t event.event_type == RTE_EVENT_TYPE_ETHDEV) {\n \t\totx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,\n \t\t\t\t (uint32_t) event.get_work0, flags, lookup_mem);\n+\t\t/* Extracting tstamp, if PTP enabled*/\n+\t\totx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags);\n \t\tget_work1 = mbuf;\n \t}\n \n", "prefixes": [ "v4", "4/5" ] }