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GET /api/patches/55713/?format=api
{ "id": 55713, "url": "http://patches.dpdk.org/api/patches/55713/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-45-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190630180609.36705-45-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190630180609.36705-45-jerinj@marvell.com", "date": "2019-06-30T18:05:56", "name": "[v2,44/57] net/octeontx2: support VLAN offloads", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d9370b0a23eb5495c3084d1d2d2dd2a047e5a9a0", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-45-jerinj@marvell.com/mbox/", "series": [ { "id": 5236, "url": "http://patches.dpdk.org/api/series/5236/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5236", "date": "2019-06-30T18:05:12", "name": "OCTEON TX2 Ethdev driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5236/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55713/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/55713/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C81371BBD4;\n\tSun, 30 Jun 2019 20:10:33 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id C12171BABD\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 20:08:48 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5UI5FMg027215; Sun, 30 Jun 2019 11:08:48 -0700", "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2te5bn4gnb-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tSun, 30 Jun 2019 11:08:47 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 30 Jun 2019 11:08:46 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 30 Jun 2019 11:08:46 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id 6275D3F703F;\n\tSun, 30 Jun 2019 11:08:44 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=7zhVbL+BrmU9w49eb3n4Ak+UBhKFz/xL5IVwDo2ruY0=;\n\tb=CuPeKW11AxxHCbGeoMNFuboYQ/r6GE2+HrLzQBIlb7YalunyXcbI8oD5GM6C3ZfMTYjS\n\tX4qseYenX/AEindODlQKQsuM4R+RIy3KGRlkf4QOelnKtBmuMerk+sJpK/oqoy5mQFct\n\t+quVOIdv39er2j5/M6sDjRKOr5K+wy+sDTaDaT6SAfQe81W+LJ4jBRUnG1U5PAF05pzy\n\tr/vTQYoaN9DN1EcI+AYrLhLzVWHWvAEQD2itOzXoUiyQLstONJq7Vf1dCohdr9xx3sQp\n\tBpw33fSxucC9ASEfoRwRdL1BDs4r5eGzXJVP1u4ZE0X5SBvl+ZXNLejkApKPF+V/sv5D\n\t6Q== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, John McNamara <john.mcnamara@intel.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Jerin Jacob <jerinj@marvell.com>, \"Nithin\n\tDabilpuram\" <ndabilpuram@marvell.com>, Kiran Kumar K\n\t<kirankumark@marvell.com>", "CC": "Vivek Sharma <viveksharma@marvell.com>", "Date": "Sun, 30 Jun 2019 23:35:56 +0530", "Message-ID": "<20190630180609.36705-45-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190630180609.36705-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>\n\t<20190630180609.36705-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-30_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 44/57] net/octeontx2: support VLAN offloads", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Vivek Sharma <viveksharma@marvell.com>\n\nSupport configuring VLAN offloads for an ethernet device and\ndynamic promiscuous mode configuration for VLAN filters where\nfilters are updated according to promiscuous mode of the device.\n\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n doc/guides/nics/features/octeontx2.ini | 2 +\n doc/guides/nics/features/octeontx2_vec.ini | 2 +\n doc/guides/nics/features/octeontx2_vf.ini | 2 +\n doc/guides/nics/octeontx2.rst | 1 +\n drivers/net/octeontx2/otx2_ethdev.c | 1 +\n drivers/net/octeontx2/otx2_ethdev.h | 3 +\n drivers/net/octeontx2/otx2_ethdev_ops.c | 1 +\n drivers/net/octeontx2/otx2_rx.h | 1 +\n drivers/net/octeontx2/otx2_vlan.c | 523 ++++++++++++++++++++-\n 9 files changed, 527 insertions(+), 9 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/octeontx2.ini b/doc/guides/nics/features/octeontx2.ini\nindex 33d2f2785..ac4712b0c 100644\n--- a/doc/guides/nics/features/octeontx2.ini\n+++ b/doc/guides/nics/features/octeontx2.ini\n@@ -23,6 +23,8 @@ RSS reta update = Y\n Inner RSS = Y\n Flow control = Y\n Flow API = Y\n+VLAN offload = Y\n+QinQ offload = Y\n Packet type parsing = Y\n Timesync = Y\n Timestamp offload = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vec.ini b/doc/guides/nics/features/octeontx2_vec.ini\nindex 980a4daf9..e54c1babe 100644\n--- a/doc/guides/nics/features/octeontx2_vec.ini\n+++ b/doc/guides/nics/features/octeontx2_vec.ini\n@@ -23,6 +23,8 @@ RSS reta update = Y\n Inner RSS = Y\n Flow control = Y\n Flow API = Y\n+VLAN offload = Y\n+QinQ offload = Y\n Packet type parsing = Y\n Rx descriptor status = Y\n Basic stats = Y\ndiff --git a/doc/guides/nics/features/octeontx2_vf.ini b/doc/guides/nics/features/octeontx2_vf.ini\nindex 330534a90..769ab16ee 100644\n--- a/doc/guides/nics/features/octeontx2_vf.ini\n+++ b/doc/guides/nics/features/octeontx2_vf.ini\n@@ -18,6 +18,8 @@ RSS key update = Y\n RSS reta update = Y\n Inner RSS = Y\n Flow API = Y\n+VLAN offload = Y\n+QinQ offload = Y\n Packet type parsing = Y\n Rx descriptor status = Y\n Basic stats = Y\ndiff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst\nindex 0f1756932..a53b71a6d 100644\n--- a/doc/guides/nics/octeontx2.rst\n+++ b/doc/guides/nics/octeontx2.rst\n@@ -24,6 +24,7 @@ Features of the OCTEON TX2 Ethdev PMD are:\n - Receiver Side Scaling (RSS)\n - MAC filtering\n - Generic flow API\n+- VLAN/QinQ stripping and insertion\n - Port hardware statistics\n - Link state information\n - Link flow control\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c\nindex 48c2e8f57..55a5cdc48 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.c\n+++ b/drivers/net/octeontx2/otx2_ethdev.c\n@@ -1345,6 +1345,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {\n \t.timesync_adjust_time = otx2_nix_timesync_adjust_time,\n \t.timesync_read_time = otx2_nix_timesync_read_time,\n \t.timesync_write_time = otx2_nix_timesync_write_time,\n+\t.vlan_offload_set = otx2_nix_vlan_offload_set,\n };\n \n static inline int\ndiff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h\nindex 8577272b4..50fd18b6e 100644\n--- a/drivers/net/octeontx2/otx2_ethdev.h\n+++ b/drivers/net/octeontx2/otx2_ethdev.h\n@@ -221,6 +221,7 @@ struct otx2_vlan_info {\n \tuint8_t filter_on;\n \tuint8_t strip_on;\n \tuint8_t qinq_on;\n+\tuint8_t promisc_on;\n };\n \n struct otx2_eth_dev {\n@@ -447,6 +448,8 @@ int otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev);\n /* VLAN */\n int otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev);\n int otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev);\n+int otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);\n+void otx2_nix_vlan_update_promisc(struct rte_eth_dev *eth_dev, int enable);\n \n /* Lookup configuration */\n void *otx2_nix_fastpath_lookup_mem_get(void);\ndiff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c\nindex e55acd4e0..690d8ac0c 100644\n--- a/drivers/net/octeontx2/otx2_ethdev_ops.c\n+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c\n@@ -40,6 +40,7 @@ otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en)\n \n \totx2_mbox_process(mbox);\n \teth_dev->data->promiscuous = en;\n+\totx2_nix_vlan_update_promisc(eth_dev, en);\n }\n \n void\ndiff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h\nindex e18e04658..7dc34d705 100644\n--- a/drivers/net/octeontx2/otx2_rx.h\n+++ b/drivers/net/octeontx2/otx2_rx.h\n@@ -16,6 +16,7 @@\n \t\t\t\t\t sizeof(uint16_t))\n \n #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)\n+#define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(3)\n #define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4)\n #define NIX_RX_OFFLOAD_TSTAMP_F BIT(5)\n \ndiff --git a/drivers/net/octeontx2/otx2_vlan.c b/drivers/net/octeontx2/otx2_vlan.c\nindex b3136d2cf..7cf4f3136 100644\n--- a/drivers/net/octeontx2/otx2_vlan.c\n+++ b/drivers/net/octeontx2/otx2_vlan.c\n@@ -14,6 +14,7 @@\n #define MAC_ADDR_MATCH\t0x4\n #define QINQ_F_MATCH\t0x8\n #define VLAN_DROP\t0x10\n+#define DEF_F_ENTRY\t0x20\n \n enum vtag_cfg_dir {\n \tVTAG_TX,\n@@ -39,8 +40,50 @@ __rte_unused nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,\n \treturn rc;\n }\n \n+static void\n+nix_set_rx_vlan_action(struct rte_eth_dev *eth_dev,\n+\t\t struct mcam_entry *entry, bool qinq, bool drop)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tint pcifunc = otx2_pfvf_func(dev->pf, dev->vf);\n+\tuint64_t action = 0, vtag_action = 0;\n+\n+\taction = NIX_RX_ACTIONOP_UCAST;\n+\n+\tif (eth_dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {\n+\t\taction = NIX_RX_ACTIONOP_RSS;\n+\t\taction |= (uint64_t)(dev->rss_info.alg_idx) << 56;\n+\t}\n+\n+\taction |= (uint64_t)pcifunc << 4;\n+\tentry->action = action;\n+\n+\tif (drop) {\n+\t\tentry->action &= ~((uint64_t)0xF);\n+\t\tentry->action |= NIX_RX_ACTIONOP_DROP;\n+\t\treturn;\n+\t}\n+\n+\tif (!qinq) {\n+\t\t/* VTAG0 fields denote CTAG in single vlan case */\n+\t\tvtag_action |= (NIX_RX_VTAGACTION_VTAG_VALID << 15);\n+\t\tvtag_action |= (NPC_LID_LB << 8);\n+\t\tvtag_action |= NIX_RX_VTAGACTION_VTAG0_RELPTR;\n+\t} else {\n+\t\t/* VTAG0 & VTAG1 fields denote CTAG & STAG respectively */\n+\t\tvtag_action |= (NIX_RX_VTAGACTION_VTAG_VALID << 15);\n+\t\tvtag_action |= (NPC_LID_LB << 8);\n+\t\tvtag_action |= NIX_RX_VTAGACTION_VTAG1_RELPTR;\n+\t\tvtag_action |= (NIX_RX_VTAGACTION_VTAG_VALID << 47);\n+\t\tvtag_action |= ((uint64_t)(NPC_LID_LB) << 40);\n+\t\tvtag_action |= (NIX_RX_VTAGACTION_VTAG0_RELPTR << 32);\n+\t}\n+\n+\tentry->vtag_action = vtag_action;\n+}\n+\n static int\n-__rte_unused nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)\n+nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)\n {\n \tstruct npc_mcam_free_entry_req *req;\n \tstruct otx2_mbox *mbox = dev->mbox;\n@@ -54,8 +97,8 @@ __rte_unused nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)\n }\n \n static int\n-__rte_unused nix_vlan_mcam_write(struct rte_eth_dev *eth_dev, uint16_t ent_idx,\n-\t\t\t\t struct mcam_entry *entry, uint8_t intf)\n+nix_vlan_mcam_write(struct rte_eth_dev *eth_dev, uint16_t ent_idx,\n+\t\t struct mcam_entry *entry, uint8_t intf, uint8_t ena)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tstruct npc_mcam_write_entry_req *req;\n@@ -67,7 +110,7 @@ __rte_unused nix_vlan_mcam_write(struct rte_eth_dev *eth_dev, uint16_t ent_idx,\n \n \treq->entry = ent_idx;\n \treq->intf = intf;\n-\treq->enable_entry = 1;\n+\treq->enable_entry = ena;\n \tmemcpy(&req->entry_data, entry, sizeof(struct mcam_entry));\n \n \trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n@@ -75,9 +118,9 @@ __rte_unused nix_vlan_mcam_write(struct rte_eth_dev *eth_dev, uint16_t ent_idx,\n }\n \n static int\n-__rte_unused nix_vlan_mcam_alloc_and_write(struct rte_eth_dev *eth_dev,\n-\t\t\t\t\t struct mcam_entry *entry,\n-\t\t\t\t\t uint8_t intf, bool drop)\n+nix_vlan_mcam_alloc_and_write(struct rte_eth_dev *eth_dev,\n+\t\t\t struct mcam_entry *entry,\n+\t\t\t uint8_t intf, bool drop)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n \tstruct npc_mcam_alloc_and_write_entry_req *req;\n@@ -114,6 +157,443 @@ __rte_unused nix_vlan_mcam_alloc_and_write(struct rte_eth_dev *eth_dev,\n \treturn rsp->entry;\n }\n \n+static void\n+nix_vlan_update_mac(struct rte_eth_dev *eth_dev, int mcam_index,\n+\t\t\t int enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct vlan_mkex_info *mkex = &dev->vlan_info.mkex;\n+\tvolatile uint8_t *key_data, *key_mask;\n+\tstruct npc_mcam_read_entry_req *req;\n+\tstruct npc_mcam_read_entry_rsp *rsp;\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tuint64_t mcam_data, mcam_mask;\n+\tstruct mcam_entry entry;\n+\tuint8_t intf, mcam_ena;\n+\tint idx, rc = -EINVAL;\n+\tuint8_t *mac_addr;\n+\n+\tmemset(&entry, 0, sizeof(struct mcam_entry));\n+\n+\t/* Read entry first */\n+\treq = otx2_mbox_alloc_msg_npc_mcam_read_entry(mbox);\n+\n+\treq->entry = mcam_index;\n+\n+\trc = otx2_mbox_process_msg(mbox, (void *)&rsp);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to read entry %d\", mcam_index);\n+\t\treturn;\n+\t}\n+\n+\tentry = rsp->entry_data;\n+\tintf = rsp->intf;\n+\tmcam_ena = rsp->enable;\n+\n+\t/* Update mcam address */\n+\tkey_data = (volatile uint8_t *)entry.kw;\n+\tkey_mask = (volatile uint8_t *)entry.kw_mask;\n+\n+\tif (enable) {\n+\t\tmcam_mask = 0;\n+\t\totx2_mbox_memcpy(key_mask + mkex->la_xtract.key_off,\n+\t\t\t\t &mcam_mask, mkex->la_xtract.len + 1);\n+\n+\t} else {\n+\t\tmcam_data = 0ULL;\n+\t\tmac_addr = dev->mac_addr;\n+\t\tfor (idx = RTE_ETHER_ADDR_LEN - 1; idx >= 0; idx--)\n+\t\t\tmcam_data |= ((uint64_t)*mac_addr++) << (8 * idx);\n+\n+\t\tmcam_mask = BIT_ULL(48) - 1;\n+\n+\t\totx2_mbox_memcpy(key_data + mkex->la_xtract.key_off,\n+\t\t\t\t &mcam_data, mkex->la_xtract.len + 1);\n+\t\totx2_mbox_memcpy(key_mask + mkex->la_xtract.key_off,\n+\t\t\t\t &mcam_mask, mkex->la_xtract.len + 1);\n+\t}\n+\n+\t/* Write back the mcam entry */\n+\trc = nix_vlan_mcam_write(eth_dev, mcam_index,\n+\t\t\t\t &entry, intf, mcam_ena);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to write entry %d\", mcam_index);\n+\t\treturn;\n+\t}\n+}\n+\n+void\n+otx2_nix_vlan_update_promisc(struct rte_eth_dev *eth_dev, int enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tstruct vlan_entry *entry;\n+\n+\t/* Already in required mode */\n+\tif (enable == vlan->promisc_on)\n+\t\treturn;\n+\n+\t/* Update default rx entry */\n+\tif (vlan->def_rx_mcam_idx)\n+\t\tnix_vlan_update_mac(eth_dev, vlan->def_rx_mcam_idx, enable);\n+\n+\t/* Update all other rx filter entries */\n+\tTAILQ_FOREACH(entry, &vlan->fltr_tbl, next)\n+\t\tnix_vlan_update_mac(eth_dev, entry->mcam_idx, enable);\n+\n+\tvlan->promisc_on = enable;\n+}\n+\n+/* Configure mcam entry with required MCAM search rules */\n+static int\n+nix_vlan_mcam_config(struct rte_eth_dev *eth_dev,\n+\t\t uint16_t vlan_id, uint16_t flags)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct vlan_mkex_info *mkex = &dev->vlan_info.mkex;\n+\tvolatile uint8_t *key_data, *key_mask;\n+\tuint64_t mcam_data, mcam_mask;\n+\tstruct mcam_entry entry;\n+\tuint8_t *mac_addr;\n+\tint idx, kwi = 0;\n+\n+\tmemset(&entry, 0, sizeof(struct mcam_entry));\n+\tkey_data = (volatile uint8_t *)entry.kw;\n+\tkey_mask = (volatile uint8_t *)entry.kw_mask;\n+\n+\t/* Channel base extracted to KW0[11:0] */\n+\tentry.kw[kwi] = dev->rx_chan_base;\n+\tentry.kw_mask[kwi] = BIT_ULL(12) - 1;\n+\n+\t/* Adds vlan_id & LB CTAG flag to MCAM KW */\n+\tif (flags & VLAN_ID_MATCH) {\n+\t\tentry.kw[kwi] |= NPC_LT_LB_CTAG << mkex->lb_lt_offset;\n+\t\tentry.kw_mask[kwi] |= 0xFULL << mkex->lb_lt_offset;\n+\n+\t\tmcam_data = (vlan_id << 16);\n+\t\tmcam_mask = (BIT_ULL(16) - 1) << 16;\n+\t\totx2_mbox_memcpy(key_data + mkex->lb_xtract.key_off,\n+\t\t\t\t &mcam_data, mkex->lb_xtract.len + 1);\n+\t\totx2_mbox_memcpy(key_mask + mkex->lb_xtract.key_off,\n+\t\t\t\t &mcam_mask, mkex->lb_xtract.len + 1);\n+\t}\n+\n+\t/* Adds LB STAG flag to MCAM KW */\n+\tif (flags & QINQ_F_MATCH) {\n+\t\tentry.kw[kwi] |= NPC_LT_LB_STAG << mkex->lb_lt_offset;\n+\t\tentry.kw_mask[kwi] |= 0xFULL << mkex->lb_lt_offset;\n+\t}\n+\n+\t/* Adds LB CTAG & LB STAG flags to MCAM KW */\n+\tif (flags & VTAG_F_MATCH) {\n+\t\tentry.kw[kwi] |= (NPC_LT_LB_CTAG | NPC_LT_LB_STAG)\n+\t\t\t\t\t\t\t<< mkex->lb_lt_offset;\n+\t\tentry.kw_mask[kwi] |= (NPC_LT_LB_CTAG & NPC_LT_LB_STAG)\n+\t\t\t\t\t\t\t<< mkex->lb_lt_offset;\n+\t}\n+\n+\t/* Adds port MAC address to MCAM KW */\n+\tif (flags & MAC_ADDR_MATCH) {\n+\t\tmcam_data = 0ULL;\n+\t\tmac_addr = dev->mac_addr;\n+\t\tfor (idx = RTE_ETHER_ADDR_LEN - 1; idx >= 0; idx--)\n+\t\t\tmcam_data |= ((uint64_t)*mac_addr++) << (8 * idx);\n+\n+\t\tmcam_mask = BIT_ULL(48) - 1;\n+\t\totx2_mbox_memcpy(key_data + mkex->la_xtract.key_off,\n+\t\t\t\t &mcam_data, mkex->la_xtract.len + 1);\n+\t\totx2_mbox_memcpy(key_mask + mkex->la_xtract.key_off,\n+\t\t\t\t &mcam_mask, mkex->la_xtract.len + 1);\n+\t}\n+\n+\t/* VLAN_DROP: for drop action for all vlan packets when filter is on.\n+\t * For QinQ, enable vtag action for both outer & inner tags\n+\t */\n+\tif (flags & VLAN_DROP)\n+\t\tnix_set_rx_vlan_action(eth_dev, &entry, false, true);\n+\telse if (flags & QINQ_F_MATCH)\n+\t\tnix_set_rx_vlan_action(eth_dev, &entry, true, false);\n+\telse\n+\t\tnix_set_rx_vlan_action(eth_dev, &entry, false, false);\n+\n+\tif (flags & DEF_F_ENTRY)\n+\t\tdev->vlan_info.def_rx_mcam_ent = entry;\n+\n+\treturn nix_vlan_mcam_alloc_and_write(eth_dev, &entry, NIX_INTF_RX,\n+\t\t\t\t\t flags & VLAN_DROP);\n+}\n+\n+/* Installs/Removes/Modifies default rx entry */\n+static int\n+nix_vlan_handle_default_rx_entry(struct rte_eth_dev *eth_dev, bool strip,\n+\t\t\t\t bool filter, bool enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tuint16_t flags = 0;\n+\tint mcam_idx, rc;\n+\n+\t/* Use default mcam entry to either drop vlan traffic when\n+\t * vlan filter is on or strip vtag when strip is enabled.\n+\t * Allocate default entry which matches port mac address\n+\t * and vtag(ctag/stag) flags with drop action.\n+\t */\n+\tif (!vlan->def_rx_mcam_idx) {\n+\t\tif (!eth_dev->data->promiscuous)\n+\t\t\tflags = MAC_ADDR_MATCH;\n+\n+\t\tif (filter && enable)\n+\t\t\tflags |= VTAG_F_MATCH | VLAN_DROP;\n+\t\telse if (strip && enable)\n+\t\t\tflags |= VTAG_F_MATCH;\n+\t\telse\n+\t\t\treturn 0;\n+\n+\t\tflags |= DEF_F_ENTRY;\n+\n+\t\tmcam_idx = nix_vlan_mcam_config(eth_dev, 0, flags);\n+\t\tif (mcam_idx < 0) {\n+\t\t\totx2_err(\"Failed to config vlan mcam\");\n+\t\t\treturn -mcam_idx;\n+\t\t}\n+\n+\t\tvlan->def_rx_mcam_idx = mcam_idx;\n+\t\treturn 0;\n+\t}\n+\n+\t/* Filter is already enabled, so packets would be dropped anyways. No\n+\t * processing needed for enabling strip wrt mcam entry.\n+\t */\n+\n+\t/* Filter disable request */\n+\tif (vlan->filter_on && filter && !enable) {\n+\t\tvlan->def_rx_mcam_ent.action &= ~((uint64_t)0xF);\n+\n+\t\t/* Free default rx entry only when\n+\t\t * 1. strip is not on and\n+\t\t * 2. qinq entry is allocated before default entry.\n+\t\t */\n+\t\tif (vlan->strip_on ||\n+\t\t (vlan->qinq_on && !vlan->qinq_before_def)) {\n+\t\t\tif (eth_dev->data->dev_conf.rxmode.mq_mode ==\n+\t\t\t\t\t\t\t\tETH_MQ_RX_RSS)\n+\t\t\t\tvlan->def_rx_mcam_ent.action |=\n+\t\t\t\t\t\t\tNIX_RX_ACTIONOP_RSS;\n+\t\t\telse\n+\t\t\t\tvlan->def_rx_mcam_ent.action |=\n+\t\t\t\t\t\t\tNIX_RX_ACTIONOP_UCAST;\n+\t\t\treturn nix_vlan_mcam_write(eth_dev,\n+\t\t\t\t\t\t vlan->def_rx_mcam_idx,\n+\t\t\t\t\t\t &vlan->def_rx_mcam_ent,\n+\t\t\t\t\t\t NIX_INTF_RX, 1);\n+\t\t} else {\n+\t\t\trc = nix_vlan_mcam_free(dev, vlan->def_rx_mcam_idx);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t\tvlan->def_rx_mcam_idx = 0;\n+\t\t}\n+\t}\n+\n+\t/* Filter enable request */\n+\tif (!vlan->filter_on && filter && enable) {\n+\t\tvlan->def_rx_mcam_ent.action &= ~((uint64_t)0xF);\n+\t\tvlan->def_rx_mcam_ent.action |= NIX_RX_ACTIONOP_DROP;\n+\t\treturn nix_vlan_mcam_write(eth_dev, vlan->def_rx_mcam_idx,\n+\t\t\t\t &vlan->def_rx_mcam_ent, NIX_INTF_RX, 1);\n+\t}\n+\n+\t/* Strip disable request */\n+\tif (vlan->strip_on && strip && !enable) {\n+\t\tif (!vlan->filter_on &&\n+\t\t !(vlan->qinq_on && !vlan->qinq_before_def)) {\n+\t\t\trc = nix_vlan_mcam_free(dev, vlan->def_rx_mcam_idx);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t\tvlan->def_rx_mcam_idx = 0;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Configure vlan stripping on or off */\n+static int\n+nix_vlan_hw_strip(struct rte_eth_dev *eth_dev, const uint8_t enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_mbox *mbox = dev->mbox;\n+\tstruct nix_vtag_config *vtag_cfg;\n+\tint rc = -EINVAL;\n+\n+\trc = nix_vlan_handle_default_rx_entry(eth_dev, true, false, enable);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to config default rx entry\");\n+\t\treturn rc;\n+\t}\n+\n+\tvtag_cfg = otx2_mbox_alloc_msg_nix_vtag_cfg(mbox);\n+\t/* cfg_type = 1 for rx vlan cfg */\n+\tvtag_cfg->cfg_type = VTAG_RX;\n+\n+\tif (enable)\n+\t\tvtag_cfg->rx.strip_vtag = 1;\n+\telse\n+\t\tvtag_cfg->rx.strip_vtag = 0;\n+\n+\t/* Always capture */\n+\tvtag_cfg->rx.capture_vtag = 1;\n+\tvtag_cfg->vtag_size = NIX_VTAGSIZE_T4;\n+\t/* Use rx vtag type index[0] for now */\n+\tvtag_cfg->rx.vtag_type = 0;\n+\n+\trc = otx2_mbox_process(mbox);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\tdev->vlan_info.strip_on = enable;\n+\treturn rc;\n+}\n+\n+/* Configure vlan filtering on or off for all vlans if vlan_id == 0 */\n+static int\n+nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const uint8_t enable,\n+\t\t uint16_t vlan_id)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tint rc = -EINVAL;\n+\n+\tif (!vlan_id && enable) {\n+\t\trc = nix_vlan_handle_default_rx_entry(eth_dev, false, true,\n+\t\t\t\t\t\t enable);\n+\t\tif (rc) {\n+\t\t\totx2_err(\"Failed to config vlan mcam\");\n+\t\t\treturn rc;\n+\t\t}\n+\t\tdev->vlan_info.filter_on = enable;\n+\t\treturn 0;\n+\t}\n+\n+\tif (!vlan_id && !enable) {\n+\t\trc = nix_vlan_handle_default_rx_entry(eth_dev, false, true,\n+\t\t\t\t\t\t enable);\n+\t\tif (rc) {\n+\t\t\totx2_err(\"Failed to config vlan mcam\");\n+\t\t\treturn rc;\n+\t\t}\n+\t\tdev->vlan_info.filter_on = enable;\n+\t\treturn 0;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+/* Configure double vlan(qinq) on or off */\n+static int\n+otx2_nix_config_double_vlan(struct rte_eth_dev *eth_dev,\n+\t\t\t const uint8_t enable)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan_info;\n+\tint mcam_idx;\n+\tint rc;\n+\n+\tvlan_info = &dev->vlan_info;\n+\n+\tif (!enable) {\n+\t\tif (!vlan_info->qinq_mcam_idx)\n+\t\t\treturn 0;\n+\n+\t\trc = nix_vlan_mcam_free(dev, vlan_info->qinq_mcam_idx);\n+\t\tif (rc)\n+\t\t\treturn rc;\n+\n+\t\tvlan_info->qinq_mcam_idx = 0;\n+\t\tdev->vlan_info.qinq_on = 0;\n+\t\tvlan_info->qinq_before_def = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tif (eth_dev->data->promiscuous)\n+\t\tmcam_idx = nix_vlan_mcam_config(eth_dev, 0, QINQ_F_MATCH);\n+\telse\n+\t\tmcam_idx = nix_vlan_mcam_config(eth_dev, 0,\n+\t\t\t\t\t\tQINQ_F_MATCH | MAC_ADDR_MATCH);\n+\tif (mcam_idx < 0)\n+\t\treturn mcam_idx;\n+\n+\tif (!vlan_info->def_rx_mcam_idx)\n+\t\tvlan_info->qinq_before_def = 1;\n+\n+\tvlan_info->qinq_mcam_idx = mcam_idx;\n+\tdev->vlan_info.qinq_on = 1;\n+\treturn 0;\n+}\n+\n+int\n+otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n+{\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tuint64_t offloads = dev->rx_offloads;\n+\tstruct rte_eth_rxmode *rxmode;\n+\tint rc;\n+\n+\trxmode = ð_dev->data->dev_conf.rxmode;\n+\n+\tif (mask & ETH_VLAN_EXTEND_MASK) {\n+\t\totx2_err(\"Extend offload not supported\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (mask & ETH_VLAN_STRIP_MASK) {\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {\n+\t\t\toffloads |= DEV_RX_OFFLOAD_VLAN_STRIP;\n+\t\t\trc = nix_vlan_hw_strip(eth_dev, true);\n+\t\t} else {\n+\t\t\toffloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;\n+\t\t\trc = nix_vlan_hw_strip(eth_dev, false);\n+\t\t}\n+\t\tif (rc)\n+\t\t\tgoto done;\n+\t}\n+\n+\tif (mask & ETH_VLAN_FILTER_MASK) {\n+\t\tif (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) {\n+\t\t\toffloads |= DEV_RX_OFFLOAD_VLAN_FILTER;\n+\t\t\trc = nix_vlan_hw_filter(eth_dev, true, 0);\n+\t\t} else {\n+\t\t\toffloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;\n+\t\t\trc = nix_vlan_hw_filter(eth_dev, false, 0);\n+\t\t}\n+\t\tif (rc)\n+\t\t\tgoto done;\n+\t}\n+\n+\tif (rxmode->offloads & DEV_RX_OFFLOAD_QINQ_STRIP) {\n+\t\tif (!dev->vlan_info.qinq_on) {\n+\t\t\toffloads |= DEV_RX_OFFLOAD_QINQ_STRIP;\n+\t\t\trc = otx2_nix_config_double_vlan(eth_dev, true);\n+\t\t\tif (rc)\n+\t\t\t\tgoto done;\n+\t\t}\n+\t} else {\n+\t\tif (dev->vlan_info.qinq_on) {\n+\t\t\toffloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;\n+\t\t\trc = otx2_nix_config_double_vlan(eth_dev, false);\n+\t\t\tif (rc)\n+\t\t\t\tgoto done;\n+\t\t}\n+\t}\n+\n+\tif (offloads & (DEV_RX_OFFLOAD_VLAN_STRIP |\n+\t\t\tDEV_RX_OFFLOAD_QINQ_STRIP)) {\n+\t\tdev->rx_offloads |= offloads;\n+\t\tdev->rx_offload_flags |= NIX_RX_OFFLOAD_VLAN_STRIP_F;\n+\t}\n+\n+done:\n+\treturn rc;\n+}\n+\n static int\n nix_vlan_rx_mkex_offset(uint64_t mask)\n {\n@@ -170,7 +650,7 @@ int\n otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n-\tint rc;\n+\tint rc, mask;\n \n \t/* Port initialized for first time or restarted */\n \tif (!dev->configured) {\n@@ -179,12 +659,37 @@ otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev)\n \t\t\totx2_err(\"Failed to get vlan mkex info rc=%d\", rc);\n \t\t\treturn rc;\n \t\t}\n+\n+\t\tTAILQ_INIT(&dev->vlan_info.fltr_tbl);\n \t}\n+\n+\tmask =\n+\t ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK;\n+\trc = otx2_nix_vlan_offload_set(eth_dev, mask);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to set vlan offload rc=%d\", rc);\n+\t\treturn rc;\n+\t}\n+\n \treturn 0;\n }\n \n int\n-otx2_nix_vlan_fini(__rte_unused struct rte_eth_dev *eth_dev)\n+otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev)\n {\n+\tstruct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);\n+\tstruct otx2_vlan_info *vlan = &dev->vlan_info;\n+\tint rc;\n+\n+\tif (!dev->configured) {\n+\t\tif (vlan->def_rx_mcam_idx) {\n+\t\t\trc = nix_vlan_mcam_free(dev, vlan->def_rx_mcam_idx);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t}\n+\t}\n+\n+\totx2_nix_config_double_vlan(eth_dev, false);\n+\tvlan->def_rx_mcam_idx = 0;\n \treturn 0;\n }\n", "prefixes": [ "v2", "44/57" ] }