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GET /api/patches/55708/?format=api
{ "id": 55708, "url": "http://patches.dpdk.org/api/patches/55708/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-40-jerinj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190630180609.36705-40-jerinj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190630180609.36705-40-jerinj@marvell.com", "date": "2019-06-30T18:05:51", "name": "[v2,39/57] net/octeontx2: add flow operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "98789d04fd52cd1521de91c087cd68e4768d81b5", "submitter": { "id": 1188, "url": "http://patches.dpdk.org/api/people/1188/?format=api", "name": "Jerin Jacob Kollanukkaran", "email": "jerinj@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20190630180609.36705-40-jerinj@marvell.com/mbox/", "series": [ { "id": 5236, "url": "http://patches.dpdk.org/api/series/5236/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=5236", "date": "2019-06-30T18:05:12", "name": "OCTEON TX2 Ethdev driver", "version": 2, "mbox": "http://patches.dpdk.org/series/5236/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/55708/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/55708/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 394AB1BAB6;\n\tSun, 30 Jun 2019 20:10:22 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n\t[67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 942301BAC5\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 20:08:33 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n\tby mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id\n\tx5UI73ON028454 for <dev@dpdk.org>; Sun, 30 Jun 2019 11:08:32 -0700", "from sc-exch04.marvell.com ([199.233.58.184])\n\tby mx0a-0016f401.pphosted.com with ESMTP id 2te5bn4gmr-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n\tfor <dev@dpdk.org>; Sun, 30 Jun 2019 11:08:32 -0700", "from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com\n\t(10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tSun, 30 Jun 2019 11:08:31 -0700", "from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Sun, 30 Jun 2019 11:08:31 -0700", "from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14])\n\tby maili.marvell.com (Postfix) with ESMTP id CB7523F703F;\n\tSun, 30 Jun 2019 11:08:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=dVT+6xF9SSLb6P0GsaiByolSXKfOZ+47ZiLV30tdqA0=;\n\tb=U4+vzovmN7Wk7SD1vciMmsrxlcuK8/WeqWfA1ajc1HCMfLI0GAv4GYgR8mEgz/Ri4PJk\n\tSE2fEhN3Z2n9sltNNfBuwt2txk0YCaXKucqrT4UL+LZx3z6NWySQKYfsYlU5NdrUnfQX\n\t4WS9rkQqS8eE7xcnjI8qiMlnng4XwDDvuYNj4bMnZPoOFkFcDQQUeh3LGm3kT5sEsUcy\n\t/sVnDaTBu5v0cnVhDvKFCh7jHMRkv1/MKWzaC8byWtEH3imqF2p3XlKgP5OnTaiFmLEy\n\tPsaUzoYLIjUqCZhC0BVAYtPGTD7sZczORDU893GrjTnr5X/SDPVwMMOUHcqBW2yspMvq\n\t4g== ", "From": "<jerinj@marvell.com>", "To": "<dev@dpdk.org>, Jerin Jacob <jerinj@marvell.com>, Nithin Dabilpuram\n\t<ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>", "CC": "Vivek Sharma <viveksharma@marvell.com>", "Date": "Sun, 30 Jun 2019 23:35:51 +0530", "Message-ID": "<20190630180609.36705-40-jerinj@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20190630180609.36705-1-jerinj@marvell.com>", "References": "<20190602152434.23996-1-jerinj@marvell.com>\n\t<20190630180609.36705-1-jerinj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:, ,\n\tdefinitions=2019-06-30_08:, , signatures=0", "Subject": "[dpdk-dev] [PATCH v2 39/57] net/octeontx2: add flow operations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding the initial flow ops like flow_create and flow_validate.\nThese will be used to alloc and write flow rule to device and\nvalidate the flow rule.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\nSigned-off-by: Vivek Sharma <viveksharma@marvell.com>\n---\n drivers/net/octeontx2/Makefile | 1 +\n drivers/net/octeontx2/meson.build | 1 +\n drivers/net/octeontx2/otx2_flow.c | 451 ++++++++++++++++++++++++++++++\n 3 files changed, 453 insertions(+)\n create mode 100644 drivers/net/octeontx2/otx2_flow.c", "diff": "diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile\nindex 3eb4dba53..21559f631 100644\n--- a/drivers/net/octeontx2/Makefile\n+++ b/drivers/net/octeontx2/Makefile\n@@ -32,6 +32,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \\\n \totx2_rss.c\t\\\n \totx2_mac.c\t\\\n \totx2_ptp.c\t\\\n+\totx2_flow.c\t\\\n \totx2_link.c\t\\\n \totx2_stats.c\t\\\n \totx2_lookup.c\t\\\ndiff --git a/drivers/net/octeontx2/meson.build b/drivers/net/octeontx2/meson.build\nindex f608c4947..f0e03bffe 100644\n--- a/drivers/net/octeontx2/meson.build\n+++ b/drivers/net/octeontx2/meson.build\n@@ -7,6 +7,7 @@ sources = files(\n \t\t'otx2_rss.c',\n \t\t'otx2_mac.c',\n \t\t'otx2_ptp.c',\n+\t\t'otx2_flow.c',\n \t\t'otx2_link.c',\n \t\t'otx2_stats.c',\n \t\t'otx2_lookup.c',\ndiff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c\nnew file mode 100644\nindex 000000000..896aef00a\n--- /dev/null\n+++ b/drivers/net/octeontx2/otx2_flow.c\n@@ -0,0 +1,451 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#include \"otx2_ethdev.h\"\n+#include \"otx2_flow.h\"\n+\n+static int\n+flow_program_npc(struct otx2_parse_state *pst, struct otx2_mbox *mbox,\n+\t\t struct otx2_npc_flow_info *flow_info)\n+{\n+\t/* This is non-LDATA part in search key */\n+\tuint64_t key_data[2] = {0ULL, 0ULL};\n+\tuint64_t key_mask[2] = {0ULL, 0ULL};\n+\tint intf = pst->flow->nix_intf;\n+\tint key_len, bit = 0, index;\n+\tint off, idx, data_off = 0;\n+\tuint8_t lid, mask, data;\n+\tuint16_t layer_info;\n+\tuint64_t lt, flags;\n+\n+\n+\t/* Skip till Layer A data start */\n+\twhile (bit < NPC_PARSE_KEX_S_LA_OFFSET) {\n+\t\tif (flow_info->keyx_supp_nmask[intf] & (1 << bit))\n+\t\t\tdata_off++;\n+\t\tbit++;\n+\t}\n+\n+\t/* Each bit represents 1 nibble */\n+\tdata_off *= 4;\n+\n+\tindex = 0;\n+\tfor (lid = 0; lid < NPC_MAX_LID; lid++) {\n+\t\t/* Offset in key */\n+\t\toff = NPC_PARSE_KEX_S_LID_OFFSET(lid);\n+\t\tlt = pst->lt[lid] & 0xf;\n+\t\tflags = pst->flags[lid] & 0xff;\n+\n+\t\t/* NPC_LAYER_KEX_S */\n+\t\tlayer_info = ((flow_info->keyx_supp_nmask[intf] >> off) & 0x7);\n+\n+\t\tif (layer_info) {\n+\t\t\tfor (idx = 0; idx <= 2 ; idx++) {\n+\t\t\t\tif (layer_info & (1 << idx)) {\n+\t\t\t\t\tif (idx == 2)\n+\t\t\t\t\t\tdata = lt;\n+\t\t\t\t\telse if (idx == 1)\n+\t\t\t\t\t\tdata = ((flags >> 4) & 0xf);\n+\t\t\t\t\telse\n+\t\t\t\t\t\tdata = (flags & 0xf);\n+\n+\t\t\t\t\tif (data_off >= 64) {\n+\t\t\t\t\t\tdata_off = 0;\n+\t\t\t\t\t\tindex++;\n+\t\t\t\t\t}\n+\t\t\t\t\tkey_data[index] |= ((uint64_t)data <<\n+\t\t\t\t\t\t\t data_off);\n+\t\t\t\t\tmask = 0xf;\n+\t\t\t\t\tif (lt == 0)\n+\t\t\t\t\t\tmask = 0;\n+\t\t\t\t\tkey_mask[index] |= ((uint64_t)mask <<\n+\t\t\t\t\t\t\t data_off);\n+\t\t\t\t\tdata_off += 4;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\totx2_npc_dbg(\"Npc prog key data0: 0x%\" PRIx64 \", data1: 0x%\" PRIx64,\n+\t\t key_data[0], key_data[1]);\n+\n+\t/* Copy this into mcam string */\n+\tkey_len = (pst->npc->keyx_len[intf] + 7) / 8;\n+\totx2_npc_dbg(\"Key_len = %d\", key_len);\n+\tmemcpy(pst->flow->mcam_data, key_data, key_len);\n+\tmemcpy(pst->flow->mcam_mask, key_mask, key_len);\n+\n+\totx2_npc_dbg(\"Final flow data\");\n+\tfor (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {\n+\t\totx2_npc_dbg(\"data[%d]: 0x%\" PRIx64 \", mask[%d]: 0x%\" PRIx64,\n+\t\t\t idx, pst->flow->mcam_data[idx],\n+\t\t\t idx, pst->flow->mcam_mask[idx]);\n+\t}\n+\n+\t/*\n+\t * Now we have mcam data and mask formatted as\n+\t * [Key_len/4 nibbles][0 or 1 nibble hole][data]\n+\t * hole is present if key_len is odd number of nibbles.\n+\t * mcam data must be split into 64 bits + 48 bits segments\n+\t * for each back W0, W1.\n+\t */\n+\n+\treturn otx2_flow_mcam_alloc_and_write(pst->flow, mbox, pst, flow_info);\n+}\n+\n+static int\n+flow_parse_attr(struct rte_eth_dev *eth_dev,\n+\t\tconst struct rte_flow_attr *attr,\n+\t\tstruct rte_flow_error *error,\n+\t\tstruct rte_flow *flow)\n+{\n+\tstruct otx2_eth_dev *dev = eth_dev->data->dev_private;\n+\tconst char *errmsg = NULL;\n+\n+\tif (attr == NULL)\n+\t\terrmsg = \"Attribute can't be empty\";\n+\telse if (attr->group)\n+\t\terrmsg = \"Groups are not supported\";\n+\telse if (attr->priority >= dev->npc_flow.flow_max_priority)\n+\t\terrmsg = \"Priority should be with in specified range\";\n+\telse if ((!attr->egress && !attr->ingress) ||\n+\t\t (attr->egress && attr->ingress))\n+\t\terrmsg = \"Exactly one of ingress or egress must be set\";\n+\n+\tif (errmsg != NULL) {\n+\t\trte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR,\n+\t\t\t\t attr, errmsg);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (attr->ingress)\n+\t\tflow->nix_intf = OTX2_INTF_RX;\n+\telse\n+\t\tflow->nix_intf = OTX2_INTF_TX;\n+\n+\tflow->priority = attr->priority;\n+\treturn 0;\n+}\n+\n+static inline int\n+flow_get_free_rss_grp(struct rte_bitmap *bmap,\n+\t\t uint32_t size, uint32_t *pos)\n+{\n+\tfor (*pos = 0; *pos < size; ++*pos) {\n+\t\tif (!rte_bitmap_get(bmap, *pos))\n+\t\t\tbreak;\n+\t}\n+\n+\treturn *pos < size ? 0 : -1;\n+}\n+\n+static int\n+flow_configure_rss_action(struct otx2_eth_dev *dev,\n+\t\t\t const struct rte_flow_action_rss *rss,\n+\t\t\t uint8_t *alg_idx, uint32_t *rss_grp,\n+\t\t\t int mcam_index)\n+{\n+\tstruct otx2_npc_flow_info *flow_info = &dev->npc_flow;\n+\tuint16_t reta[NIX_RSS_RETA_SIZE_MAX];\n+\tuint32_t flowkey_cfg, grp_aval, i;\n+\tuint16_t *ind_tbl = NULL;\n+\tuint8_t flowkey_algx;\n+\tint rc;\n+\n+\trc = flow_get_free_rss_grp(flow_info->rss_grp_entries,\n+\t\t\t\t flow_info->rss_grps, &grp_aval);\n+\t/* RSS group :0 is not usable for flow rss action */\n+\tif (rc < 0 || grp_aval == 0)\n+\t\treturn -ENOSPC;\n+\n+\t*rss_grp = grp_aval;\n+\n+\totx2_nix_rss_set_key(dev, (uint8_t *)(uintptr_t)rss->key,\n+\t\t\t rss->key_len);\n+\n+\t/* If queue count passed in the rss action is less than\n+\t * HW configured reta size, replicate rss action reta\n+\t * across HW reta table.\n+\t */\n+\tif (dev->rss_info.rss_size > rss->queue_num) {\n+\t\tind_tbl = reta;\n+\n+\t\tfor (i = 0; i < (dev->rss_info.rss_size / rss->queue_num); i++)\n+\t\t\tmemcpy(reta + i * rss->queue_num, rss->queue,\n+\t\t\t sizeof(uint16_t) * rss->queue_num);\n+\n+\t\ti = dev->rss_info.rss_size % rss->queue_num;\n+\t\tif (i)\n+\t\t\tmemcpy(&reta[dev->rss_info.rss_size] - i,\n+\t\t\t rss->queue, i * sizeof(uint16_t));\n+\t} else {\n+\t\tind_tbl = (uint16_t *)(uintptr_t)rss->queue;\n+\t}\n+\n+\trc = otx2_nix_rss_tbl_init(dev, *rss_grp, ind_tbl);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to init rss table rc = %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\tflowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss->types, rss->level);\n+\n+\trc = otx2_rss_set_hf(dev, flowkey_cfg, &flowkey_algx,\n+\t\t\t *rss_grp, mcam_index);\n+\tif (rc) {\n+\t\totx2_err(\"Failed to set rss hash function rc = %d\", rc);\n+\t\treturn rc;\n+\t}\n+\n+\t*alg_idx = flowkey_algx;\n+\n+\trte_bitmap_set(flow_info->rss_grp_entries, *rss_grp);\n+\n+\treturn 0;\n+}\n+\n+\n+static int\n+flow_program_rss_action(struct rte_eth_dev *eth_dev,\n+\t\t\tconst struct rte_flow_action actions[],\n+\t\t\tstruct rte_flow *flow)\n+{\n+\tstruct otx2_eth_dev *dev = eth_dev->data->dev_private;\n+\tconst struct rte_flow_action_rss *rss;\n+\tuint32_t rss_grp;\n+\tuint8_t alg_idx;\n+\tint rc;\n+\n+\tfor (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {\n+\t\tif (actions->type == RTE_FLOW_ACTION_TYPE_RSS) {\n+\t\t\trss = (const struct rte_flow_action_rss *)actions->conf;\n+\n+\t\t\trc = flow_configure_rss_action(dev,\n+\t\t\t\t\t\t rss, &alg_idx, &rss_grp,\n+\t\t\t\t\t\t flow->mcam_id);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\n+\t\t\tflow->npc_action |=\n+\t\t\t\t((uint64_t)(alg_idx & NIX_RSS_ACT_ALG_MASK) <<\n+\t\t\t\t NIX_RSS_ACT_ALG_OFFSET) |\n+\t\t\t\t((uint64_t)(rss_grp & NIX_RSS_ACT_GRP_MASK) <<\n+\t\t\t\t NIX_RSS_ACT_GRP_OFFSET);\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n+flow_parse_meta_items(__rte_unused struct otx2_parse_state *pst)\n+{\n+\totx2_npc_dbg(\"Meta Item\");\n+\treturn 0;\n+}\n+\n+/*\n+ * Parse function of each layer:\n+ * - Consume one or more patterns that are relevant.\n+ * - Update parse_state\n+ * - Set parse_state.pattern = last item consumed\n+ * - Set appropriate error code/message when returning error.\n+ */\n+typedef int (*flow_parse_stage_func_t)(struct otx2_parse_state *pst);\n+\n+static int\n+flow_parse_pattern(struct rte_eth_dev *dev,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t struct rte_flow_error *error,\n+\t\t struct rte_flow *flow,\n+\t\t struct otx2_parse_state *pst)\n+{\n+\tflow_parse_stage_func_t parse_stage_funcs[] = {\n+\t\tflow_parse_meta_items,\n+\t\totx2_flow_parse_la,\n+\t\totx2_flow_parse_lb,\n+\t\totx2_flow_parse_lc,\n+\t\totx2_flow_parse_ld,\n+\t\totx2_flow_parse_le,\n+\t\totx2_flow_parse_lf,\n+\t\totx2_flow_parse_lg,\n+\t\totx2_flow_parse_lh,\n+\t};\n+\tstruct otx2_eth_dev *hw = dev->data->dev_private;\n+\tuint8_t layer = 0;\n+\tint key_offset;\n+\tint rc;\n+\n+\tif (pattern == NULL) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,\n+\t\t\t\t \"pattern is NULL\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tmemset(pst, 0, sizeof(*pst));\n+\tpst->npc = &hw->npc_flow;\n+\tpst->error = error;\n+\tpst->flow = flow;\n+\n+\t/* Use integral byte offset */\n+\tkey_offset = pst->npc->keyx_len[flow->nix_intf];\n+\tkey_offset = (key_offset + 7) / 8;\n+\n+\t/* Location where LDATA would begin */\n+\tpst->mcam_data = (uint8_t *)flow->mcam_data;\n+\tpst->mcam_mask = (uint8_t *)flow->mcam_mask;\n+\n+\twhile (pattern->type != RTE_FLOW_ITEM_TYPE_END &&\n+\t layer < RTE_DIM(parse_stage_funcs)) {\n+\t\totx2_npc_dbg(\"Pattern type = %d\", pattern->type);\n+\n+\t\t/* Skip place-holders */\n+\t\tpattern = otx2_flow_skip_void_and_any_items(pattern);\n+\n+\t\tpst->pattern = pattern;\n+\t\totx2_npc_dbg(\"Is tunnel = %d, layer = %d\", pst->tunnel, layer);\n+\t\trc = parse_stage_funcs[layer](pst);\n+\t\tif (rc != 0)\n+\t\t\treturn -rte_errno;\n+\n+\t\tlayer++;\n+\n+\t\t/*\n+\t\t * Parse stage function sets pst->pattern to\n+\t\t * 1 past the last item it consumed.\n+\t\t */\n+\t\tpattern = pst->pattern;\n+\n+\t\tif (pst->terminate)\n+\t\t\tbreak;\n+\t}\n+\n+\t/* Skip trailing place-holders */\n+\tpattern = otx2_flow_skip_void_and_any_items(pattern);\n+\n+\t/* Are there more items than what we can handle? */\n+\tif (pattern->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\trte_flow_error_set(error, ENOTSUP,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ITEM, pattern,\n+\t\t\t\t \"unsupported item in the sequence\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+flow_parse_rule(struct rte_eth_dev *dev,\n+\t\tconst struct rte_flow_attr *attr,\n+\t\tconst struct rte_flow_item pattern[],\n+\t\tconst struct rte_flow_action actions[],\n+\t\tstruct rte_flow_error *error,\n+\t\tstruct rte_flow *flow,\n+\t\tstruct otx2_parse_state *pst)\n+{\n+\tint err;\n+\n+\t/* Check attributes */\n+\terr = flow_parse_attr(dev, attr, error, flow);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* Check actions */\n+\terr = otx2_flow_parse_actions(dev, attr, actions, error, flow);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* Check pattern */\n+\terr = flow_parse_pattern(dev, pattern, error, flow, pst);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* Check for overlaps? */\n+\treturn 0;\n+}\n+\n+static int\n+otx2_flow_validate(struct rte_eth_dev *dev,\n+\t\t const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct otx2_parse_state parse_state;\n+\tstruct rte_flow flow;\n+\n+\tmemset(&flow, 0, sizeof(flow));\n+\treturn flow_parse_rule(dev, attr, pattern, actions, error, &flow,\n+\t\t\t &parse_state);\n+}\n+\n+static struct rte_flow *\n+otx2_flow_create(struct rte_eth_dev *dev,\n+\t\t const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct otx2_eth_dev *hw = dev->data->dev_private;\n+\tstruct otx2_parse_state parse_state;\n+\tstruct otx2_mbox *mbox = hw->mbox;\n+\tstruct rte_flow *flow, *flow_iter;\n+\tstruct otx2_flow_list *list;\n+\tint rc;\n+\n+\tflow = rte_zmalloc(\"otx2_rte_flow\", sizeof(*flow), 0);\n+\tif (flow == NULL) {\n+\t\trte_flow_error_set(error, ENOMEM,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"Memory allocation failed\");\n+\t\treturn NULL;\n+\t}\n+\tmemset(flow, 0, sizeof(*flow));\n+\n+\trc = flow_parse_rule(dev, attr, pattern, actions, error, flow,\n+\t\t\t &parse_state);\n+\tif (rc != 0)\n+\t\tgoto err_exit;\n+\n+\trc = flow_program_npc(&parse_state, mbox, &hw->npc_flow);\n+\tif (rc != 0) {\n+\t\trte_flow_error_set(error, EIO,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"Failed to insert filter\");\n+\t\tgoto err_exit;\n+\t}\n+\n+\trc = flow_program_rss_action(dev, actions, flow);\n+\tif (rc != 0) {\n+\t\trte_flow_error_set(error, EIO,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL,\n+\t\t\t\t \"Failed to program rss action\");\n+\t\tgoto err_exit;\n+\t}\n+\n+\n+\tlist = &hw->npc_flow.flow_list[flow->priority];\n+\t/* List in ascending order of mcam entries */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > flow->mcam_id) {\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, flow, next);\n+\t\t\treturn flow;\n+\t\t}\n+\t}\n+\n+\tTAILQ_INSERT_TAIL(list, flow, next);\n+\treturn flow;\n+\n+err_exit:\n+\trte_free(flow);\n+\treturn NULL;\n+}\n+\n+const struct rte_flow_ops otx2_flow_ops = {\n+\t.validate = otx2_flow_validate,\n+\t.create = otx2_flow_create,\n+};\n", "prefixes": [ "v2", "39/57" ] }